74ACTQ16374SSCX

74ACTQ16374SSCX Datasheet

74ACTQ16374 16-Bit D-Type Flip-Flop with 3-STATE Outputs

Part	Datasheet
74ACTQ16374SSCX	74ACTQ16374SSCX (pdf)

Related Parts	Information
74ACTQ16374MTDX	74ACTQ16374MTDX
74ACTQ16374MTD	74ACTQ16374MTD
74ACTQ16374SSC	74ACTQ16374SSC

PDF Datasheet Preview
74ACTQ16374 16-Bit D-Type Flip-Flop with 3-STATE Outputs 74ACTQ16374 16-Bit D-Type Flip-Flop with 3-STATE Outputs The ACTQ16374 contains sixteen non-inverting D-type flipflops with 3-STATE outputs and is intended for bus oriented applications. The device is byte controlled. A buffered clock CP and Output Enable OE are common to each byte and can be shorted together for full 16-bit operation. The ACTQ16245 utilizes Fairchild Quiet technology to guarantee quiet output switching and improved dynamic threshold performance. FACT Quiet features output control for superior performance. s Utilizes Fairchild FACT Quiet Series technology s Guaranteed simultaneous switching noise level and dynamic threshold performance s Guaranteed pin-to-pin output skew s Buffered Positive edge-triggered clock s Separate control logic for each byte s 16-bit version of the ACTQ374 s Outputs source/sink 24 mA s Additional specs for Multiple Output Switching s Output loadings specs for both 50 pF and 250 pF loads Ordering Code: Order Number Package Number Package Description 74ACTQ16374SSC MS48A 48-Lead Small Shrink Outline Package SSOP , JEDEC MO-118, Wide 74ACTQ16374MTD MTD48 48-Lead Thin Shrink Small Outline Package TSSOP , JEDEC MO-153, 6.1mm Wide Device also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering code. Connection Diagram Logic Symbol Pin Descriptions Pin Names OEn CPn Output Enable Input Active LOW Clock Pulse Input Inputs Outputs FACT Quiet and are trademarks of Fairchild Semiconductor Corporation. 2005 Fairchild Semiconductor Corporation DS010935 74ACTQ16374 Functional Description The ACTQ16374 consists of sixteen edge-triggered flipflops with individual D-type inputs and 3-STATE true outputs. The device is byte controlled with each byte functioning identically, but independent of the other. The control pins can be shorted together to obtain full 16-bit operation. Each byte has a buffered clock and buffered Output Enable common to all flip-flops within that byte. The description which follows applies to each byte. Each flip-flop will store the state of their individual D inputs that meet the setup and hold time requirements on the LOW-to-HIGH Clock CPn transition. With the Output Enable OEn LOW, the contents of the flip-flops are available at the outputs. When OEn is HIGH, the outputs go to the high impedance state. Operation of the OEn input does not affect the state of the flip-flops. Logic Diagrams Truth Tables Inputs OE1 L Inputs OE2 L H HIGH Voltage Level L LOW Voltage Level X Immaterial HIGH Impedance LOW-to-HIGH Transition Byte 1 0:7 Outputs H L Previous Z Outputs H L Previous Z Byte 2 8:15 74ACTQ16374 Absolute Maximum Ratings Note 1 Supply Voltage VCC DC Input Diode Current IIK VI VCC 0.5V DC Output Diode Current IOK VO VCC 0.5V DC Output Voltage VO DC Output Source/Sink Current IO DC VCC or Ground Current per Output Pin Storage Temperature mA to VCC 0.5V r50 mA r 50 mA to Recommended Operating Conditions Supply Voltage VCC Input Voltage VI Output Voltage VO Operating Temperature TA Minimum Input Edge Rate 'V/'t 4.5V to 5.5V 0V to VCC 0V to VCC to 125 mV/ns VIN from 0.8V to 2.0V VCC 4.5V, 5.5V Note 1 Absolute maximum ratings are those values beyond which damage to the device may occur. The databook specifications should be met, without exception to ensure that the system design is reliable over its power supply, temperature, and output/input loading variables. Fairchild does not recommend operation of circuits outside databook specifications. DC Electrical Characteristics Parameter

PDF Datasheet Preview

74ACTQ16374 16-Bit D-Type Flip-Flop with 3-STATE Outputs
74ACTQ16374 16-Bit D-Type Flip-Flop with 3-STATE Outputs

The ACTQ16374 contains sixteen non-inverting D-type flipflops with 3-STATE outputs and is intended for bus oriented applications. The device is byte controlled. A buffered clock CP and Output Enable OE are common to each byte and can be shorted together for full 16-bit operation.

The ACTQ16245 utilizes Fairchild Quiet technology to guarantee quiet output switching and improved dynamic threshold performance. FACT Quiet features output control for superior performance.
s Utilizes Fairchild FACT Quiet Series technology s Guaranteed simultaneous switching noise level and
dynamic threshold performance s Guaranteed pin-to-pin output skew s Buffered Positive edge-triggered clock s Separate control logic for each byte s 16-bit version of the ACTQ374 s Outputs source/sink 24 mA s Additional specs for Multiple Output Switching s Output loadings specs for both 50 pF and 250 pF loads
Ordering Code:

Order Number Package Number

Package Description
74ACTQ16374SSC

MS48A
48-Lead Small Shrink Outline Package SSOP , JEDEC MO-118, Wide
74ACTQ16374MTD

MTD48
48-Lead Thin Shrink Small Outline Package TSSOP , JEDEC MO-153, 6.1mm Wide
Device also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering code.

Connection Diagram

Logic Symbol

Pin Descriptions

Pin Names

OEn CPn

Output Enable Input Active LOW Clock Pulse Input Inputs Outputs

FACT Quiet and are trademarks of Fairchild Semiconductor Corporation. 2005 Fairchild Semiconductor Corporation DS010935
74ACTQ16374

Functional Description

The ACTQ16374 consists of sixteen edge-triggered flipflops with individual D-type inputs and 3-STATE true outputs. The device is byte controlled with each byte functioning identically, but independent of the other. The control pins can be shorted together to obtain full 16-bit operation. Each byte has a buffered clock and buffered Output Enable common to all flip-flops within that byte. The description which follows applies to each byte. Each flip-flop will store the state of their individual D inputs that meet the setup and hold time requirements on the LOW-to-HIGH Clock CPn transition. With the Output Enable OEn LOW, the contents of the flip-flops are available at the outputs. When OEn is HIGH, the outputs go to the high impedance state. Operation of the OEn input does not affect the state of the flip-flops.

Logic Diagrams

Truth Tables

Inputs

OE1 L

Inputs

OE2 L

H HIGH Voltage Level L LOW Voltage Level X Immaterial

HIGH Impedance LOW-to-HIGH Transition

Byte 1 0:7

Outputs

H L Previous Z

Outputs

H L Previous Z

Byte 2 8:15
74ACTQ16374

Absolute Maximum Ratings Note 1

Supply Voltage VCC DC Input Diode Current IIK

VI VCC 0.5V DC Output Diode Current IOK VO VCC 0.5V DC Output Voltage VO DC Output Source/Sink Current IO DC VCC or Ground Current per Output Pin

Storage Temperature
mA to VCC 0.5V r50 mA
r 50 mA to

Recommended Operating Conditions

Supply Voltage VCC Input Voltage VI Output Voltage VO Operating Temperature TA Minimum Input Edge Rate 'V/'t
4.5V to 5.5V
0V to VCC 0V to VCC to 125 mV/ns

VIN from 0.8V to 2.0V

VCC 4.5V, 5.5V

Note 1 Absolute maximum ratings are those values beyond which damage to the device may occur. The databook specifications should be met, without exception to ensure that the system design is reliable over its power supply, temperature, and output/input loading variables. Fairchild does not recommend operation of circuits outside databook specifications.

DC Electrical Characteristics

Parameter

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Datasheet ID: 74ACTQ16374SSCX 513201