74ACQ574SJ

74ACQ574SJ Datasheet


74ACQ574, 74ACTQ574 Quiet Series Octal D-Type Flip-Flop with 3-STATE Outputs

Part Datasheet
74ACQ574SJ 74ACQ574SJ 74ACQ574SJ (pdf)
Related Parts Information
74ACTQ574SJX 74ACTQ574SJX 74ACTQ574SJX
74ACTQ574SJ 74ACTQ574SJ 74ACTQ574SJ
74ACQ574SC 74ACQ574SC 74ACQ574SC
74ACTQ574SCX 74ACTQ574SCX 74ACTQ574SCX
74ACTQ574SC 74ACTQ574SC 74ACTQ574SC
74ACQ574SCX 74ACQ574SCX 74ACQ574SCX
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74ACQ574, 74ACTQ574 Quiet Series Octal D-Type Flip-Flop with 3-STATE Outputs

April 2007
74ACQ574, 74ACTQ574 tm

Quiet Series Octal D-Type Flip-Flop with 3-STATE Outputs
• ICC and IOZ reduced by 50%
• Guaranteed simultaneous switching noise level and
dynamic threshold performance
• Guaranteed pin-to-pin skew AC performance
• Inputs and outputs on opposite sides of the package
allowing easy interface with microprocessors
• Functionally identical to the ACQ/ACTQ374
• 3-STATE outputs drive bus lines or buffer memory
address registers
• Outputs source/sink 24mA
• Faster prop delays than the standard AC/ACT574

The ACQ/ACTQ574 is a high-speed, low-power octal D-type flip-flop with a buffered Common Clock CP and a buffered common Output Enable OE . The information presented to the D inputs is stored in the flip-flops on the LOW-to-HIGH clock CP transition.

ACQ/ACTQ574 utilizes FACT Quiet Series technology to guarantee quiet output switching and improve dynamic threshold performance. FACT Quiet Series features GTO output control and undershoot corrector in addition to a split ground bus for superior performance.

The ACQ/ACTQ574 is functionally identical to the ACTQ374 but with different pin-out.
Ordering Information

Order Number 74ACQ574SC
74ACQ574SJ 74ACTQ574SC
74ACTQ574SJ

Package Number

M20B

M20D M20B

M20D

Package Description
20-Lead Small Outline Integrated Circuit SOIC , JEDEC MS-013, Wide Body 20-Lead Small Outline Package SOP , EIAJ TYPE II, 5.3mm Wide 20-Lead Small Outline Integrated Circuit SOIC , JEDEC MS-013, Wide Body 20-Lead Small Outline Package SOP , EIAJ TYPE II, 5.3mm Wide
Device also available in Tape and Reel. Specify by appending suffix “X” to the ordering number.

Connection Diagram

Pin Descriptions

Pin Names CP OE

Description Data Inputs Clock Pulse Input 3-STATE Output Enable Input 3-STATE Outputs

FACT , Quiet Series , FACT Quiet Series , and GTO are trademarks of Fairchild Semiconductor Corporation.
74ACQ574, 74ACTQ574 Quiet Series Octal D-Type Flip-Flop with 3-STATE Outputs

Logic Symbols

IEEE/IEC

Logic Diagram

Functional Description

The ACQ/ACTQ574 consists of eight edge-triggered flip-flops with individual D-type inputs and 3-STATE true outputs. The buffered clock and buffered Output Enable are common to all flip-flops. The eight flip-flops will store the state of their individual D-type inputs that meet the setup and hold time requirements on the LOW-to-HIGH Clock CP transition. With the Output Enable OE LOW, the contents of the eight flip-flops are available at the outputs. When OE is HIGH, the outputs go to the high impedance state. Operation of the OE input does not affect the state of the flip-flops.

Function Table

Inputs

OE CP D

Internal Q NC L H L H NC

Outputs

Function

Hold

Hold

Load

Load

Data Available

Data Available

NC No Change in Data

NC No Change in Data

H = HIGH Voltage Level L = LOW Voltage Level X = Immaterial Z = High Impedance
= LOW-to-HIGH Transition NC = No Change

Please note that this diagram is provided only for the understanding of logic operations and should not be used to estimate propagation delays.

Figure
1990 Fairchild Semiconductor Corporation
74ACQ574, 74ACTQ574 Quiet Series Octal D-Type Flip-Flop with 3-STATE Outputs

Absolute Maximum Ratings

Stresses exceeding the absolute maximum ratings may damage the device. The device may not function or be operable above the recommended operating conditions and stressing the parts to these levels is not recommended. In addition, extended exposure to stresses above the recommended operating conditions may affect device reliability. The absolute maximum ratings are stress ratings only.

Parameter

VCC IIK

VI IOK

VO IO ICC or IGND TSTG

Supply Voltage DC Input Diode Current

VI = VI = VCC + 0.5V DC Input Voltage DC Output Diode Current VO = VO = VCC + 0.5V DC Output Voltage DC Output Source or Sink Current DC VCC or Ground Current per Output Pin Storage Temperature DC Latch-Up Source or Sink Current

Junction Temperature
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Datasheet ID: 74ACQ574SJ 513152