74ACT399SC

74ACT399SC Datasheet

74AC399<br>• 74ACT399 Quad 2-Port Register

Part	Datasheet
74ACT399SC	74ACT399SC (pdf)

Related Parts	Information
74ACT399PC	74ACT399PC
74ACT399MTCX	74ACT399MTCX
74AC399SC	74AC399SC
74AC399SCX	74AC399SCX
74ACT399SCX	74ACT399SCX
74AC399PC	74AC399PC
74ACT399SJ	74ACT399SJ
74ACT399SJX	74ACT399SJX

PDF Datasheet Preview
74AC399 • 74ACT399 Quad 2-Port Register 74AC399 • 74ACT399 Quad 2-Port Register The AC/ACT399 is the logical equivalent of a quad 2-input multiplexer feeding into four edge-triggered flip-flops. A common Select input determines which of the two 4-bit words is accepted. The selected data enters the flip-flop on the rising edge of the clock. s ICC reduced by 50% s Select inputs from two data sources s Fully positive edge-triggered operation s Outputs source/sink 24 mA s AC/ACT399 has TTL-compatible inputs Ordering Code: Order Number Package Number Package Description 74AC399SC M16A 16-Lead Small Outline Integrated Circuit SOIC , JEDEC MS-012, Narrow 74AC399PC N16E 16-Lead Plastic Dual-In-Line Package PDIP , JEDEC MS-001, Wide 74ACT399SC M16A 16-Lead Small Outline Integrated Circuit SOIC , JEDEC MS-012, Narrow 74ACT399SJ M16D 16-Lead Small Outline Package SOP , EIAJ TYPE II, 5.3mm Wide 74ACT399MTC MTC16 16-Lead Thin Shrink Small Outline Package TSSOP , JEDEC MO-153, 4.4mm Wide 74ACT399PC N16E 16-Lead Plastic Dual-In-Line Package PDIP , JEDEC MS-001, Wide Device also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering code. Logic Symbols Connection Diagram IEEE/IEC Pin Descriptions Pin Names S CP Description Common Select Input Clock Pulse Input Data Inputs from Source 0 Data Inputs from Source 1 Register True Outputs is a trademark of Fairchild Semiconductor Corporation. 2000 Fairchild Semiconductor Corporation DS009789 74AC399 • 74ACT399 Functional Description Function Table The AC/ACT399 is a high-speed quad 2-port register. It selects four bits of data from either of two sources Ports Inputs under control of a common Select input S . The selected data is transferred to a 4-bit output register synchronous with the LOW-to-HIGH transition of the Clock input CP . The 4-bit D-type output register is fully edge-triggered. The Data inputs I0x, I1x and Select input S must be stable only a setup time prior to and hold time after the LOW-toHIGH transition of the Clock input for predictable operation. H = HIGH Voltage Level L = LOW Voltage Level = Immaterial = LOW-to-HIGH Clock Transition Logic Diagram Outputs Please note that this diagram is provided only for the understanding of logic operations and should not be used to estimate propagation delays. 74AC399 • 74ACT399 Absolute Maximum Ratings Note 1 Supply Voltage VCC DC Input Diode Current IIK VI = −0.5V VI = VCC + 0.5V DC Input Voltage VI DC Output Diode Current IOK VO = −0.5V VO = VCC + 0.5V DC Output Voltage VO DC Output Source or Sink Current IO DC VCC or Ground Current per Output Pin ICC or IGND Storage Temperature TSTG Junction Temperature TJ PDIP −0.5V to +7.0V −20 mA +20 mA −0.5V to VCC + 0.5V −20 mA +20 mA −0.5V to VCC + 0.5V ±50 mA ±50 mA −65°C to +150°C +140°C Recommended Operating Conditions Supply Voltage VCC AC 2.0V to 6.0V 4.5V to 5.5V Input Voltage VI Output Voltage VO Operating Temperature TA Minimum Input Edge Rate 0V to VCC 0V to VCC −40°C to +85°C AC Devices VIN from 30% to 70% of VCC 3.3V, 4.5V, 5.5V Minimum Input Edge Rate

PDF Datasheet Preview

74AC399
• 74ACT399 Quad 2-Port Register
74AC399
• 74ACT399 Quad 2-Port Register

The AC/ACT399 is the logical equivalent of a quad 2-input multiplexer feeding into four edge-triggered flip-flops. A common Select input determines which of the two 4-bit words is accepted. The selected data enters the flip-flop on the rising edge of the clock.
s ICC reduced by 50% s Select inputs from two data sources s Fully positive edge-triggered operation s Outputs source/sink 24 mA s AC/ACT399 has TTL-compatible inputs
Ordering Code:

Order Number Package Number

Package Description
74AC399SC

M16A
16-Lead Small Outline Integrated Circuit SOIC , JEDEC MS-012, Narrow
74AC399PC

N16E
16-Lead Plastic Dual-In-Line Package PDIP , JEDEC MS-001, Wide
74ACT399SC

M16A
16-Lead Small Outline Integrated Circuit SOIC , JEDEC MS-012, Narrow
74ACT399SJ

M16D
16-Lead Small Outline Package SOP , EIAJ TYPE II, 5.3mm Wide
74ACT399MTC

MTC16
16-Lead Thin Shrink Small Outline Package TSSOP , JEDEC MO-153, 4.4mm Wide
74ACT399PC

N16E
16-Lead Plastic Dual-In-Line Package PDIP , JEDEC MS-001, Wide
Device also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering code.

Logic Symbols

Connection Diagram

IEEE/IEC

Pin Descriptions

Pin Names S CP

Description Common Select Input Clock Pulse Input Data Inputs from Source 0 Data Inputs from Source 1 Register True Outputs
is a trademark of Fairchild Semiconductor Corporation.
2000 Fairchild Semiconductor Corporation DS009789
74AC399
• 74ACT399

Functional Description

Function Table

The AC/ACT399 is a high-speed quad 2-port register. It selects four bits of data from either of two sources Ports

Inputs
under control of a common Select input S . The selected data is transferred to a 4-bit output register synchronous with the LOW-to-HIGH transition of the Clock input CP . The 4-bit D-type output register is fully edge-triggered. The Data inputs I0x, I1x and Select input S must be stable only a setup time prior to and hold time after the LOW-toHIGH transition of the Clock input for predictable operation.

H = HIGH Voltage Level L = LOW Voltage Level
= Immaterial = LOW-to-HIGH Clock Transition

Logic Diagram

Outputs

Please note that this diagram is provided only for the understanding of logic operations and should not be used to estimate propagation delays.
74AC399
• 74ACT399

Absolute Maximum Ratings Note 1

Supply Voltage VCC DC Input Diode Current IIK

VI = −0.5V VI = VCC + 0.5V DC Input Voltage VI DC Output Diode Current IOK VO = −0.5V VO = VCC + 0.5V DC Output Voltage VO DC Output Source or

Sink Current IO DC VCC or Ground Current
per Output Pin ICC or IGND Storage Temperature TSTG Junction Temperature TJ

PDIP
−0.5V to +7.0V
−20 mA +20 mA −0.5V to VCC + 0.5V
−20 mA +20 mA −0.5V to VCC + 0.5V
±50 mA
±50 mA −65°C to +150°C
+140°C

Recommended Operating Conditions

Supply Voltage VCC AC
2.0V to 6.0V
4.5V to 5.5V

Input Voltage VI Output Voltage VO Operating Temperature TA Minimum Input Edge Rate
0V to VCC 0V to VCC −40°C to +85°C

AC Devices

VIN from 30% to 70% of VCC 3.3V, 4.5V, 5.5V Minimum Input Edge Rate

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Datasheet ID: 74ACT399SC 513100