74AC257SCX

74AC257SCX Datasheet

74AC257<br>• 74ACT257 Quad 2-Input Multiplexer with 3-STATE Outputs

Part	Datasheet
74AC257SCX	74AC257SCX (pdf)

Related Parts	Information
74AC257SC	74AC257SC
74AC257PC	74AC257PC
74AC257MTCX	74AC257MTCX
74AC257SJ	74AC257SJ
74AC257SJX	74AC257SJX
74AC257MTC	74AC257MTC

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74AC257 • 74ACT257 Quad 2-Input Multiplexer with 3-STATE Outputs 74AC257 • 74ACT257 Quad 2-Input Multiplexer with 3-STATE Outputs The AC/ACT257 is a quad 2-input multiplexer with 3STATE outputs. Four bits of data from two sources can be selected using a Common Data Select input. The four outputs present the selected data in true noninverted form. The outputs may be switched to a high impedance state by placing a logic HIGH on the common Output Enable OE input, allowing the outputs to interface directly with bus-oriented systems. s ICC and IOZ reduced by 50% s Multiplexer expansion by tying outputs together s Noninverting 3-STATE outputs s Outputs source/sink 24 mA s ACT257 has TTL-compatible inputs Ordering Code: Order Number Package Number Package Description 74AC257SC M16A 16-Lead Small Outline Integrated Circuit SOIC , JEDEC MS-012, Narrow Body 74AC257SJ M16D 16-Lead Small Outline Package SOP , EIAJ TYPE II, 5.3mm Wide 74AC257MTC MTC16 16-Lead Thin Shrink Small Outline Package TSSOP , JEDEC MO-153, 4.4mm Wide 74AC257PC N16E 16-Lead Plastic Dual-In-Line Package PDIP , JEDEC MS-001, Wide 74ACT257SC M16A 16-Lead Small Outline Integrated Circuit SOIC , JEDEC MS-012, Narrow Body 74ACT257SJ M16D 16-Lead Small Outline Package SOP , EIAJ TYPE II, 5.3mm Wide 74ACT257MTC MTC16 16-Lead Thin Shrink Small Outline Package TSSOP , JEDEC MO-153, 4.4mm Wide 74ACT257PC N16E 16-Lead Plastic Dual-In-Line Package PDIP , JEDEC MS-001, Wide Device also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering code. Logic Symbols Connection Diagram IEEE/IEC Pin Descriptions Pin Names S OE Description Common Data Select Input 3-STATE Output Enable Input Data Inputs from Source 0 Data Inputs from Source 1 3-STATE Multiplexer Outputs is a trademark of Fairchild Semiconductor Corporation. 1999 Fairchild Semiconductor Corporation DS009949 74AC257 • 74ACT257 Functional Description The AC/ACT257 is quad 2-input multiplexer with 3-STATE outputs. It selects four bits of data from two sources under control of a Common Data Select input. When the Select input is LOW, the I0x inputs are selected and when Select is HIGH, the I1x inputs are selected. The data on the selected inputs appears at the outputs in true noninverted form. The device is the logic implementation of a 4-pole, 2position switch where the position of the switch is determined by the logic levels supplied to the Select input. The logic equations for the outputs are as follows: Za = OE • 11a • S + I0a • S Zb = OE • 11b • S + I0b • S Zc = OE • 11c • S + I0c • S Zd = OE • 11d • S + I0d • S When the Output Enable OE is HIGH, the outputs are forced to a high impedance state. If the outputs are tied together, all but one device must be in the high impedance state to avoid high currents that would exceed the maximum ratings. Designers should ensure the Output Enable signals to 3-STATE devices whose outputs are tied together are designed so there is no overlap. Truth Table Output Enable OE H L Select Input S X H L H = HIGH Voltage Level L = LOW Voltage Level X = Immaterial Z = High Impedance Data Inputs Outputs Z L H L H Logic Diagram Please note that this diagram is provided only for the understanding of logic operations and should not be used to estimate propagation delays. 74AC257 • 74ACT257 Absolute Maximum Ratings Note 1 Supply Voltage VCC DC Input Diode Current IIK VI = −0.5V VI = VCC +0.5V DC Input Voltage VI DC Output Diode Current IOK VO = −0.5V VO = VCC +0.5V DC Output Voltage VO DC Output Source ort Sink Curren IO DC VCC or Ground Current Per Output Pin ICC or IGND Storage Temperature TSTG Junction Temperature TJ PDIP −0.5V to +7.0V −20 mA +20 mA −0.5V to VCC + 0.5V −20 mA +20 mA −0.5V to VCC + 0.5V ±50 mA ±50 mA −65°C to +150°C

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74AC257
• 74ACT257 Quad 2-Input Multiplexer with 3-STATE Outputs
74AC257
• 74ACT257 Quad 2-Input Multiplexer with 3-STATE Outputs

The AC/ACT257 is a quad 2-input multiplexer with 3STATE outputs. Four bits of data from two sources can be selected using a Common Data Select input. The four outputs present the selected data in true noninverted form. The outputs may be switched to a high impedance state by placing a logic HIGH on the common Output Enable OE input, allowing the outputs to interface directly with bus-oriented systems.
s ICC and IOZ reduced by 50% s Multiplexer expansion by tying outputs together s Noninverting 3-STATE outputs s Outputs source/sink 24 mA s ACT257 has TTL-compatible inputs
Ordering Code:

Order Number Package Number

Package Description
74AC257SC

M16A
16-Lead Small Outline Integrated Circuit SOIC , JEDEC MS-012, Narrow Body
74AC257SJ

M16D
16-Lead Small Outline Package SOP , EIAJ TYPE II, 5.3mm Wide
74AC257MTC

MTC16
16-Lead Thin Shrink Small Outline Package TSSOP , JEDEC MO-153, 4.4mm Wide
74AC257PC

N16E
16-Lead Plastic Dual-In-Line Package PDIP , JEDEC MS-001, Wide
74ACT257SC

M16A
16-Lead Small Outline Integrated Circuit SOIC , JEDEC MS-012, Narrow Body
74ACT257SJ

M16D
16-Lead Small Outline Package SOP , EIAJ TYPE II, 5.3mm Wide
74ACT257MTC

MTC16
16-Lead Thin Shrink Small Outline Package TSSOP , JEDEC MO-153, 4.4mm Wide
74ACT257PC

N16E
16-Lead Plastic Dual-In-Line Package PDIP , JEDEC MS-001, Wide
Device also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering code.

Logic Symbols

Connection Diagram

IEEE/IEC

Pin Descriptions

Pin Names S OE

Description Common Data Select Input 3-STATE Output Enable Input Data Inputs from Source 0 Data Inputs from Source 1 3-STATE Multiplexer Outputs
is a trademark of Fairchild Semiconductor Corporation.
1999 Fairchild Semiconductor Corporation DS009949
74AC257
• 74ACT257

Functional Description

The AC/ACT257 is quad 2-input multiplexer with 3-STATE outputs. It selects four bits of data from two sources under control of a Common Data Select input. When the Select input is LOW, the I0x inputs are selected and when Select is HIGH, the I1x inputs are selected. The data on the selected inputs appears at the outputs in true noninverted form. The device is the logic implementation of a 4-pole, 2position switch where the position of the switch is determined by the logic levels supplied to the Select input. The logic equations for the outputs are as follows:

Za = OE
• 11a
• S + I0a
• S

Zb = OE
• 11b
• S + I0b
• S

Zc = OE
• 11c
• S + I0c
• S

Zd = OE
• 11d
• S + I0d
• S

When the Output Enable OE is HIGH, the outputs are forced to a high impedance state. If the outputs are tied together, all but one device must be in the high impedance state to avoid high currents that would exceed the maximum ratings. Designers should ensure the Output Enable signals to 3-STATE devices whose outputs are tied together are designed so there is no overlap.

Truth Table

Output Enable

OE H L

Select Input

S X H L

H = HIGH Voltage Level L = LOW Voltage Level X = Immaterial Z = High Impedance

Data

Inputs

Outputs

Z L H L H

Logic Diagram

Please note that this diagram is provided only for the understanding of logic operations and should not be used to estimate propagation delays.
74AC257
• 74ACT257

Absolute Maximum Ratings Note 1

Supply Voltage VCC DC Input Diode Current IIK

VI = −0.5V VI = VCC +0.5V DC Input Voltage VI DC Output Diode Current IOK VO = −0.5V VO = VCC +0.5V DC Output Voltage VO DC Output Source ort

Sink Curren IO DC VCC or Ground Current

Per Output Pin ICC or IGND Storage Temperature TSTG Junction Temperature TJ

PDIP
−0.5V to +7.0V
−20 mA +20 mA −0.5V to VCC + 0.5V
−20 mA +20 mA −0.5V to VCC + 0.5V
±50 mA
±50 mA −65°C to +150°C

More datasheets: 74AC125SJ | 74AC125SJX | 74AC125MTC | 2419 | GPF17.0 | ROB0081 | KIT0019 | 3233 | 74AC257SC | 74AC257PC

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Datasheet ID: 74AC257SCX 513092