74AC251MTC

74AC251MTC Datasheet

74AC251<br>• 74ACT251 8-Input Multiplexer with 3-STATE Output

Part	Datasheet
74AC251MTC	74AC251MTC (pdf)

Related Parts	Information
74ACT251PC	74ACT251PC
74ACT251SC	74ACT251SC
74AC251SJ	74AC251SJ
74AC251SJX	74AC251SJX
74AC251SCX	74AC251SCX
74ACT251MTC	74ACT251MTC
74ACT251MTCX	74ACT251MTCX
74AC251PC	74AC251PC
74AC251SC	74AC251SC
74ACT251SCX	74ACT251SCX
74AC251MTCX	74AC251MTCX

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74AC251 • 74ACT251 8-Input Multiplexer with 3-STATE Output 74AC251 • 74ACT251 8-Input Multiplexer with 3-STATE Output The AC/ACT251 is a high-speed 8-input digital multiplexer. It provides, in one package, the ability to select one bit of data from up to eight sources. It can be used as universal function generator to generate any logic function of four variables. Both true and complementary outputs are provided. s ICC reduced by 50% s Multifunctional capability s On-chip select logic decoding s Inverting and noninverting 3-STATE outputs s Outputs source/sink 24 mA s ACT251 has TTL-compatible inputs Ordering Code: Order Number Package Number Package Description 74AC251SC M16A 16-Lead Small Outline Integrated Circuit SOIC , JEDEC MS-012, Narrow Body 74AC251SJ M16D 16-Lead Small Outline Package SOP , EIAJ TYPE II, 5.3mm Wide 74AC251MTC MTC16 16-Lead Thin Shrink Small Outline Package TSSOP , JEDEC MO-153, 4.4mm Wide 74AC251PC N16E 16-Lead Plastic Dual-In-Line Package PDIP , JEDEC MS-001, Wide 74ACT251SC M16A 16-Lead Small Outline Integrated Circuit SOIC , JEDEC MS-012, Narrow Body 74ACT251MTC MTC16 16-Lead Thin Shrink Small Outline Package TSSOP , JEDEC MO-153, 4.4mm Wide 74ACT251PC N16E 16-Lead Plastic Dual-In-Line Package PDIP , JEDEC MS-001, Wide Device also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering code. Logic Symbols Connection Diagram IEEE/IEC Pin Descriptions Pin Names Select Inputs 3-STATE Output Enable Input Multiplexer Inputs 3-STATE Multiplexer Output Complementary 3-STATE Multiplexer Output is a trademark of Fairchild Semiconductor Corporation. 1999 Fairchild Semiconductor Corporation DS009945 74AC251 • 74ACT251 Functional Description Truth Table This device is a logical implementation of a single-pole, 8position switch with the switch position controlled by the Inputs Outputs state of three Select inputs, S0, S1, S2. Both true and com- plementary outputs are provided. The Output Enable input OE is active LOW. When it is activated, the logic function provided at the output is Z = OE • I0 • S0 • S1 • S2 + I1• S0 • S1 • S2 + I2 • S0 • S1 • S2 + I3 • S0 • S1 • S2 + I4 • S0 • S1 • S2 + I5 • S0 • S1 • S2 + I6 • S0 • S1 • S2 + I7 • S0 • S1 • S2 When the Output Enable is HIGH, both outputs are in the high impedance High Z state. This feature allows multiplexer expansion by tying the outputs of up to 128 devices together. When the outputs of the 3-STATE devices are tied together, all but one device must be in the high impedance state to avoid high currents that would exceed the maximum ratings. The Output Enable signals should be H = HIGH Voltage Level L = LOW Voltage Level designed to ensure there is no overlap in the active-LOW X = Immaterial portion of the enable voltages. Z = High Impedance Logic Diagram Please note that this diagram is provided only for the understanding of logic operations and should not be used to estimate propagation delays. 74AC251 • 74ACT251 Absolute Maximum Ratings Note 1 Supply Voltage VCC DC Input Diode Current IIK VI = −0.5V VI = VCC + 0.5V DC Input Voltage VI DC Output Diode Current IOK VO = −0.5V VO = VCC + 0.5V DC Output Voltage VO DC Output Source or Sink Current IO DC VCC or Ground Current per Output Pin ICC or IGND Storage Temperature TSTG Junction Temperature TJ PDIP −0.5V to +7.0V −20 mA +20 mA −0.5V to VCC + 0.5V

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74AC251
• 74ACT251 8-Input Multiplexer with 3-STATE Output
74AC251
• 74ACT251 8-Input Multiplexer with 3-STATE Output

The AC/ACT251 is a high-speed 8-input digital multiplexer. It provides, in one package, the ability to select one bit of data from up to eight sources. It can be used as universal function generator to generate any logic function of four variables. Both true and complementary outputs are provided.
s ICC reduced by 50% s Multifunctional capability s On-chip select logic decoding s Inverting and noninverting 3-STATE outputs s Outputs source/sink 24 mA s ACT251 has TTL-compatible inputs
Ordering Code:

Order Number Package Number

Package Description
74AC251SC

M16A
16-Lead Small Outline Integrated Circuit SOIC , JEDEC MS-012, Narrow Body
74AC251SJ

M16D
16-Lead Small Outline Package SOP , EIAJ TYPE II, 5.3mm Wide
74AC251MTC

MTC16
16-Lead Thin Shrink Small Outline Package TSSOP , JEDEC MO-153, 4.4mm Wide
74AC251PC

N16E
16-Lead Plastic Dual-In-Line Package PDIP , JEDEC MS-001, Wide
74ACT251SC

M16A
16-Lead Small Outline Integrated Circuit SOIC , JEDEC MS-012, Narrow Body
74ACT251MTC

MTC16
16-Lead Thin Shrink Small Outline Package TSSOP , JEDEC MO-153, 4.4mm Wide
74ACT251PC

N16E
16-Lead Plastic Dual-In-Line Package PDIP , JEDEC MS-001, Wide
Device also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering code.

Logic Symbols

Connection Diagram

IEEE/IEC

Pin Descriptions

Pin Names

Select Inputs 3-STATE Output Enable Input

Multiplexer Inputs 3-STATE Multiplexer Output

Complementary 3-STATE Multiplexer Output
is a trademark of Fairchild Semiconductor Corporation.
1999 Fairchild Semiconductor Corporation DS009945
74AC251
• 74ACT251

Functional Description

Truth Table

This device is a logical implementation of a single-pole, 8position switch with the switch position controlled by the

Inputs

Outputs
state of three Select inputs, S0, S1, S2. Both true and com-
plementary outputs are provided. The Output Enable input

OE is active LOW. When it is activated, the logic function
provided at the output is Z = OE
• I0
• S0
• S1
• S2 + I1• S0
• S1
• S2 +

I2
• S0
• S1
• S2 + I3
• S0
• S1
• S2 + I4
• S0
• S1
• S2 + I5
• S0
• S1
• S2 + I6
• S0
• S1
• S2 + I7
• S0
• S1
• S2

When the Output Enable is HIGH, both outputs are in the
high impedance High Z state. This feature allows multiplexer expansion by tying the outputs of up to 128 devices together. When the outputs of the 3-STATE devices are
tied together, all but one device must be in the high impedance state to avoid high currents that would exceed the
maximum ratings. The Output Enable signals should be

H = HIGH Voltage Level L = LOW Voltage Level
designed to ensure there is no overlap in the active-LOW X = Immaterial
portion of the enable voltages.

Z = High Impedance

Logic Diagram

Please note that this diagram is provided only for the understanding of logic operations and should not be used to estimate propagation delays.
74AC251
• 74ACT251

Absolute Maximum Ratings Note 1

Supply Voltage VCC DC Input Diode Current IIK

VI = −0.5V VI = VCC + 0.5V DC Input Voltage VI DC Output Diode Current IOK VO = −0.5V VO = VCC + 0.5V DC Output Voltage VO DC Output Source
or Sink Current IO DC VCC or Ground Current
per Output Pin ICC or IGND Storage Temperature TSTG Junction Temperature TJ

PDIP
−0.5V to +7.0V
−20 mA +20 mA −0.5V to VCC + 0.5V

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Datasheet ID: 74AC251MTC 513090