MPC940LAC

MPC940LAC Datasheet


Order this document by MPC940L/D

Part Datasheet
MPC940LAC MPC940LAC MPC940LAC (pdf)
Related Parts Information
MPC940LFAR2 MPC940LFAR2 MPC940LFAR2
MPC940LFA MPC940LFA MPC940LFA
PDF Datasheet Preview
Freescale Semiconductor, Inc...

MOTOROLA

Freescale Semiconductor, Inc.

SEMICONDUCTOR TECHNICAL DATA

Order this document by MPC940L/D

Low Voltage 1:18 Clock Distribution Chip

MPC940L

The MPC940L is a 1:18 low voltage clock distribution chip with 2.5V or 3.3V LVCMOS output capabilities. The device features the capability to select either a differential LVPECL or an LVCMOS compatible input. The 18 outputs are 2.5V or 3.3V LVCMOS compatible and feature the drive strength to drive series or parallel terminated transmission lines. With skews of 150ps, the MPC940L is ideal as a clock distribution chip for the most demanding of synchronous systems. The 2.5V outputs also make the device ideal for supplying clocks for a high performance microprocessor based design. For a similar device at a lower price/performance point the reader is referred to the MPC9109.

LOW VOLTAGE 1:18 CLOCK

DISTRIBUTION CHIP
• LVPECL or LVCMOS Clock Input
• 2.5V LVCMOS Outputs for Pentium II Microprocessor Support
• 150ps Maximum Skew
• Maximum Output Frequency of 250MHz
• LQFP Packaging
• Dual or Single Supply Device:
• Dual VCC Supply Voltage, 3.3V Core and 2.5V Output
• Single 3.3V VCC Supply Voltage for 3.3V Outputs
• Single 2.5V VCC Supply Voltage for 2.5V I/O

FA SUFFIX LQFP PACKAGE

CASE

With a low output impedance in both the HIGH and LOW logic states, the output buffers of the MPC940L are ideal for driving series terminated transmission lines. With a output impedance the 940L has the capability of driving two series terminated lines from each output. This gives the device an effective fanout of If a lower output impedance is desired please see the MPC942 data sheet.

The differential LVPECL inputs of the MPC940L allow the device to interface directly with a LVPECL fanout buffer like the MC100EP111 to build very wide clock fanout trees or to couple to a high frequency clock source. The LVCMOS input provides a more standard interface for applications requiring only a single clock distribution chip at relatively low frequencies. In addition, the two clock sources can be used to provide for a test clock interface as well as the primary system clock. A logic HIGH on the LVCMOS_CLK_Sel pin will select the LVCMOS level clock input. All inputs of the MPC940L have internal pullup/pulldown resistor so they can be left open if unused.

The MPC940L is a single or dual supply device. The device power supply offers a high degree of flexibility. The device can operate with a 3.3V core and 3.3V output, a 3.3V core and 2.5V outputs as well as a 2.5V core and 2.5V outputs. The LQFP package was chosen to optimize performance, board space and cost of the device. The LQFP has a 7x7mm body size with a conservative 0.8mm pin spacing.
01/01

Motorola, Inc. 2001

MPC940L

Freescale Semiconductor, Inc.

PECL_CLK LVCMOS_CLK

LVCMOS_CLK_Sel Internal Pulldown

LOGIC DIAGRAM

Pinout TQFP Top View

Q0 16

VCCI

GNDO Q5 Q4 Q3

VCCO Q2 Q1 Q0
24 23 22 21 20 19 18 17

MPC940L
12345678

VCCO Q12 Q13 Q14 GNDO Q15 Q16 Q17

FUNCTION TABLE

LVCMOS_CLK_Sel Input

PECL_CLK

LVCMOS_CLK

POWER SUPPLY VOLTAGES

Supply Pin

Voltage Level

VCCI VCCO
More datasheets: EGP10D-TP | EGP10B-TP | EGP10A-TP | DBMM-17W2S-A101 | SW-314-TB | DDMM50SFA101 | KPT7A22-55SEW | DBMZ13W3SN | MPC940LFAR2 | MPC940LFA


Notice: we do not provide any warranties that information, datasheets, application notes, circuit diagrams, or software stored on this website are up-to-date or error free. The archived MPC940LAC Datasheet file may be downloaded here without warranties.

Datasheet ID: MPC940LAC 635570