MPC926508SD

MPC926508SD Datasheet

Order number MPC926508/D Rev 2, 02/2004

Part	Datasheet
MPC926508SD	MPC926508SD (pdf)

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Freescale Semiconductor, Inc... Freescale Semiconductor, Inc. MOTOROLA SEMICONDUCTOR TECHNICAL DATA Networking Clock Source The MPC926508 is a low cost, low jitter, high performance clock synthesizer for networking applications. Using analog Phase-Locked Loop PLL techniques, the device accepts an input to produce multiple output clocks for networking chips, PCI devices, SDRAM, and ASICs. The MPC926508 outputs all have 0 ppm synthesis error. • Packaged in 20 pin narrow 150 mil SSOP QSOP • 25 or 125 MHz fundamental clock input or 25 MHz crystal input • Two output clocks • SDRAM frequencies of 100 and 133 MHz • Zero ppm synthesis error in all clocks • Full CMOS output swing with 25 mA output drive capability at TTL levels • Advanced, low power, sub-micron CMOS process • 3.3V operating voltage MPC926508 NETWORKING CLOCK SOURCE SD SUFFIX 20 LEAD SSOP CASE 1461 VDD GND SEL_25 SEL_CLK 25 MHz or 125 MHz clock or 25 MHz crys- talX1 Clock Synthesis and Control Circuitry Output Buffer OUT1 100 MHz Output Buffer OUT2 MHz Clock Buffer / Crystal Oscillator *Optional crystal capacitors are shown and may be required for tuning of initial accuracy determined once per board . Motorola, Inc. 2004 For More Information On This Product, Go to: MPC926508 Freescale Semiconductor, Inc. Table Function table Control SEL_25 SEL_CLK Default 1 0 125 XTAL 1 25 REF_CLK Freescale Semiconductor, Inc... SEL_CLK X1/ICLK OUT1 100 MHz MPC926508 OUT2 MHz SEL_25 NC = Not Connected Figure MPC926508 Pin Assignment

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Freescale Semiconductor, Inc...

Freescale Semiconductor, Inc.

MOTOROLA

SEMICONDUCTOR TECHNICAL DATA

Networking Clock Source

The MPC926508 is a low cost, low jitter, high performance clock synthesizer for networking applications. Using analog Phase-Locked Loop PLL techniques, the device accepts an input to produce multiple output clocks for networking chips, PCI devices, SDRAM, and ASICs. The MPC926508 outputs all have 0 ppm synthesis error.
• Packaged in 20 pin narrow 150 mil SSOP QSOP
• 25 or 125 MHz fundamental clock input or 25 MHz crystal input
• Two output clocks
• SDRAM frequencies of 100 and 133 MHz
• Zero ppm synthesis error in all clocks
• Full CMOS output swing with 25 mA output drive capability at TTL
levels
• Advanced, low power, sub-micron CMOS process
• 3.3V operating voltage

MPC926508

NETWORKING CLOCK SOURCE

SD SUFFIX 20 LEAD SSOP

CASE 1461

VDD GND

SEL_25 SEL_CLK
25 MHz or 125 MHz clock or 25 MHz crys-
talX1

Clock Synthesis and Control Circuitry

Output Buffer

OUT1 100 MHz

Output Buffer

OUT2 MHz

Clock Buffer / Crystal Oscillator
*Optional crystal capacitors are shown and may be required for tuning of initial accuracy determined once per board .

Motorola, Inc. 2004

For More Information On This Product, Go to:

MPC926508

Freescale Semiconductor, Inc.

Table Function table

Control SEL_25 SEL_CLK

Default 1
0 125 XTAL
1 25 REF_CLK

Freescale Semiconductor, Inc...

SEL_CLK

X1/ICLK

OUT1 100 MHz

MPC926508

OUT2 MHz

SEL_25

NC = Not Connected

Figure MPC926508 Pin Assignment

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Datasheet ID: MPC926508SD 635559