MC9S12H256 Device User Guide V01.20
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MC9S12H256VPVE (pdf) |
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MC9S12H256VFVE |
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MC9S12H128VFVE |
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MC9S12H256VFVER |
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MC9S12H128VPVE |
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MC9S12H256 Device User Guide V01.20 MC9S12H256 Device User Guide V01.20 Covers also MC9S12H128 Freescale Semiconductor Inc. DOCUMENT NUMBER 9S12H256BDGV1/D Number Date V01.00 07 MAR 03 APR 2001 2001 V01.01 10 MAI 2001 10 MAY 2001 V01.02 V01.03 V01.04 V01.05 14 MAY 2001 30 MAY 2001 11 JUN 2001 18 JUN 2001 14 MAY 2001 30 MAY 2001 11 JUN 2001 18 JUN 2001 V01.06 28 JUN 2001 28 JUN 2001 V01.07 12 JUL 2001 12 JUL 2001 V01.08 V01.09 V01.10 16 JUL 2001 03 AUG 2001 29 AUG 2001 16 JUL 2001 03 AUG 2001 29 AUG 2001 Author Description of Changes Initial version. - Minor formal corrections - Changed ATD coupling ratio to10-2 - Changed VDD5 to 4.5V - Removed 112-pin package references - Changed ATD Electrical Characteristics separate coupling ratio for positive and negative bulk current injection - Reinserted 112-pin package information. - Removed SRSv2 comment from preface - Corrected RESET pin to active low in table 2-1 - Adapted style and wording to 9DP256 device user guide - Minor format and wording improvements - Added SRAM data retention disclaimer - Changed Oscillator Characteristics tCQOUT max 2.5s and replaced Clock Monitor Time-out by Clock Monitor Failure Assert Frequency - Changed Self Clock Mode Frequency min 1MHz and max 5.5MHz |
More datasheets: HLMPD1019MP6 | HLMPD1019MP7 | HLMPK101MP4B | HLMPK101MP4A | HLMPK105 | HLMPD105A | HLMPK101 | HLMPD101A | LTL-4266N | MC9S12H256VFVE |
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