MC9S12DT128BCPV
MC9S12DT128BCPV Datasheet
MC9S12DT128B Device User Guide
| Part | Datasheet |
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MC9S12DT128BCPV |
MC9S12DT128BCPV (pdf) |
| Related Parts | Information |
|---|---|
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MC9S12DJ128BCFU |
MC9S12DJ128BCFU |
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MC9S12DG128BCPV |
MC9S12DG128BCPV |
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MC9S12DG128BCFU |
MC9S12DG128BCFU |
|
MC9S12DB128BCPV |
MC9S12DB128BCPV |
|
MC9S12DJ128BCPV |
MC9S12DJ128BCPV |
|
MC9S12DT128CPV |
MC9S12DT128CPV |
| PDF Datasheet Preview |
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| Freescale Semiconductor, Inc... Freescale Semiconductor, Inc. DOCUMENT NUMBER 9S12DT128BDGV1/D MC9S12DT128B Device User Guide V01.09 Covers also MC9S12DG128B, MC9S12DJ128B, MC9S12DB128B For More Information On This Product, Go to: Freescale Semiconductor, Inc... MC9S12DT128B Device User Semiconductor, Inc. Number Date V01.00 18 Jun 18 June 2001 2001 V01.01 23 July 2001 23 July 2001 V01.02 23 Sep 2001 23 Sep 2001 V01.03 12 Oct 2001 12 Oct 2001 V01.04 27 Feb 2002 27 Feb 2002 V01.05 4 Mar 2002 4 Mar 2002 V01.06 8 July 2002 22 July 2002 V01.07 V01.08 16 Aug 2002 12 Sep 2002 16 Aug 2002 12 Sep 2002 V01.09 31 Oct 2002 31 Oct 2002 Author Description of Changes The following figure provides an ordering number example for the MC9S12D128B devices. MC9S12 DJ128B C FU Package Option Temperature Option Device Title Controller Family Temperature Options C = to V = to M = to Package Options FU = 80QFP PV = 112LQFP Figure 0-1 Order Partnumber Example The following items should be considered when using a derivative. • Registers Do not write or read CAN1 registers after reset address range - if using a derivative without CAN1 see Table For More Information On This Product, Go to: Freescale Semiconductor, Inc... MC9S12DT128B Device User Semiconductor, Inc. Do not write or read BDLC registers after reset address range - if using a derivative without BDLC see Table Do not write or read IIC registers after reset address range - if using a derivative without IIC see Table Do not write or read Byteflight registers after reset address range - if using a derivative without Byteflight registers see Table • Interrupts Fill the four CAN1 interrupt vectors - according to your coding policies for unused interrupts, if using a derivative without CAN1 see Table Fill the BDLC interrupt vector according to your coding policies for unused interrupts, if using a derivative without BDLC see Table Fill the IIC interrupt vector according to your coding policies for unused interrupts, if using a derivative without IIC see Table Fill the four Byteflight interrupt vectors - according to your coding policies for unused interrupts, if using a derivative without Byteflight see Table • Ports The CAN1 pin functionality TXCAN1, RXCAN1 is not available on port PM3 and PM2, if using a derivative without CAN1 see Table The BDLC pin functionality TXB, RXB is not available on port PM1 and PM0, if using a derivative without BDLC see Table The IIC pin functionality SCL, SCA is not available on port PJ7 and PJ6, if using a derivative without IIC see Table The Byteflight pin functionality BF_PSLM, BF_PERR, BF_PROK, BF_PSYN, TX_BF, RX_BF is not available on port PM7, PM6, PM5, PM4, PM3 and PM2, if using a derivative without Byteflight see Table • Pins not available in 80 pin QFP package Port H In order to avoid floating nodes the ports should be either configured as outputs by setting the data direction register DDRH at to or enabling the pull resistors by writing a to the pull enable register PERH at Port J[1:0] Port J pull-up resistors are enabled out of reset on all four pins 7:6 and Therefore care must be taken not to disable the pull enables on PJ[1:0] by clearing the bits PERJ1 and PERJ0 at Port K Port K pull-up resistors are enabled out of reset, i.e. Bit 7 = PUKE = 1 in the register PUCR at Therefore care must be taken not to clear this bit. For More Information On This Product, Go to: Freescale Semiconductor, Inc... Freescale SemicondMuC9cSt1o2DrT,1I2n8BcD.evice User Guide V01.09 Port M[7:6] PM7:6 must be configured as outputs or their pull resistors must be enabled to avoid floating inputs. Port P6 PP6 must be configured as output or its pull resistor must be enabled to avoid a floating input. Port S[7:4] PS7:4 must be configured as outputs or their pull resistors must be enabled to avoid floating inputs. PAD[15:8] ATD1 channels Out of reset the ATD1 is disabled preventing current flows in the pins. Do not modify the ATD1 registers! Document References The Device User Guide provides information about the MC9S12DT128B device made up of standard HCS12 blocks and the HCS12 processor core. This document is part of the customer documentation. A complete set of device manuals also includes the HCS12 Core User Guide and all the individual Block User Guides of the implemented modules. In a effort to reduce redundancy all module specific information is located only in the respective Block User Guide. If applicable, special implementation details of the module are given in the block description sections of this document. See Table 0-2 for names and versions of the referenced documents throughout the Device User Guide. Table 0-2 Document References User Guide Version HCS12_V1.5 Core User Guide Clock and Reset Generator CRG Block User Guide Enhanced Capture Timer 16 Bit 8 Channel ECT_16B8C Block User Guide Analog to Digital Converter 10 Bit 8 Channel ATD_10B8C Block User Guide Inter IC Bus IIC Block User Guide Asynchronous Serial Interface SCI Block User Guide Serial Peripheral Interface SPI Block User Guide Pulse Width Modulator 8 Bit 8 Channel PWM_8B8C Block User Guide 128K Byte Flash FTS128K Block User Guide |
| More datasheets: 52400-22A | 52400-25A | 52400-22ALF | DBMAMT25P | DCMN17C5SNA197 | DAM3C3PN | MC9S12DJ128BCFU | MC9S12DG128BCPV | MC9S12DG128BCFU | MC9S12DB128BCPV |
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