MC92501GC

MC92501GC Datasheet


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SEMICONDUCTOR TECHNICAL DATA

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MC92501

Advance Information

ATM Cell Processor

The MC92501 is an Asynchronous Transfer Mode ATM Cell Processor layer device composed of dedicated high-performance ingress and egress cell processors combined with UTOPIA Level 2-compliant physical PHY and UTOPIA Level 1-compliant switch interface see Figure It integrates address translation, UPC/NPC, OAM, and statistical functions into a single semiconductor device. This second generation ATM cell processor in Motorola’s MC92500 series can be used both in the line cards used by the switching systems in the ATM network core and in the access multiplexer. The primary function of the MC92501 in either application is to provide ATM-layer cell processing and routing functions. The advanced ATM functionality permits simultaneous tranmission of voice, video, and data within broadband services such as high-speed Internet operations, LAN interconnections for commuters, and video-on-demand using a variety of applications such as Digital Subscriber Line Access Multiplexers DSLAMs , Wide-Area Networks WANs , Enterprise Switches, and Multi-service Platforms,

UTOPIA I/F

Ingress PHY

Interface

Multiple PHY support

Internal Scan

Ingress Cell Processing

VP and VC Address compression NPC/UPC Cell Counting OAM Operations Add Switch parameters Microprocessor Cell Insertion Microprocessor Cell Copying

Ingress SWT Interface

Independent clock

UTOPIA I/F

Microprocessor Interface

Cell Insertion Cell Extraction Configuration Regs. Maintenance Access

External Memory Interface

UTOPIA I/F

Egress PHY Interface

Multiple PHY support

Egress Cell Processing

Multicast Translation UPC/NPC Cell Counting OAM Operations Address translation Microprocessor Cell Insertion Microprocessor Cell Copying

FMC Generation

Egress SWT Interface

Independent clock

Extract overhead

UTOPIA I/F

Figure MC92501 Block Diagram

This document contains information on a new product. Specifications and information herein are subject to change without notice.

Preliminary Data
1998, 1999 MOTOROLA, INC.

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Table of Contents

ATM Cell Processor i Table of Contents ii For Technical Assistance. iii Data Sheet Conventions iii Features iv Product Documentation v
Ordering Information

MC92501 Data Sheet

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MC92501

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Data Sheet Conventions

This data sheet uses the following conventions:

OVERBAR

Used to indicate a signal that is active when pulled low For example, the RESET pin is active when low.
asserted

Means that a high true active high signal is high or that a low true active low signal is low
deasserted

Means that a high true active high signal is low or that a low true active low signal is high

Examples:

Signal/Symbol

Logic State

Signal State

Voltage

Note:

True

Asserted

VIL/VOL

False

Deasserted

VIH/VOH

True

Asserted

VIH/VOH

False

Deasserted

VIL/VOL

Values for VIL, VOL, VIH, and VOH are defined by individual product specifications.

MOTOROLA

MC92501 Data Sheet
Ordering Information

Part

Supply Voltage

MC92501
Table Ordering Information

Package Type

Glob-Top Ball Grid Array GTBGA

Pin Count

Order Number

MC92501GC

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MC92501 Data Sheet

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MC92501 Data Sheet

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Datasheet ID: MC92501GC 635505