MT8812AP1

MT8812AP1 Datasheet

ISO-CMOS MT8812 8 x 12 Analog Switch Array

Part	Datasheet
MT8812AP1	MT8812AP1 (pdf)

Related Parts	Information
MT8812AE1	MT8812AE1
MT8812APR1	MT8812APR1

PDF Datasheet Preview
• Internal control latches and address decoder • Short set-up and hold times • Wide operating voltage V to V • 14Vpp analog signal capability • RON max. VDD=14V, 25C • VDD=14V, 25C • Full CMOS switch for low distortion • Minimum feedthrough and crosstalk • Low power consumption ISO-CMOS technology • PBX systems • Mobile radio • Test equipment /instrumentation • Analog/digital multiplexers • Audio/Video switching ISO-CMOS MT8812 8 x 12 Analog Switch Array Data Sheet September 2011 Ordering Information MT8812AP1 44 Pin PLCC* MT8812APR1 44 Pin PLCC* MT8812AE1 40 Pin PDIP* Tubes Tape & Reel Tubes *Pb Free Matte Tin -0C to +70C The Zarlink MT8812 is fabricated in Zarlink’s ISOCMOS technology providing low power dissipation and high reliability. The device contains a 8 x12 array of crosspoint switches along with a 7 to 96 line decoder and latch circuits. Any one of the 96 switches can be addressed by selecting the appropriate seven input bits. The selected switch can be turned on or off by applying a logical one or zero to the DATA input. STROBE DATA RESET AX2 AX3 7 to 96 Decoder Latches 8 x 12 Switch Array Xi I/O i=0-11 Yi I/O i=0-7 Figure 1 - Functional Block Diagram Zarlink Semiconductor Inc. Zarlink, ZL and the Zarlink Semiconductor logo are trademarks of Zarlink Semiconductor Inc. Copyright 1997-2011, Zarlink Semiconductor Inc. All Rights Reserved. MT8812 Change Summary Changes from the August 2005 issue to the September 2011 issue. Data Sheet Item Ordering Information Change Removed leaded packages as per PCN notice. NC AX0 AX3 RESET AY2 Y3 VDD Y2 DATA Y1 Y0 Y3 1 AY2 2 RESET 3 AX3 4 AX0 5 NC 7 X6 8 X7 9 X8 10 X9 11 X10 12 X11 13 NC 14 Y7 15 NC 16 Y6 17 STROBE 18 Y5 19 VSS 20 40 VDD 39 Y2 38 DATA 37 Y1 36 NC 35 Y0 34 NC 33 X0 32 X1 31 X2 30 X3 29 X4 28 X5 27 NC 26 NC 25 AY1 24 AY0 23 AX2 22 AX1 21 Y4 1 44 43 42 41 40 39 38 NC 37 X0 X7 10 36 X1 X8 11 35 X2 X9 12 34 X3 X10 13 33 X4 X11 14 32 X5 NC 15 31 NC NC 16 30 NC NC 17 29 NC 18 19 20 21 22 23 24 25 26 27 28 Y7 Y6 STROBE Y5 VSS Y4 AX1 AX2 AY0 AY1 NC 40 PIN PLASTIC DIP Figure 2 - Pin Connections 44 PIN PLCC Pin Description Pin # Name 1 2 3 4,5 6,7 8-13 14 15 16 17 18 Y3 Analog Input/Output this is connected to the Y3 column of the switch array.

PDF Datasheet Preview

• Internal control latches and address decoder
• Short set-up and hold times
• Wide operating voltage V to V
• 14Vpp analog signal capability
• RON max. VDD=14V, 25C
• VDD=14V, 25C
• Full CMOS switch for low distortion
• Minimum feedthrough and crosstalk
• Low power consumption ISO-CMOS technology
• PBX systems
• Mobile radio
• Test equipment /instrumentation
• Analog/digital multiplexers
• Audio/Video switching

ISO-CMOS MT8812 8 x 12 Analog Switch Array

Data Sheet

September 2011
Ordering Information

MT8812AP1 44 Pin PLCC* MT8812APR1 44 Pin PLCC* MT8812AE1 40 Pin PDIP*

Tubes Tape & Reel Tubes
*Pb Free Matte Tin
-0C to +70C

The Zarlink MT8812 is fabricated in Zarlink’s ISOCMOS technology providing low power dissipation and high reliability. The device contains a 8 x12 array of crosspoint switches along with a 7 to 96 line decoder and latch circuits. Any one of the 96 switches can be addressed by selecting the appropriate seven input bits. The selected switch can be turned on or off by applying a logical one or zero to the DATA input.

STROBE

DATA RESET

AX2 AX3
7 to 96 Decoder

Latches
8 x 12 Switch Array

Xi I/O i=0-11

Yi I/O i=0-7

Figure 1 - Functional Block Diagram

Zarlink Semiconductor Inc. Zarlink, ZL and the Zarlink Semiconductor logo are trademarks of Zarlink Semiconductor Inc.

Copyright 1997-2011, Zarlink Semiconductor Inc. All Rights Reserved.

MT8812

Change Summary

Changes from the August 2005 issue to the September 2011 issue.

Data Sheet
Item Ordering Information

Change Removed leaded packages as per PCN notice.

NC AX0 AX3 RESET AY2 Y3 VDD Y2 DATA Y1 Y0

Y3 1 AY2 2 RESET 3 AX3 4 AX0 5

NC 7 X6 8 X7 9 X8 10 X9 11 X10 12 X11 13 NC 14 Y7 15 NC 16 Y6 17 STROBE 18

Y5 19 VSS 20
40 VDD 39 Y2 38 DATA 37 Y1
36 NC
35 Y0
34 NC 33 X0 32 X1 31 X2 30 X3 29 X4 28 X5 27 NC 26 NC 25 AY1 24 AY0 23 AX2
22 AX1 21 Y4
1 44 43 42 41 40 39
38 NC
37 X0

X7 10
36 X1

X8 11
35 X2

X9 12
34 X3

X10 13
33 X4

X11 14
32 X5

NC 15
31 NC

NC 16
30 NC

NC 17
29 NC
18 19 20 21 22 23 24 25 26 27 28

Y7 Y6 STROBE Y5 VSS Y4 AX1 AX2 AY0 AY1 NC
40 PIN PLASTIC DIP

Figure 2 - Pin Connections
44 PIN PLCC

Pin Description

Pin #

Name
1 2 3 4,5 6,7 8-13
14 15 16 17 18

Y3 Analog Input/Output this is connected to the Y3 column of the switch array.

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Datasheet ID: MT8812AP1 649080