Le5712
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LE57D121BTC (pdf) |
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LE57D122BTCT |
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LE57D121BTCT |
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LE57D122BTC |
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Le5712 Dual Subscriber Line Interface Circuit VE580 Series - Ideal for low-cost, high performance line card applications CO, DLC - Meets requirements for countries such as India, China, Korea, Japan, Taiwan, and Australia - Meets requirements for North America DLC applications TR-57-CORE - Dual-Channel SLIC device with small footprint - Loop start and Ground start support - +5 V and battery supply required - Optional dual battery operation - to V battery operation - Supplies more than 20 mA into 2000 from V - Programmable current limit - On-chip Thermal Management TMG feature in all Active states - Low standby power 24 mW per channel - Supports Vrms metering applications - Control states Active and Active Metering Normal and ORDERING INFORMATION The innovative Le5712 dual-channel SLIC device is designed for high-density POTS applications requiring a small-footprint, low-power SLIC device. By combining a fully featured line interface of two channels into one SLIC device, the Le5712 device enables the design of a low-cost, high performance, and fully programmable line interface for multiple country applications worldwide, including Ground Start and metering capability. The on-chip Thermal Management TMG feature allows for significantly reduced power dissipation on the device. Optional dual battery operation to reduce total power consumption is also available. The device is offered in a thermally efficient, space-saving 44-pin eTQFP package. The 12 x 12 mm footprint allows designers to make a dramatic increase in the density of lines on a board. The Le5712 device is also designed to significantly reduce the number of external components required for line card design. Zarlink offers a range of compatible SLAC devices that perform the codec function in a line card. In particular, the Zarlink Quad and Octal SLAC devices combined with the Le5712 device provides a programmable line circuit that can be configured for varying requirements. RELATED LITERATURE - 081110 Thermal Management for the Le5711 and Le5712 SLIC Devices Application Note - 080900 Le5711 and Le5712 Comparison Brief Application Note - 080753 Le58QL02/021/031 QLSLAC Data Sheet - 080754 Le58QL061/063 QLSLAC Data Sheet - 080921 Le58083 Octal SLAC Data Sheet - 080676 Le5711 Dual SLIC Data Sheet BLOCK DIAGRAM FLT 2 C3 2 C2 C1 2 DET 2 CAS IREF RD DET C11 C21 C31 FLT 1 Device Le57D121BTC Le57D122BTC Package Type1 Packing2 Tray The green package meets RoHS Directive 2002/95/EC of the European Council to minimize the environmental impact of electrical equipment. For delivery using a tape and reel packing system, add a "T" suffix to the OPN Ordering Part Number when placing an order. CH2 Fault Detector TMG 2 AD2 HP2 BD2 CH2 2-W Interface CH2 Input Decoder and Control Common Bias CH1 Fault Detector CH1 Input Decoder and Control CH1 2-W Interface TMG 1 AD 1 HP 1 BD 1 VTX2 VTX 1 Signal Transmission Power Feed Controller Off-Hook & Ground Start Detector Ring Trip Detector Ring Trip Detector Off-Hook & Ground Start Detector Power Feed Controller Signal Transmission RSN 2 BGND 2 RSN 1 BGND 1 120402 VBAT CDC VBREF DB 2 DAC DB 1 VCC CDC 1 AGND/ DGND Document ID# 081047 Date Sep 18, 2007 Version 2 Distribution Public Document Le5712 Data Sheet TABLE OF CONTENTS Applications Features Ordering Information Description. Related Literature Block Diagram Product Description Block Descriptions Zarlink Semiconductor Inc. Le5712 Data Sheet PRODUCT DESCRIPTION BLOCK DESCRIPTIONS Two-Wire Interface The two-wire interface provides DC current and sends voice and signalling information to a customer premise equipment. The two-wire interface also receives the returning signals from the customer premise equipment. This block implements the thermal management feature, which allows power that would otherwise be dissipated within the package to be off loaded into an external resistor when the line is Off Hook. RTMGi is connected from TMGi to the VBAT pin and limits power within the SLIC device Note "i" denotes channel number . The minimum value of RTMGi is given by: RTMG ILIMITMIN 3 mA where ILIMITMIN is the minimum programmed loop current limit and RLMIN is the minimum loop resistance. The tolerance of RTMG should be taken into account when selecting a value that meets this requirement. For example, if BATMAX = -56 V, ILOOPMIN = 30 mA and RLMIN = 200 then RTMG = is the minimum recommended value. A value of with 5% accuracy will keep the power in RTMG below W, and the total worst case SLIC power dissipation with both channels active below W. The power dissipated in the TMG resistor is given by: PRTMG where IL is the loop current, and RL is the loop resistance. The maximum power on RTMG is given by: PRTMGmax And the power dissipated per channel in the SLIC device while in the Active states is given by: PSLICi + BAT IL RL 40 IL -------I------- RTMG 5 IL RL + 2RF + The maximum power dissipated per channel in the SLIC device while in the Active states is given by: PSLICmaxi I---L---I--M----I--T----m---a---x2 -I--L---I--M----I--T---m-----a--x2 Refer to the Thermal Management for the Le5711 and Le7512 Dual SLIC Devices Application Note for further analysis and for dual battery condition. Zarlink Semiconductor Inc. Le5712 Data Sheet Signal Transmission The RSNi input current controls the receive current sent to the two-wire interface. The AC line voltage is sensed by a differential amplifier between the ADi and HPi leads. The output of this amplifier is equal to the AC metallic components of the line voltages and is output at VTXi. The desired two-wire AC input impedance, Z2WIN, is defined by the fuse resistors, RF, and an impedance connected from VTXi to RSNi, ZTi. When computing ZTi, the internal current amplifier pole and any external stray capacitance between VTX and RSN must be taken into account. 5----0--0-3 Z2WIN To set the desired receive gain G42L into a load ZL from VRXi, ZRXi is connected from VRXi to RSNi, where ZRXi ----Z----L---- • • Added green package OPNs to Ordering Information, on page 1 • Added Package Assembly, on page 8 • Removed Le57D123 and Le57D124 devices from Ordering Information, on page Removed descriptions related to Le57D123 and Le57D124, such as old note 2 on page The notes on page 12 are re-arranged that are applicable to page 9, page 10, and page • Removed non-green OPNs from Ordering Information, on page • Modified descriptions regarding FLTs in Pin Descriptions, on page • Updated and added note about package marking in Physical Dimensions, on page • Separated parts list for with and without metering applications, on page 19 and • Added Note 1 to Pin Descriptions, on page • Rearranged notes on page 12 and applicable notes in tables on pages 9, 10, and • Added Application Circuit Parts List Pots with no metering , on page • Modified Application Circuit Parts List Pots with metering , on page • Added new headers/footers due to Zarlink purchase of Legerity on August 3, 2007 Zarlink Semiconductor Inc. For more information about all Zarlink products visit our Web Site at Information relating to products and services furnished herein by Zarlink Semiconductor Inc. or its subsidiaries collectively “Zarlink” is believed to be reliable. However, Zarlink assumes no liability for errors that may appear in this publication, or for liability otherwise arising from the application or use of any such information, product or service or for any infringement of patents or other intellectual property rights owned by third parties which may result from such application or use. Neither the supply of such information or purchase of product or service conveys any license, either express or implied, under patents or other intellectual property rights owned by Zarlink or licensed from third parties by Zarlink, whatsoever. Purchasers of products are also hereby notified that the use of product in certain ways or in combination with Zarlink, or non-Zarlink furnished goods or services may infringe patents or other intellectual property rights owned by Zarlink. This publication is issued to provide information only and unless agreed by Zarlink in writing may not be used, applied or reproduced for any purpose nor form part of any order or contract nor to be regarded as a representation relating to the products or services concerned. The products, their specifications, services and other information appearing in this publication are subject to change by Zarlink without notice. No warranty or guarantee express or implied is made regarding the capability, performance or suitability of any product or service. Information concerning possible methods of use is provided as a guide only and does not constitute any guarantee that such methods of use will be satisfactory in a specific piece of equipment. It is the user’s responsibility to fully determine the performance and suitability of any equipment using such information and to ensure that any publication or data used is up to date and has not been superseded. Manufacturing does not necessarily include testing of all functions or parameters. These products are not suitable for use in any medical products whose failure to perform may result in significant injury or death to the user. All products and materials are sold and services provided subject to Zarlink’s conditions of sale which are available on request. Purchase of Zarlink’s I2C components conveys a license under the Philips I2C Patent rights to use these components in an I2C System, provided that the system conforms to the I2C Standard Specification as defined by Philips. Zarlink, ZL, the Zarlink Semiconductor logo and the Legerity logo and combinations thereof, VoiceEdge, VoicePort, SLAC, ISLIC, ISLAC and VoicePath are trademarks of Zarlink Semiconductor Inc. TECHNICAL DOCUMENTATION - NOT FOR RESALE |
More datasheets: H11D1S | H11D1 | CA02R28-21PWF80 | DDM50SNMK52 | 76650-0230 | PB-0927P-03Q | UMS05-1A80-75L | LE57D122BTCT | LE57D121BTCT | LE57D122BTC |
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