DS31408DK

DS31408DK Datasheet

The DS31408DK is an easy-to-use evaluation kit for the DS31408 timing IC. A surface-mounted DS31408 and careful layout provide maximum signal integrity. An onboard low-phase-noise stratum 3 quality oscillator is provided for device compliance evaluation. Additionally, the board can accept an external oscillator input for testing alternate oscillators and oscillator frequencies. All eight DS31408 input clocks are accessible via a combination of SMA and SMB connectors. These input clocks are terminated on board as four differential AC-coupled, and four single-ended DC-coupled inputs to allow easy evaluation of a wide range of input clock signal formats. All 14 DS31408 output clocks are accessible via a combination of SMA and SMB connectors to allow easy evaluation of the device’s CML, LVDS/LVPECL, and CMOS output clock signals. LEDs on the board indicate interrupt, DPLL lock, selected reference fail, and GPIO output status. Additionally, the GPIO, interrupt, and JTAG I/O signals are also accessible via header pins. Finally, an onboard microcontroller and USB interface provide easy configuration and monitoring of the DS31408 via a software application.

Part	Datasheet
DS31408DK	DS31408DK (pdf)

PDF Datasheet Preview
Data Sheet May 2012 The DS31408DK is an easy-to-use evaluation kit for the DS31408 timing IC. A surface-mounted DS31408 and careful layout provide maximum signal integrity. An onboard low-phase-noise stratum 3 quality oscillator is provided for device compliance evaluation. Additionally, the board can accept an external oscillator input for testing alternate oscillators and oscillator frequencies. All eight DS31408 input clocks are accessible via a combination of SMA and SMB connectors. These input clocks are terminated on board as four differential AC-coupled, and four single-ended DC-coupled inputs to allow easy evaluation of a wide range of input clock signal formats. All 14 DS31408 output clocks are accessible via a combination of SMA and SMB connectors to allow easy evaluation of the device’s CML, LVDS/LVPECL, and CMOS output clock signals. LEDs on the board indicate interrupt, DPLL lock, selected reference fail, and GPIO output status. Additionally, the GPIO, interrupt, and JTAG I/O signals are also accessible via header pins. Finally, an onboard microcontroller and USB interface provide easy configuration and monitoring of the DS31408 via a software application. Demo Kit Contents DS31408DK Board Power Supply USB Cable SMA-to-BNC and SMB-to-BNC Cable Adapters Ordering Information PART NUMBER DESCRIPTION DS31408DK Demo Kit for DS31408 DS31408 Demo Kit Soldered DS31408 for Best Signal Integrity SMA and SMB Connectors For Easy Connectivity Connectors and Termination for All Input and Output Clock Signals On-Board Stratum 3 Quality Local Oscillator with Footprints for Other TCXO an OCXO Sizes External Local Oscillator Testing Support LEDs for Interrupt, DPLL Lock, Selected Reference Fail, and GPIO Status Banana-Jack 5V and GND Connectors Support Use of Lab Power Supplies Easy-to-Read Silkscreen Labels Identify the Signals Associated with All Connectors, Jumpers, and LEDs Application Software Provides Easy GUI-Based Configuration and Monitoring of Most Common Device Features and Register Level Access to Entire Device Register Set Software Support for Creating and Running Configuration Scripts Saves Time During Evaluation and System Design Minimum System Requirements PC Running Windows XP or Windows 2000 Display with 1024x768 Resolution or Higher Available USB Port DS31408DK Table of Contents OVERVIEW 4 BOARD FLOORPLAN AND CONFIGURATION 4 POWER SUPPLY 5 USB CONNECTION 5 INPUT CLOCK CONNECTORS 5 OUTPUT CLOCK 5 ON-BOARD/EXTERNAL MCLKOSC CONFIGURATION 6 GPIO AND INTERRUPT 7 JTAG 7 DEFAULT HARDWARE CONFIGURATION 7 SOFTWARE INSTALLATION 8 SOFTWARE APPLICATION 8 USB VIRTUAL COM PORT DEVICE DRIVER 8 COMMAND LINE 8 SOFTWARE APPLICATION OVERVIEW 9 MAIN 9 INPUT CLOCK CONFIGURATION 12 DPLL CONFIGURATION AND STATUS MENU 13 OUTPUT CLOCK MENU OC1, OC2, AND OC3 14 OUTPUT CLOCK MENU OC4, OC5, OC6, AND OC7 15 1588 TIME ENGINE MENU 16 Providing a Reference Clock and Configuring the Time Engine 16 Timestamping an Input Signal Edge 16 Software/Hardware PLL 17 Programmable Event Generators PEGs 17 I/O PIN CONFIGURATION MENU 18 REGISTER VIEW MENU 19 CONFIGURATION SCRIPTS AND LOG FILE 20 Configuration Log File 20 Configuration 20 DS31408DK List of Figures Figure 1 Main Menu Window 9 Figure 2 Input Clock Configuration Menu 12 Figure 3 DPLL Configuration and Status Menu 13 Figure 4 Output Clock Configuration Menu OC1, OC2, and OC3 14 Figure 5 Output Clock Configuration Menu OC4, OC5, OC6, OC7 15 Figure 6 1588 Time Engine Menu 16 Figure 7 I/O Pin Configuration Menu 18 Figure 8 Register View Menu 19 List of Tables Table 1 DS31408DK Input Clock Connectors 5 Table 2 Output Clock 5 Table 3 MCLKOSC 6 Table 4 Switch SW2 MCLKOSC Frequency 7 Table 5 Default Hardware Configuration 7 Table 6 Example APLL Output Clock 14 DS31408DK Overview Board Floorplan and Configuration USB uP Plug. Pwr Supply CML clock outputs, highest speed, lowest jitter DS31408DK03A0 clock outputs clock inputs DS31408 clock outputs clock inputs oscillator, TCXO or OCXO frame sync inputs frame sync outputs When the board is oriented as shown above, the DS31408 is in the middle of the board, the input clock connectors are on the left side, and output clock connectors are on the right side. The DS31408's local oscillator is down and to the left of the DS31408. Power and ground banana jacks are top-center. The jack for the wall-plug 5V power supply is to the left of the 5V jack. The board microprocessor and USB interface jack are top-left. Frame sync inputs 2kHz or 8kHz are bottom-edge left, and 2kHz and 8kHz frame sync outputs are bottom-edge right. See section 8 for board schematics and bill of materials.

PDF Datasheet Preview

Data Sheet May 2012

The DS31408DK is an easy-to-use evaluation kit for the DS31408 timing IC. A surface-mounted DS31408 and careful layout provide maximum signal integrity. An onboard low-phase-noise stratum 3 quality oscillator is provided for device compliance evaluation. Additionally, the board can accept an external oscillator input for testing alternate oscillators and oscillator frequencies. All eight DS31408 input clocks are accessible via a combination of SMA and SMB connectors. These input clocks are terminated on board as four differential AC-coupled, and four single-ended DC-coupled inputs to allow easy evaluation of a wide range of input clock signal formats. All 14 DS31408 output clocks are accessible via a combination of SMA and SMB connectors to allow easy evaluation of the device’s CML, LVDS/LVPECL, and CMOS output clock signals. LEDs on the board indicate interrupt, DPLL lock, selected reference fail, and GPIO output status. Additionally, the GPIO, interrupt, and JTAG I/O signals are also accessible via header pins. Finally, an onboard microcontroller and USB interface provide easy configuration and monitoring of the DS31408 via a software application.

Demo Kit Contents

DS31408DK Board Power Supply USB Cable SMA-to-BNC and SMB-to-BNC Cable Adapters
Ordering Information

PART NUMBER DESCRIPTION

DS31408DK

Demo Kit for DS31408

DS31408 Demo Kit

Soldered DS31408 for Best Signal Integrity SMA and SMB Connectors For Easy Connectivity Connectors and Termination for All Input and

Output Clock Signals On-Board Stratum 3 Quality Local Oscillator with

Footprints for Other TCXO an OCXO Sizes External Local Oscillator Testing Support LEDs for Interrupt, DPLL Lock, Selected Reference

Fail, and GPIO Status Banana-Jack 5V and GND Connectors Support Use
of Lab Power Supplies Easy-to-Read Silkscreen Labels Identify the

Signals Associated with All Connectors, Jumpers, and LEDs Application Software Provides Easy GUI-Based Configuration and Monitoring of Most Common Device Features and Register Level Access to Entire Device Register Set Software Support for Creating and Running Configuration Scripts Saves Time During Evaluation and System Design

Minimum System Requirements

PC Running Windows XP or Windows 2000 Display with 1024x768 Resolution or Higher Available USB Port

DS31408DK

Table of Contents

OVERVIEW 4 BOARD FLOORPLAN AND CONFIGURATION 4

POWER SUPPLY 5 USB CONNECTION 5 INPUT CLOCK CONNECTORS 5 OUTPUT CLOCK 5 ON-BOARD/EXTERNAL MCLKOSC CONFIGURATION 6 GPIO AND INTERRUPT 7 JTAG 7 DEFAULT HARDWARE CONFIGURATION 7 SOFTWARE INSTALLATION 8 SOFTWARE APPLICATION 8 USB VIRTUAL COM PORT DEVICE DRIVER 8 COMMAND LINE 8 SOFTWARE APPLICATION OVERVIEW 9 MAIN 9 INPUT CLOCK CONFIGURATION 12 DPLL CONFIGURATION AND STATUS MENU 13 OUTPUT CLOCK MENU OC1, OC2, AND OC3 14 OUTPUT CLOCK MENU OC4, OC5, OC6, AND OC7 15 1588 TIME ENGINE MENU 16

Providing a Reference Clock and Configuring the Time Engine 16 Timestamping an Input Signal Edge 16 Software/Hardware PLL 17 Programmable Event Generators PEGs 17

I/O PIN CONFIGURATION MENU 18 REGISTER VIEW MENU 19 CONFIGURATION SCRIPTS AND LOG FILE 20

Configuration Log File 20 Configuration 20

DS31408DK

List of Figures

Figure 1 Main Menu Window 9 Figure 2 Input Clock Configuration Menu 12 Figure 3 DPLL Configuration and Status Menu 13 Figure 4 Output Clock Configuration Menu OC1, OC2, and OC3 14 Figure 5 Output Clock Configuration Menu OC4, OC5, OC6, OC7 15 Figure 6 1588 Time Engine Menu 16 Figure 7 I/O Pin Configuration Menu 18 Figure 8 Register View Menu 19

List of Tables

Table 1 DS31408DK Input Clock Connectors 5 Table 2 Output Clock 5 Table 3 MCLKOSC 6 Table 4 Switch SW2 MCLKOSC Frequency 7 Table 5 Default Hardware Configuration 7 Table 6 Example APLL Output Clock 14

DS31408DK

Overview

Board Floorplan and Configuration

USB uP

Plug. Pwr Supply

CML clock outputs, highest speed, lowest jitter

DS31408DK03A0
clock outputs
clock inputs

DS31408
clock outputs
clock inputs
oscillator, TCXO or OCXO
frame sync inputs
frame sync outputs

When the board is oriented as shown above, the DS31408 is in the middle of the board, the input clock connectors are on the left side, and output clock connectors are on the right side. The DS31408's local oscillator is down and to the left of the DS31408. Power and ground banana jacks are top-center. The jack for the wall-plug 5V power supply is to the left of the 5V jack. The board microprocessor and USB interface jack are top-left. Frame sync inputs 2kHz or 8kHz are bottom-edge left, and 2kHz and 8kHz frame sync outputs are bottom-edge right. See section 8 for board schematics and bill of materials.

Notice: we do not provide any warranties that information, datasheets, application notes, circuit diagrams, or software stored on this website are up-to-date or error free. The archived DS31408DK Datasheet file may be downloaded here without warranties.

Datasheet ID: DS31408DK 648950