VSC9295YSM

VSC9295YSM Datasheet

VSC9295, VSC9292

Part	Datasheet
VSC9295YSM	VSC9295YSM (pdf)

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NETWORK PRODUCTS VSC9295, VSC9292 340 Gbps 136 x 136 and 170 Gbps 68 x68 TSI Switches with Dual Rate 2.5G/622M I/O BENEFITS: 4Allows Highest Capacity Sonet/SDH Systems Increasing Traffic, Lowering Cost of Deployment 4Saves Power Budget & Lowers Overall System Power Needs 4Allows Standardization on One Hardware and Software Platform Optimizing Development Resources 4Compatibility with Widely Deployed 622M I/O Based Backplanes, Port Cards and ASICs SPECIFICATIONS: 4340 Gbps Aggregate Bandwidth 4Dual Rate TFI-5 Compliant Gbps & 622 Mbps High-speed Interfaces FEATURES 4Industry Highest Capacity Single Chip TSI - 340 Gbps 425% Less Power Consumption Over Comparable Solutions 4Scalable to Tbps 4Dual Rate G / 622 M Standards Based I/O APPLICATIONS: 4Dual +2.5V/1.2V Power Supply 4Power Dissipation 19W typ , 26W max when VSC9295 is fully utilized with Power-down for Unused Channels 4 mm 1072 fcBGA Package 453 MHz 16-bit CPU Interface BLOCK DIAGRAM: 4Core/Metro Networks 4Core/Metro Transport 4DWDM Switches 4Central Switch in 170 Gbps to 340 Gbps STS-1 Grooming Fabric 4Switch Element for 680 Gbps to Tbps STS-1 Grooming Fabric 4Bit-slicing Engine for 680 Gbps to Tbps STS-1 Grooming Fabric 4Ingress/Egress Device for Multi-terabit STS-1 Grooming Clos Fabric PB-VSC9292/9295-001 VSC9295, VSC9292 340 Gbps 136 x 136 and 170 Gbps 68 x68 TSI Switches with Dual Rate 2.5G/622M I/O GENERAL DESCRIPTION: The VSC9295 is a 136 x 136 TSI switch IC supporting TFI-5 STS-48-like frame data on every input and output. All data inputs and outputs are differential serial signals running at Gbps or 622 Mbps for TDM switching, or Gbps, Gbps, and 622 Mbps for transparent switching. The device contains a fully nonblocking STS-1 switch matrix surrounded by serial backplane interfaces that incorporate fully integrated clock recovery and synthesis, input equalization, output pre-emphasis, SONET/SDH compliant scrambling, framing, deskewing, and alarms. Ports to drop and insert overhead bytes are included. A multimode CPU interface is used for device configuration and status monitoring. APPLICATION DIAGRAM VSC9292 in a 170G Application SONET PHY SONET/SDH Pointer Processor SONET/SDH e Backplane Transceiver e Protection Switch Working Switch S VSC9292 e 170G TSI e 3264 x s 3264 STS-1 VSC9295 in a 340G Application

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NETWORK PRODUCTS

VSC9295, VSC9292
340 Gbps 136 x 136 and 170 Gbps 68 x68 TSI Switches with Dual Rate 2.5G/622M I/O

BENEFITS:
4Allows Highest Capacity Sonet/SDH Systems Increasing Traffic, Lowering Cost of Deployment
4Saves Power Budget & Lowers Overall System Power Needs
4Allows Standardization on One Hardware and Software Platform Optimizing Development Resources
4Compatibility with Widely Deployed 622M I/O Based Backplanes, Port Cards and ASICs

SPECIFICATIONS:
4340 Gbps Aggregate Bandwidth
4Dual Rate TFI-5 Compliant Gbps & 622 Mbps High-speed Interfaces

FEATURES 4Industry Highest Capacity Single Chip TSI - 340 Gbps 425% Less Power Consumption Over Comparable Solutions 4Scalable to Tbps 4Dual Rate G / 622 M Standards Based I/O

APPLICATIONS:
4Dual +2.5V/1.2V Power Supply 4Power Dissipation 19W typ , 26W max when VSC9295 is fully utilized
with Power-down for Unused Channels 4 mm 1072 fcBGA Package 453 MHz 16-bit CPU Interface

BLOCK DIAGRAM:
4Core/Metro Networks
4Core/Metro Transport
4DWDM Switches
4Central Switch in 170 Gbps to 340 Gbps STS-1 Grooming Fabric
4Switch Element for 680 Gbps to Tbps STS-1 Grooming Fabric
4Bit-slicing Engine for 680 Gbps to Tbps STS-1 Grooming Fabric
4Ingress/Egress Device for Multi-terabit STS-1 Grooming Clos Fabric

PB-VSC9292/9295-001

VSC9295, VSC9292
340 Gbps 136 x 136 and 170 Gbps 68 x68 TSI Switches with Dual Rate 2.5G/622M I/O

GENERAL DESCRIPTION:

The VSC9295 is a 136 x 136 TSI switch IC supporting TFI-5 STS-48-like frame data on every input and output. All data inputs and outputs are differential serial signals running at Gbps or 622 Mbps for TDM switching, or Gbps, Gbps, and 622 Mbps for transparent switching. The device
contains a fully nonblocking STS-1 switch matrix surrounded by serial backplane interfaces that incorporate fully integrated clock recovery and synthesis, input equalization, output pre-emphasis, SONET/SDH compliant scrambling, framing, deskewing, and alarms. Ports to drop and insert overhead bytes are included. A multimode CPU interface is used for device configuration and status monitoring.

APPLICATION DIAGRAM VSC9292 in a 170G Application

SONET PHY

SONET/SDH Pointer

Processor

SONET/SDH e

Backplane

Transceiver e

Protection Switch

Working Switch

S VSC9292 e 170G TSI
e 3264 x s 3264 STS-1

VSC9295 in a 340G Application

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Datasheet ID: VSC9295YSM 649206