MT48H16M32L2F5-8 IT

MT48H16M32L2F5-8 IT Datasheet

MT48LC16M32L2 4 Meg x 32 x 4 Banks MT48V16M32L2 4 Meg x 32 x 4 Banks MT48H16M32L2 4 Meg x 32 x 4 Banks

Part	Datasheet
MT48H16M32L2F5-8 IT	MT48H16M32L2F5-8 IT (pdf)

Related Parts	Information
MT48H16M32L2F5-8 TR	MT48H16M32L2F5-8 TR
MT48H16M32L2F5-10 TR	MT48H16M32L2F5-10 TR
MT48H16M32L2B5-10 IT TR	MT48H16M32L2B5-10 IT TR
MT48H16M32L2B5-10 IT	MT48H16M32L2B5-10 IT
MT48H16M32L2F5-8 IT TR	MT48H16M32L2F5-8 IT TR
MT48H16M32L2B5-10 TR	MT48H16M32L2B5-10 TR
MT48H16M32L2B5-8	MT48H16M32L2B5-8
MT48H16M32L2B5-8 IT	MT48H16M32L2B5-8 IT
MT48H16M32L2B5-8 IT TR	MT48H16M32L2B5-8 IT TR
MT48H16M32L2B5-8 TR	MT48H16M32L2B5-8 TR
MT48H16M32L2F5-10	MT48H16M32L2F5-10
MT48H16M32L2F5-10 IT	MT48H16M32L2F5-10 IT
MT48H16M32L2F5-10 IT TR	MT48H16M32L2F5-10 IT TR
MT48H16M32L2F5-8	MT48H16M32L2F5-8
MT48H16M32L2B5-10	MT48H16M32L2B5-10

PDF Datasheet Preview
512Mb x32 TwinDie Mobile SDRAM Addendum Features Mobile SDRAM MT48LC16M32L2 4 Meg x 32 x 4 Banks MT48V16M32L2 4 Meg x 32 x 4 Banks MT48H16M32L2 4 Meg x 32 x 4 Banks • Low voltage power supply • Partial array self refresh power-saving mode • Temperature compensated self refresh TCSR • Deep power-down mode • Programmable output drive strength • Fully synchronous all signals registered on positive edge of system clock • Internal pipelined operation column address can be changed every clock cycle • Internal banks for hiding row access/precharge • Programmable burst lengths 1, 2, 4, 8, or full page • Auto precharge, includes concurrent auto precharge, and auto refresh modes • Self refresh mode standard and low power • 64ms, 8,192-cycle refresh • LVTTL-compatible inputs and outputs • Operating temperature range • Industrial -40°C to +85°C • Supports CAS latency of 1, 2, 3 Options Marking • VDD/VDDQ 3.3V/3.3V 2.5V/2.5V 1.8V/1.8V • Configuration 16M32 stacked die • Package/ballout Plastic package 90-ball FBGA 8mm x 13mm standard Plastic package 90-ball FBGA 8mm x 13mm lead-free • Timing cycle time 8ns at CL3 125 MHz 10ns at CL3 100 MHz • Temperature Commercial 0°C to +70°C No Marking Industrial -40°C to +85°C Addendum Changes The standard 256Mb SDRAM Mobile x32 data sheets should be referenced for a complete description of SDRAM functionality and operating modes. This addendum data sheet will concentrate on the key differences required to support the enhanced options of the TwinDie configuration. The Micron 256Mb Mobile X32 data sheet provides full specifications and functionality unless specified herein. Table 1 Key Timing Parameters Speed Grade -8 -10 Clock Access Time Access Time Frequency at CL = 3 at CL = 2 125 MHz 100 MHz 7.5ns 7.5ns 8.5ns 8.5ns Table 2 Configuration Architecture Configuration Refresh Count Row Addressing Bank Addressing Column Addressing 16 Meg x 32

PDF Datasheet Preview

512Mb x32 TwinDie Mobile SDRAM Addendum Features

Mobile SDRAM

MT48LC16M32L2 4 Meg x 32 x 4 Banks MT48V16M32L2 4 Meg x 32 x 4 Banks MT48H16M32L2 4 Meg x 32 x 4 Banks
• Low voltage power supply
• Partial array self refresh power-saving mode
• Temperature compensated self refresh TCSR
• Deep power-down mode
• Programmable output drive strength
• Fully synchronous all signals registered on positive
edge of system clock
• Internal pipelined operation column address can
be changed every clock cycle
• Internal banks for hiding row access/precharge
• Programmable burst lengths 1, 2, 4, 8, or full page
• Auto precharge, includes concurrent auto
precharge, and auto refresh modes
• Self refresh mode standard and low power
• 64ms, 8,192-cycle refresh
• LVTTL-compatible inputs and outputs
• Operating temperature range
• Industrial -40°C to +85°C
• Supports CAS latency of 1, 2, 3

Options

Marking
• VDD/VDDQ
3.3V/3.3V
2.5V/2.5V
1.8V/1.8V
• Configuration
16M32 stacked die
• Package/ballout

Plastic package 90-ball FBGA
8mm x 13mm standard

Plastic package 90-ball FBGA
8mm x 13mm lead-free
• Timing cycle time
8ns at CL3 125 MHz
10ns at CL3 100 MHz
• Temperature

Commercial 0°C to +70°C

No Marking

Industrial -40°C to +85°C

Addendum Changes

The standard 256Mb SDRAM Mobile x32 data sheets should be referenced for a complete description of SDRAM functionality and operating modes. This addendum data sheet will concentrate on the key differences required to support the enhanced options of the TwinDie configuration.

The Micron 256Mb Mobile X32 data sheet provides full specifications and functionality unless specified herein.

Table 1 Key Timing Parameters

Speed Grade
-8 -10

Clock Access Time Access Time Frequency at CL = 3 at CL = 2
125 MHz 100 MHz
7.5ns 7.5ns
8.5ns 8.5ns

Table 2 Configuration

Architecture

Configuration Refresh Count Row Addressing Bank Addressing Column Addressing
16 Meg x 32

Notice: we do not provide any warranties that information, datasheets, application notes, circuit diagrams, or software stored on this website are up-to-date or error free. The archived MT48H16M32L2F5-8IT Datasheet file may be downloaded here without warranties.

Datasheet ID: MT48H16M32L2F5-8IT 648459