MT41J256M16HA-093 J:E

MT41J256M16HA-093 J:E Datasheet

MT41J256M16 32 Meg x 16 x 8 Banks

Part	Datasheet
MT41J256M16HA-093 J:E	MT41J256M16HA-093 J:E (pdf)

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4Gb x16 DDR3 SDRAM Reduced tFAW Addendum Features DDR3 SDRAM Reduced tFAW Addendum MT41J256M16 32 Meg x 16 x 8 Banks • VDD = VDDQ = 1.5V ±0.075V • 1.5V center-terminated push/pull I/O • Differential bidirectional data strobe • 8n-bit prefetch architecture • Differential clock inputs CK, CK# • 8 internal banks • Nominal and dynamic on-die termination ODT for data, strobe, and mask signals • Programmable CAS READ latency CL • Posted CAS additive latency AL • Programmable CAS WRITE latency CWL based on tCK • Fixed burst length BL of 8 and burst chop BC of 4 via the mode register set [MRS] • Selectable BC4 or BL8 on-the-fly OTF • Self refresh mode • TC of 0°C to 95°C 64ms, 8192 cycle refresh at 0°C to 85°C 32ms, 8192 cycle refresh at 85°C to 95°C • Self refresh temperature SRT • Write leveling • Multipurpose register • Output driver calibration Options • Configuration 256 Meg x 16 • FBGA package Pb-free x16 96-ball 8mm x 14mm • Timing cycle time 938ps CL = 14 DDR3-2133 • Reduced tFAW = 30ns1 • Operating temperature Commercial 0°C TC +95°C Marking 256M16 HA -093 J None :E Standard DDR3-2133, 2KB page size, tFAW specification is 35ns. For complete device functionality and specifications, refer to the standard 4Gb DDR3 SDRAM data sheet found at The information in this data sheet supersedes the standard data sheet. Table 1 Key Timing Parameters Speed Grade Data Rate MT/s -093 2133 tFAW 30ns Target tRCD-tRP-CL 14-14-14 tRCD ns tRP ns CL ns Table 2 Addressing Parameter Configuration Refresh count Row addressing Bank addressing Column addressing Page size 256 Meg x 16 32 Meg x 16 x 8 banks 8K 32K A[14:0] 8 BA[2:0] 1K A[9:0] Micron Technology, Inc. reserves the right to change products or specifications without notice. 2013 Micron Technology, Inc. All rights reserved. Products and specifications discussed herein are subject to change by Micron without notice. 4Gb x16 DDR3 SDRAM Reduced tFAW Addendum Features Figure 1 DDR3 Part Numbers Example Part Number MT41J256M16HA-093 J:E MT41J Configuration Package

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4Gb x16 DDR3 SDRAM Reduced tFAW Addendum Features

DDR3 SDRAM Reduced tFAW Addendum

MT41J256M16 32 Meg x 16 x 8 Banks
• VDD = VDDQ = 1.5V ±0.075V
• 1.5V center-terminated push/pull I/O
• Differential bidirectional data strobe
• 8n-bit prefetch architecture
• Differential clock inputs CK, CK#
• 8 internal banks
• Nominal and dynamic on-die termination ODT
for data, strobe, and mask signals
• Programmable CAS READ latency CL
• Posted CAS additive latency AL
• Programmable CAS WRITE latency CWL based on
tCK
• Fixed burst length BL of 8 and burst chop BC of 4
via the mode register set [MRS]
• Selectable BC4 or BL8 on-the-fly OTF
• Self refresh mode
• TC of 0°C to 95°C
64ms, 8192 cycle refresh at 0°C to 85°C 32ms, 8192 cycle refresh at 85°C to 95°C
• Self refresh temperature SRT
• Write leveling
• Multipurpose register
• Output driver calibration

Options
• Configuration 256 Meg x 16
• FBGA package Pb-free x16 96-ball 8mm x 14mm
• Timing cycle time 938ps CL = 14 DDR3-2133
• Reduced tFAW = 30ns1
• Operating temperature Commercial 0°C TC +95°C

Marking
256M16 HA -093 J

None :E

Standard DDR3-2133, 2KB page size, tFAW specification is 35ns.

For complete device functionality and specifications, refer to the standard 4Gb DDR3 SDRAM data sheet found at The information in this data sheet supersedes the standard data sheet.

Table 1 Key Timing Parameters

Speed Grade Data Rate MT/s
-093
2133
tFAW 30ns

Target tRCD-tRP-CL 14-14-14
tRCD ns
tRP ns

CL ns

Table 2 Addressing

Parameter Configuration Refresh count Row addressing Bank addressing Column addressing Page size
256 Meg x 16 32 Meg x 16 x 8 banks
8K 32K A[14:0]
8 BA[2:0] 1K A[9:0]

Micron Technology, Inc. reserves the right to change products or specifications without notice. 2013 Micron Technology, Inc. All rights reserved.

Products and specifications discussed herein are subject to change by Micron without notice.
4Gb x16 DDR3 SDRAM Reduced tFAW Addendum Features

Figure 1 DDR3 Part Numbers

Example Part Number MT41J256M16HA-093 J:E

MT41J

Configuration

Package

Notice: we do not provide any warranties that information, datasheets, application notes, circuit diagrams, or software stored on this website are up-to-date or error free. The archived MT41J256M16HA-093J:E Datasheet file may be downloaded here without warranties.

Datasheet ID: MT41J256M16HA-093J:E 648387