MT41J512M8THD-15E:D

MT41J512M8THD-15E:D Datasheet

MT41J1G4 64 Meg x 4 x 8 Banks x 2 Ranks MT41J512M8 32 Meg x 8 x 8 Banks x 2 Ranks

Part	Datasheet
MT41J512M8THD-15E:D	MT41J512M8THD-15E:D (pdf)

Related Parts	Information
MT41J512M8THD-187E:D	MT41J512M8THD-187E:D
MT41J1G4THD-15E:D	MT41J1G4THD-15E:D

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4Gb x4, x8 TwinDie DDR3 SDRAM Functionality TwinDieTM DDR3 SDRAM MT41J1G4 64 Meg x 4 x 8 Banks x 2 Ranks MT41J512M8 32 Meg x 8 x 8 Banks x 2 Ranks For component data sheets, refer to Micron’s Web site: Functionality The 4Gb TwinDie DDR3 SDRAM uses Micron’s 2Gb DDR3 die and has similar functionality. This data sheet includes key timing parameters, ball assignments, a functional description, functional block diagrams, IDD specifications, and package dimensions. Refer to Micron’s 2Gb DDR3 SDRAM data sheet for complete specifications. Specifications for base part number MT41J512M4 correlate to TwinDie manufacturing part number MT41J1G4 specifications for base part number MT41J256M8 correlate to TwinDie manufacturing part number MT41J512M8. • Uses 2Gb Micron die • Two ranks includes dual CS#, ODT, CKE, and ZQ balls • Each rank has 8 internal banks • VDD = VDDQ = +1.5V ±0.075V • 1.5V center-terminated push/pull I/O • JEDEC-standard ball-out • Low-profile package • TC of 0°C to 95°C 0°C to 85°C 8192 refresh cycles in 64ms 85°C to 95°C 8192 refresh cycles in 32ms Options • Configuration 64 Meg x 4 x 8 banks x 2 ranks 32 Meg x 8 x 8 banks x 2 ranks • Timing cycle time1 1.5ns CL = 10 DDR3-1333 1.5ns CL = 9 DDR3-1333 1.87ns CL = 8 DDR3-1066 1.87ns CL = 7 DDR3-1066 2.5ns CL = 6 DDR3-800 2.5ns CL = 5 DDR3-800 • Self refresh Standard • Operating temperature Commercial 0°C TC 95°C Marking 1G4 512M8 -15 -15E -187 -187E -25 -25E None None :A :D Notes CL = CAS READ latency. Table 1 Key Timing Parameters Speed Grade -15 -15E -187 -187E -25 -25E Data Rate MT/s 1333 1066 800 Target tRCD-tRP-CL 10-10-10 9-9-9 8-8-8 7-7-7 6-6-6 5-5-5 tRCD ns tRP ns CL ns Micron Technology, Inc., reserves the right to change products or specifications without notice. 2008 Micron Technology, Inc. All rights reserved. Products and specifications discussed herein are subject to change by Micron without notice. Table 2 Addressing Parameter Configuration Refresh count Row address Bank address Column address 4Gb x4, x8 TwinDie DDR3 SDRAM Features 1024 Meg x 4 64 Meg x 4 x 8 banks x 2 ranks 8K 32K A[14:0] 8 BA[2:0] 2K A[11, 9:0] 512 Meg x 8 32 Meg x 8 x 8 banks x 2 ranks 8K

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4Gb x4, x8 TwinDie DDR3 SDRAM Functionality

TwinDieTM DDR3 SDRAM

MT41J1G4 64 Meg x 4 x 8 Banks x 2 Ranks MT41J512M8 32 Meg x 8 x 8 Banks x 2 Ranks

For component data sheets, refer to Micron’s Web site:

Functionality

The 4Gb TwinDie DDR3 SDRAM uses Micron’s 2Gb DDR3 die and has similar functionality. This data sheet includes key timing parameters, ball assignments, a functional description, functional block diagrams, IDD specifications, and package dimensions. Refer to Micron’s 2Gb DDR3 SDRAM data sheet for complete specifications. Specifications for base part number MT41J512M4 correlate to TwinDie manufacturing part number MT41J1G4 specifications for base part number MT41J256M8 correlate to TwinDie manufacturing part number MT41J512M8.
• Uses 2Gb Micron die
• Two ranks includes dual CS#, ODT, CKE, and

ZQ balls
• Each rank has 8 internal banks
• VDD = VDDQ = +1.5V ±0.075V
• 1.5V center-terminated push/pull I/O
• JEDEC-standard ball-out
• Low-profile package
• TC of 0°C to 95°C
0°C to 85°C 8192 refresh cycles in 64ms 85°C to 95°C 8192 refresh cycles in 32ms

Options
• Configuration 64 Meg x 4 x 8 banks x 2 ranks 32 Meg x 8 x 8 banks x 2 ranks
• Timing cycle time1 1.5ns CL = 10 DDR3-1333 1.5ns CL = 9 DDR3-1333 1.87ns CL = 8 DDR3-1066 1.87ns CL = 7 DDR3-1066 2.5ns CL = 6 DDR3-800 2.5ns CL = 5 DDR3-800
• Self refresh Standard
• Operating temperature Commercial 0°C TC 95°C

Marking
1G4 512M8
-15 -15E -187 -187E -25 -25E

None

None :A :D

Notes CL = CAS READ latency.

Table 1 Key Timing Parameters

Speed Grade
-15 -15E -187 -187E -25 -25E

Data Rate MT/s
1333 1066 800

Target tRCD-tRP-CL
10-10-10 9-9-9 8-8-8 7-7-7 6-6-6 5-5-5
tRCD ns
tRP ns

CL ns

Micron Technology, Inc., reserves the right to change products or specifications without notice. 2008 Micron Technology, Inc. All rights reserved.

Products and specifications discussed herein are subject to change by Micron without notice.

Table 2 Addressing

Parameter Configuration Refresh count Row address Bank address Column address
4Gb x4, x8 TwinDie DDR3 SDRAM Features
1024 Meg x 4
64 Meg x 4 x 8 banks x 2 ranks 8K
32K A[14:0] 8 BA[2:0]
2K A[11, 9:0]
512 Meg x 8
32 Meg x 8 x 8 banks x 2 ranks 8K

Notice: we do not provide any warranties that information, datasheets, application notes, circuit diagrams, or software stored on this website are up-to-date or error free. The archived MT41J512M8THD-15E:D Datasheet file may be downloaded here without warranties.

Datasheet ID: MT41J512M8THD-15E:D 648386