M58WR064KB70ZB6E

M58WR064KB70ZB6E Datasheet

M58WRxxxKT/B - 32Mb - 64Mb, 1.8V, x16 Multi Bank Burst, Flash Features

Part	Datasheet
M58WR064KB70ZB6E	M58WR064KB70ZB6E (pdf)

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M58WRxxxKT/B - 32Mb - 64Mb, 1.8V, x16 Multi Bank Burst, Flash Features M58WRxxxKT/B - 32Mb & 64Mb, 1.8V, x16 Multi Bank Burst, Flash M58WR032KT, M58WR064KT, M58WR032KB, M58WR064KB • Supply voltage VDD = 1.7V to 2V for PROGRAM, ERASE and READ VDDQ = 1.7V to 2V for I/O buffers VPP = 9V for fast program • SYCHRONOUS/ASYCHRONOUS READ SYCHRONOUS BURST READ mode 66 MHz Asynchronous/synchronous page READ mode Random access times 70ns • SYCHRONOUS BURST READ SUSPEND • Programming time 10µs by word typical for fast factory program Double/quadruple word program option Enhanced factory program options • Memory blocks Multiple bank memory array 4Mb banks Parameter blocks top or bottom location • Dual operations PROGRAM ERASE in one bank while read in others No delay between read and write operations • Block locking All blocks locked at power-up Any combination of blocks can be locked WP# for block lock-down • Security 128 bit user programmable OTP cells 64 bit unique device number • Common Flash interface CFI • 100,000 PROGRAM/ERASE cycles per block • Electronic signature • Manufacturer code 20h Device codes: M58WR032KT top 8814h M58WR032KB bottom 8815h M58WR064KT top 8810h M58WR064KB bottom 8811h • RoHS compliant packages available • Automotive Certified Parts Available Micron Technology, Inc., reserves the right to change products or specifications without notice. 2007 Micron Technology, Inc. All rights reserved. M58WRxxxKT/B - 32Mb - 64Mb, 1.8V, x16 Multi Bank Burst, Flash Table of Contents Table of Contents Features Description Signal Descriptions Address Inputs A[MAX:0] Data Inputs/Outputs DQ[15:0] . Chip Enable CE# Output Enable OE# Write Enable WE# Write Protect WP# Reset RST# . Latch Enable ADV# Clock CLK Wait VDD Supply Voltage. VDDQ Supply Voltage VPP Program Supply Voltage VSS Ground VSSQ Ground. Bus Operations Bus READ Bus Write Address Latch Output Disable Standby. Reset Command Interface Command Interface - Standard Commands. READ ARRAY Command. READ STATUS REGISTER Command READ ELECTRONIC SIGNATURE Command READ CFI QUERY Command CLEAR STATUS REGISTER Command BLOCK ERASE Command PROGRAM Command PROGRAM/ERASE SUSPEND Command PROGRAM/ERASE RESUME Command PROTECTION REGISTER PROGRAM Command SET CONFIGURATION REGISTER Command BLOCK LOCK Command BLOCK UNLOCK Command BLOCK LOCK-DOWN Command Interface - Factory PROGRAM Commands. DOUBLE WORD PROGRAM Command QUADRUPLE WORD PROGRAM Command ENHANCED FACTORY PROGRAM Command Setup Phase. PROGRAM Phase Verify Phase Exit Phase QUADRUPLE ENHANCED FACTORY PROGRAM Command Setup Phase. Micron Technology, Inc., reserves the right to change products or specifications without notice. 2007 Micron Technology, Inc. All rights reserved. M58WRxxxKT/B - 32Mb - 64Mb, 1.8V, x16 Multi Bank Burst, Flash Table of Contents Micron Technology, Inc., reserves the right to change products or specifications without notice. 2007 Micron Technology, Inc. All rights reserved. M58WRxxxKT/B - 32Mb - 64Mb, 1.8V, x16 Multi Bank Burst, Flash List of Tables List of Tables Table 1 Table 2 Table 3 Table 4 Table 5 Table 6 Table 7 Table 8 Table 9 Table 10 Table 11 Table 12 Table 13 Table 14 Table 15 Table 16 Table 17 Table 18 Table 19 Table 20 Table 21 Table 22 Table 23 Table 24 Table 25 Table 26 Table 27 Table 28 Table 29 Table 30 Table 31 Table 32 Table 33 Table 34 Table 35 Table 36 Table 37 Table 38 Table 39 Table 40 Table 41 Table 42 Table 43 Table 44 Table 45 Table 46 Table 47: Signal Names M58WR032KT/B Bank Architecture M58WR064KT/B Bank Architecture Bus Operations Command Codes Standard Commands Electronic Signature Codes. Factory Program Commands Status Register Bits Latency Settings Configuration Register. Burst Type Definition. Dual Operations Allowed in Other Banks Dual Operations Allowed in Same Bank Dual Operation Limitations Lock Status Program, Erase Times and Endurance Cycles Absolute Maximum Ratings Operating and AC Measurement Conditions Capacitance DC Characteristics - Currents DC Characteristics - Voltages. ASYCHRONOUS READ AC Characteristics Synchronous Read AC Characteristics Write AC Characteristics, Write Enable Controlled. Write AC Characteristics, Chip Enable Controlled Reset and Power-up AC Characteristics VFBGA56 x 9 mm - 8 x 7 Active Ball Array, mm, Package Mechanical Data Ordering Information Scheme. Top Boot Block Addresses, M58WR032KT Bottom Boot Block Addresses, M58WR032KB Top Boot Block Addresses, M58WR064KT Bottom Boot Block Addresses, M58WR064KB Query Structure Overview. CFI Query Identification String CFI Query System Interface Information Device Geometry Definition. Primary Algorithm-Specific Extended Query Table Protection Register Information Burst Read Information. Bank and Erase Block Region Information Bank and Erase Block Region 1 Information Bank and Erase Block Region 2 Information Command Interface States - Modify Table, Next State 106 Command Interface States - Modify Table, Next Output 108 Command Interface States - Lock Table, Next State. 109 Command Interface States - Lock Table, Next Output. 110 Micron Technology, Inc., reserves the right to change products or specifications without notice. 2007 Micron Technology, Inc. All rights reserved. M58WRxxxKT/B - 32Mb - 64Mb, 1.8V, x16 Multi Bank Burst, Flash List of Figures List of Figures Figure 1 Figure 2 Figure 3 Figure 4 Figure 5 Figure 6 Figure 7 Figure 8 Figure 9 Figure 10 Figure 11 Figure 12 Figure 13 Figure 14 Figure 15 Figure 16 Figure 17 Figure 19 Figure 20 Figure 21 Figure 22 Figure 23 Figure 24 Figure 25 Figure 26 Figure 27 Figure 28 Figure 29: Logic Diagram VFBGA56 Connections top view through package M58WR032KT/B Memory Map M58WR064KT/B Memory Map Protection Register Memory Map X-latency and Data Output Configuration Example Wait Configuration Example AC Measurement I/O Waveform. AC Measurement Load Circuit. ASYCHRONOUS RANDOM ACCESS READ AC Waveforms Asynchronous Page Read AC Waveforms SYCHRONOUS BURST READ AC Waveforms SINGLE SYCHRONOUS READ AC Waveforms. SYCHRONOUS BURST READ Suspend AC Waveforms Clock Input AC Waveform Write AC Waveforms, Write Enable Controlled Write AC Waveforms, Chip Enable Controlled. VFBGA56 x 9 mm - 8 x 7 Active Ball Array, mm, Package Outline. Program Flowchart and Pseudo Code DOUBLE WORD PROGRAM Flowchart and Pseudo Code QUADRUPLE WORD PROGRAM Flowchart and Pseudo Code PROGRAM SUSPEND STATUS and RESUME Flowchart and Pseudo Code BLOCK ERASE Flowchart and Pseudo Code. ERASE SUSPEND and RESUME Flowchart and Pseudo Code Locking Operations Flowchart and Pseudo Code 100 PROTECTION REGISTER PROGRAM Flowchart and Pseudo Code 101 ENHANCED FACTORY PROGRAM Flowchart 102 QUADRUPLE ENHANCED FACTORY PROGRAM Flowchart 104 Micron Technology, Inc., reserves the right to change products or specifications without notice. 2007 Micron Technology, Inc. All rights reserved. M58WRxxxKT/B - 32Mb - 64Mb, 1.8V, x16 Multi Bank Burst, Flash Description The M58WR032KT/B and M58WR064KT/B are 32Mb 2Mb x16 and 64Mb 4Mb x16 non-volatile Flash memories, respectively. They may be erased electrically at block level and programmed in-system on a word-by-word basis using a 1.7V to 2V VDD supply for the circuitry and a 1.7V to 2V VDDQ supply for the Input/Output pins. An optional 9 V VPP power supply is provided to speed up customer programming. The M58WRxxxKT/B feature an asymmetrical block architecture. • The M58WR032KT/B has an array of 71 blocks, and is divided into 4Mb banks. There are 7 banks each containing 8 main blocks of 32 Kwords, and one parameter bank containing 8 parameter blocks of 4 Kwords and 7 main blocks of 32 Kwords. • The M58WR064KT/B has an array of 135 blocks, and is divided into 4Mb banks. There are 15 banks each containing 8 main blocks of 32 Kwords, and one parameter bank containing 8 parameter blocks of 4 Kwords and 7 main blocks of 32 Kwords. The multiple bank architecture allows dual operations. While programming or erasing in one bank, READ operations are possible in other banks. Only one bank at a time is allowed to be in PROGRAM or erase mode. It is possible to perform burst reads that cross bank boundaries. The bank architectures are summarized in Table 2 and Table 3 and the memory maps are shown in Figure 3 and Figure The parameter blocks are located at the top of the memory address space for the M58WR032KT and M58WR064KT, and at the bottom for the M58WR032KB and M58WR064KB. Each block can be erased separately. Erase can be suspended to perform PROGRAM in any other block, and then resumed. PROGRAM can be suspended to read data in any other block and then resumed. Each block can be programmed and erased over 100,000 cycles using the supply voltage VDD. Two enhanced factory programming commands are available to speed up programming. PROGRAM and erase commands are written to the command interface of the memory. An internal PROGRAM/ERASE CONTROLLER manages the timings necessary for PROGRAM and erase operations. The end of a PROGRAM or erase operation can be detected and any error conditions identified in the Status Register. The command set required to control the memory is consistent with JEDEC standards. The device supports synchronous burst read and asynchronous read from all blocks of the memory array at power-up the device is configured for asynchronous read. In synchronous burst mode, data is output on each clock cycle at frequencies of up to 66 MHz. The SYCHRONOUS BURST READ operation can be suspended and resumed. The device features an automatic standby mode. When the bus is inactive during ASYCHRONOUS READ operations, the device automatically switches to the automatic standby mode. In this condition the power consumption is reduced to the standby value IDD4 and the outputs are still driven. The M58WRxxxKT/B feature an instant, individual block locking scheme that allows any block to be locked or unlocked with no latency, enabling instant code and data protection. All blocks have three levels of protection. They can be locked and locked-down individually preventing any accidental programming or erasure. There is additional hardware protection against PROGRAM and erase. When VPP all blocks are protected against PROGRAM or erase. All blocks are locked at power-up. Micron Technology, Inc., reserves the right to change products or specifications without notice. 2007 Micron Technology, Inc. All rights reserved. M58WRxxxKT/B - 32Mb - 64Mb, 1.8V, x16 Multi Bank Burst, Flash Description Figure 1: The device includes a Protection Register to increase the protection of a system’s design. The Protection Register is divided into two segments a 64-bit segment containing a unique device number written by Micron, and a 128-bit segment one-time-programmable OTP by the user. The user programmable segment can be permanently protected. Figure 5 shows the Protection Register memory map. The memory is offered in either of the following packages • VFBGA56 x 9 mm, 8 x 7 active ball array, mm pitch The device is supplied with all the bits erased set to Logic Diagram VDD VDDQ VPP A[MAX:0] 1 16 DQ[15:0] WE# CE# OE# RP# WP# ADV# CLK M58WR032KT M58WR032KB M58WR064KT M58WR064KB WAIT VSS VSSQ AI13420b Notes AMAX is equal to A20 in the M58WR032KT/B and, to A21 in the M58WR064KT/B. Table 1 Signal Names Signal name Function A[MAX:0]1 Address inputs DQ[15:0] Data input/outputs, command inputs Chip Enable Table 29 Ordering Information Scheme Example: M58WR032KT 70 ZB 6 E Device type M58 Architecture W = Multiple bank, burst mode Operating voltage R = VDD = VDDQ = 1.7V to 2V Density 032 = 32Mb x16 064 = 64Mb x16 Technology K = 65nm technology Parameter bank location T = top boot B = bottom boot Speed 70 = 70ns 7A = Automotive Certified to 85°C Package ZB = VFBGA56 x 9 mm, 0.75mm pitch Temperature range 6 = to 85°C Options E = RoHS compliant, standard packing F = RoHS compliant, tape and reel packing Devices are shipped from the factory with the memory content bits erased to For a list of available options speed, etc. or for further information on any aspect of this device, please contact the nearest Micron sales office. Micron Technology, Inc., reserves the right to change products or specifications without notice. 2007 Micron Technology, Inc. All rights reserved. M58WRxxxKT/B - 32Mb - 64Mb, 1.8V, x16 Multi Bank Burst, Flash Appendix A Block Address Tables Appendix A Block Address Tables Table 30 Top Boot Block Addresses, M58WR032KT Bank1 Parameter bank 11 12 13 14 15 16 17 18 Bank 1 19 20 21 22 23 24 25 26 Bank 2 27 28 29 30 Size Kword Address range 1FE000-1FEFFF 1FD000-1FDFFF 1FC000-1FCFFF 1FB000-1FBFFF 1FA000-1FAFFF 1F9000-1F9FFF 1F8000-1F8FFF 1F0000-1F7FFF 1E8000-1EFFFF 1E0000-1E7FFF 1D8000-1DFFFF 1D0000-1D7FFF 1C8000-1CFFFF 1C0000-1C7FFF 1B8000-1BFFFF 1B0000-1B7FFF 1A8000-1AFFFF 1A0000-1A7FFF 198000-19FFFF 190000-197FFF 188000-18FFFF 180000-187FFF 178000-17FFFF 170000-177FFF 168000-16FFFF 160000-167FFF 158000-15FFFF 150000-157FFF 148000-14FFFF 140000-147FFF Micron Technology, Inc., reserves the right to change products or specifications without notice. 2007 Micron Technology, Inc. All rights reserved. M58WRxxxKT/B - 32Mb - 64Mb, 1.8V, x16 Multi Bank Burst, Flash Appendix A Block Address Tables Table 30 Top Boot Block Addresses, M58WR032KT Continued Bank1 Size Kword Bank 3 8000 S. Federal Way, P.O. Box 6, Boise, ID 83707-0006, Tel 208-368-3900 Customer Comment Line 800-932-4992 Micron and the Micron logo are trademarks of Micron Technology, Inc. All other trademarks are the property of their respective owners. Micron Technology, Inc., reserves the right to change products or specifications without notice. 2007 Micron Technology, Inc. All rights reserved.

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M58WRxxxKT/B - 32Mb - 64Mb, 1.8V, x16 Multi Bank Burst, Flash Features

M58WRxxxKT/B - 32Mb & 64Mb, 1.8V, x16 Multi Bank Burst, Flash

M58WR032KT, M58WR064KT,

M58WR032KB, M58WR064KB
• Supply voltage VDD = 1.7V to 2V for PROGRAM, ERASE and READ VDDQ = 1.7V to 2V for I/O buffers VPP = 9V for fast program
• SYCHRONOUS/ASYCHRONOUS READ SYCHRONOUS BURST READ mode 66 MHz Asynchronous/synchronous page READ mode Random access times 70ns
• SYCHRONOUS BURST READ SUSPEND
• Programming time
10µs by word typical for fast factory program Double/quadruple word program option Enhanced factory program options
• Memory blocks Multiple bank memory array 4Mb banks Parameter blocks top or bottom location
• Dual operations PROGRAM ERASE in one bank while read in others No delay between read and write operations
• Block locking All blocks locked at power-up Any combination of blocks can be locked WP# for block lock-down
• Security 128 bit user programmable OTP cells 64 bit unique device number
• Common Flash interface CFI
• 100,000 PROGRAM/ERASE cycles per block
• Electronic signature
• Manufacturer code 20h Device codes:

M58WR032KT top 8814h M58WR032KB bottom 8815h M58WR064KT top 8810h M58WR064KB bottom 8811h
• RoHS compliant packages available
• Automotive Certified Parts Available

Micron Technology, Inc., reserves the right to change products or specifications without notice. 2007 Micron Technology, Inc. All rights reserved.

M58WRxxxKT/B - 32Mb - 64Mb, 1.8V, x16 Multi Bank Burst, Flash Table of Contents

Table of Contents

Features Description Signal Descriptions

Address Inputs A[MAX:0] Data Inputs/Outputs DQ[15:0] . Chip Enable CE# Output Enable OE# Write Enable WE# Write Protect WP# Reset RST# . Latch Enable ADV# Clock CLK Wait VDD Supply Voltage. VDDQ Supply Voltage VPP Program Supply Voltage VSS Ground VSSQ Ground. Bus Operations Bus READ Bus Write Address Latch Output Disable Standby. Reset Command Interface Command Interface - Standard Commands. READ ARRAY Command. READ STATUS REGISTER Command READ ELECTRONIC SIGNATURE Command READ CFI QUERY Command CLEAR STATUS REGISTER Command BLOCK ERASE Command PROGRAM Command PROGRAM/ERASE SUSPEND Command PROGRAM/ERASE RESUME Command PROTECTION REGISTER PROGRAM Command SET CONFIGURATION REGISTER Command BLOCK LOCK Command BLOCK UNLOCK Command BLOCK LOCK-DOWN Command Interface - Factory PROGRAM Commands. DOUBLE WORD PROGRAM Command QUADRUPLE WORD PROGRAM Command ENHANCED FACTORY PROGRAM Command

Setup Phase. PROGRAM Phase Verify Phase Exit Phase QUADRUPLE ENHANCED FACTORY PROGRAM Command Setup Phase.

Micron Technology, Inc., reserves the right to change products or specifications without notice. 2007 Micron Technology, Inc. All rights reserved.

M58WRxxxKT/B - 32Mb - 64Mb, 1.8V, x16 Multi Bank Burst, Flash Table of Contents

Micron Technology, Inc., reserves the right to change products or specifications without notice. 2007 Micron Technology, Inc. All rights reserved.

M58WRxxxKT/B - 32Mb - 64Mb, 1.8V, x16 Multi Bank Burst, Flash List of Tables

List of Tables

Table 1 Table 2 Table 3 Table 4 Table 5 Table 6 Table 7 Table 8 Table 9 Table 10 Table 11 Table 12 Table 13 Table 14 Table 15 Table 16 Table 17 Table 18 Table 19 Table 20 Table 21 Table 22 Table 23 Table 24 Table 25 Table 26 Table 27 Table 28 Table 29 Table 30 Table 31 Table 32 Table 33 Table 34 Table 35 Table 36 Table 37 Table 38 Table 39 Table 40 Table 41 Table 42 Table 43 Table 44 Table 45 Table 46 Table 47:
Signal Names M58WR032KT/B Bank Architecture M58WR064KT/B Bank Architecture Bus Operations Command Codes Standard Commands Electronic Signature Codes. Factory Program Commands Status Register Bits Latency Settings Configuration Register. Burst Type Definition. Dual Operations Allowed in Other Banks Dual Operations Allowed in Same Bank Dual Operation Limitations Lock Status Program, Erase Times and Endurance Cycles Absolute Maximum Ratings Operating and AC Measurement Conditions Capacitance DC Characteristics - Currents DC Characteristics - Voltages. ASYCHRONOUS READ AC Characteristics Synchronous Read AC Characteristics Write AC Characteristics, Write Enable Controlled. Write AC Characteristics, Chip Enable Controlled Reset and Power-up AC Characteristics VFBGA56 x 9 mm - 8 x 7 Active Ball Array, mm, Package Mechanical Data Ordering Information Scheme. Top Boot Block Addresses, M58WR032KT Bottom Boot Block Addresses, M58WR032KB Top Boot Block Addresses, M58WR064KT Bottom Boot Block Addresses, M58WR064KB Query Structure Overview. CFI Query Identification String CFI Query System Interface Information Device Geometry Definition. Primary Algorithm-Specific Extended Query Table Protection Register Information Burst Read Information. Bank and Erase Block Region Information Bank and Erase Block Region 1 Information Bank and Erase Block Region 2 Information Command Interface States - Modify Table, Next State 106 Command Interface States - Modify Table, Next Output 108 Command Interface States - Lock Table, Next State. 109 Command Interface States - Lock Table, Next Output. 110

Micron Technology, Inc., reserves the right to change products or specifications without notice. 2007 Micron Technology, Inc. All rights reserved.

M58WRxxxKT/B - 32Mb - 64Mb, 1.8V, x16 Multi Bank Burst, Flash List of Figures

List of Figures

Figure 1 Figure 2 Figure 3 Figure 4 Figure 5 Figure 6 Figure 7 Figure 8 Figure 9 Figure 10 Figure 11 Figure 12 Figure 13 Figure 14 Figure 15 Figure 16 Figure 17 Figure 19 Figure 20 Figure 21 Figure 22 Figure 23 Figure 24 Figure 25 Figure 26 Figure 27 Figure 28 Figure 29:

Logic Diagram VFBGA56 Connections top view through package M58WR032KT/B Memory Map M58WR064KT/B Memory Map Protection Register Memory Map X-latency and Data Output Configuration Example Wait Configuration Example AC Measurement I/O Waveform. AC Measurement Load Circuit. ASYCHRONOUS RANDOM ACCESS READ AC Waveforms Asynchronous Page Read AC Waveforms SYCHRONOUS BURST READ AC Waveforms SINGLE SYCHRONOUS READ AC Waveforms. SYCHRONOUS BURST READ Suspend AC Waveforms Clock Input AC Waveform Write AC Waveforms, Write Enable Controlled Write AC Waveforms, Chip Enable Controlled. VFBGA56 x 9 mm - 8 x 7 Active Ball Array, mm, Package Outline. Program Flowchart and Pseudo Code DOUBLE WORD PROGRAM Flowchart and Pseudo Code QUADRUPLE WORD PROGRAM Flowchart and Pseudo Code PROGRAM SUSPEND STATUS and RESUME Flowchart and Pseudo Code BLOCK ERASE Flowchart and Pseudo Code. ERASE SUSPEND and RESUME Flowchart and Pseudo Code Locking Operations Flowchart and Pseudo Code 100 PROTECTION REGISTER PROGRAM Flowchart and Pseudo Code 101 ENHANCED FACTORY PROGRAM Flowchart 102 QUADRUPLE ENHANCED FACTORY PROGRAM Flowchart 104

Micron Technology, Inc., reserves the right to change products or specifications without notice. 2007 Micron Technology, Inc. All rights reserved.

M58WRxxxKT/B - 32Mb - 64Mb, 1.8V, x16 Multi Bank Burst, Flash Description

The M58WR032KT/B and M58WR064KT/B are 32Mb 2Mb x16 and 64Mb 4Mb x16 non-volatile Flash memories, respectively. They may be erased electrically at block level and programmed in-system on a word-by-word basis using a 1.7V to 2V VDD supply for the circuitry and a 1.7V to 2V VDDQ supply for the Input/Output pins. An optional 9 V VPP power supply is provided to speed up customer programming.

The M58WRxxxKT/B feature an asymmetrical block architecture.
• The M58WR032KT/B has an array of 71 blocks, and is divided into 4Mb banks. There
are 7 banks each containing 8 main blocks of 32 Kwords, and one parameter bank containing 8 parameter blocks of 4 Kwords and 7 main blocks of 32 Kwords.
• The M58WR064KT/B has an array of 135 blocks, and is divided into 4Mb banks. There are 15 banks each containing 8 main blocks of 32 Kwords, and one parameter bank containing 8 parameter blocks of 4 Kwords and 7 main blocks of 32 Kwords.

The multiple bank architecture allows dual operations. While programming or erasing in one bank, READ operations are possible in other banks. Only one bank at a time is allowed to be in PROGRAM or erase mode. It is possible to perform burst reads that cross bank boundaries. The bank architectures are summarized in Table 2 and Table 3 and the memory maps are shown in Figure 3 and Figure The parameter blocks are located at the top of the memory address space for the M58WR032KT and M58WR064KT, and at the bottom for the M58WR032KB and M58WR064KB.

Each block can be erased separately. Erase can be suspended to perform PROGRAM in any other block, and then resumed. PROGRAM can be suspended to read data in any other block and then resumed. Each block can be programmed and erased over 100,000 cycles using the supply voltage VDD. Two enhanced factory programming commands are available to speed up programming.

PROGRAM and erase commands are written to the command interface of the memory. An internal PROGRAM/ERASE CONTROLLER manages the timings necessary for PROGRAM and erase operations. The end of a PROGRAM or erase operation can be detected and any error conditions identified in the Status Register. The command set required to control the memory is consistent with JEDEC standards.

The device supports synchronous burst read and asynchronous read from all blocks of the memory array at power-up the device is configured for asynchronous read. In synchronous burst mode, data is output on each clock cycle at frequencies of up to 66 MHz. The SYCHRONOUS BURST READ operation can be suspended and resumed.

The device features an automatic standby mode. When the bus is inactive during ASYCHRONOUS READ operations, the device automatically switches to the automatic standby mode. In this condition the power consumption is reduced to the standby value IDD4 and the outputs are still driven.

The M58WRxxxKT/B feature an instant, individual block locking scheme that allows any block to be locked or unlocked with no latency, enabling instant code and data protection. All blocks have three levels of protection. They can be locked and locked-down individually preventing any accidental programming or erasure. There is additional hardware protection against PROGRAM and erase. When VPP all blocks are protected against PROGRAM or erase. All blocks are locked at power-up.

Micron Technology, Inc., reserves the right to change products or specifications without notice. 2007 Micron Technology, Inc. All rights reserved.

M58WRxxxKT/B - 32Mb - 64Mb, 1.8V, x16 Multi Bank Burst, Flash Description

Figure 1:

The device includes a Protection Register to increase the protection of a system’s design. The Protection Register is divided into two segments a 64-bit segment containing a unique device number written by Micron, and a 128-bit segment one-time-programmable OTP by the user. The user programmable segment can be permanently protected. Figure 5 shows the Protection Register memory map.

The memory is offered in either of the following packages
• VFBGA56 x 9 mm, 8 x 7 active ball array, mm pitch

The device is supplied with all the bits erased set to

Logic Diagram

VDD VDDQ VPP

A[MAX:0] 1
16 DQ[15:0]

WE# CE# OE# RP# WP# ADV# CLK

M58WR032KT M58WR032KB M58WR064KT M58WR064KB

WAIT

VSS VSSQ

AI13420b

Notes AMAX is equal to A20 in the M58WR032KT/B and, to A21 in the M58WR064KT/B.

Table 1 Signal Names

Signal name

Function

A[MAX:0]1

Address inputs

DQ[15:0]

Data input/outputs, command inputs

Chip Enable
Table 29 Ordering Information Scheme Example:

M58WR032KT
70 ZB 6 E

Device type M58

Architecture W = Multiple bank, burst mode

Operating voltage R = VDD = VDDQ = 1.7V to 2V

Density 032 = 32Mb x16 064 = 64Mb x16

Technology K = 65nm technology

Parameter bank location T = top boot B = bottom boot

Speed 70 = 70ns 7A = Automotive Certified to 85°C

Package ZB = VFBGA56 x 9 mm, 0.75mm pitch

Temperature range 6 = to 85°C

Options E = RoHS compliant, standard packing F = RoHS compliant, tape and reel packing

Devices are shipped from the factory with the memory content bits erased to For a list of available options speed, etc. or for further information on any aspect of this device, please contact the nearest Micron sales office.

Micron Technology, Inc., reserves the right to change products or specifications without notice. 2007 Micron Technology, Inc. All rights reserved.

M58WRxxxKT/B - 32Mb - 64Mb, 1.8V, x16 Multi Bank Burst, Flash Appendix A Block Address Tables

Appendix A Block Address Tables

Table 30 Top Boot Block Addresses, M58WR032KT

Bank1

Parameter bank
11 12
13 14
15 16
17 18

Bank 1
19 20
21 22
23 24
25 26

Bank 2
27 28
29 30

Size Kword

Address range
1FE000-1FEFFF 1FD000-1FDFFF 1FC000-1FCFFF 1FB000-1FBFFF 1FA000-1FAFFF 1F9000-1F9FFF 1F8000-1F8FFF 1F0000-1F7FFF 1E8000-1EFFFF 1E0000-1E7FFF 1D8000-1DFFFF 1D0000-1D7FFF 1C8000-1CFFFF 1C0000-1C7FFF 1B8000-1BFFFF 1B0000-1B7FFF 1A8000-1AFFFF 1A0000-1A7FFF 198000-19FFFF 190000-197FFF 188000-18FFFF 180000-187FFF 178000-17FFFF 170000-177FFF 168000-16FFFF 160000-167FFF 158000-15FFFF 150000-157FFF 148000-14FFFF 140000-147FFF

Micron Technology, Inc., reserves the right to change products or specifications without notice. 2007 Micron Technology, Inc. All rights reserved.

M58WRxxxKT/B - 32Mb - 64Mb, 1.8V, x16 Multi Bank Burst, Flash Appendix A Block Address Tables

Table 30 Top Boot Block Addresses, M58WR032KT Continued

Bank1

Size Kword

Bank 3
8000 S. Federal Way, P.O. Box 6, Boise, ID 83707-0006, Tel 208-368-3900 Customer Comment Line 800-932-4992 Micron and the Micron logo are trademarks of Micron Technology, Inc. All other trademarks are the property of their respective owners.

Micron Technology, Inc., reserves the right to change products or specifications without notice. 2007 Micron Technology, Inc. All rights reserved.

Notice: we do not provide any warranties that information, datasheets, application notes, circuit diagrams, or software stored on this website are up-to-date or error free. The archived M58WR064KB70ZB6E Datasheet file may be downloaded here without warranties.

Datasheet ID: M58WR064KB70ZB6E 648303