M29W400DT70N1

M29W400DT70N1 Datasheet

M29W400DT M29W400DB

Part	Datasheet
M29W400DT70N1	M29W400DT70N1 (pdf)

Related Parts	Information
M29W400DB55ZE6E	M29W400DB55ZE6E
M29W400DT70N6F TR	M29W400DT70N6F TR
M29W400DT55ZE6F TR	M29W400DT55ZE6F TR
M29W400DT55ZE6E	M29W400DT55ZE6E
M29W400DT55N6F TR	M29W400DT55N6F TR
M29W400DT55N6	M29W400DT55N6
M29W400DB70N6T TR	M29W400DB70N6T TR
M29W400DB70N6	M29W400DB70N6
M29W400DB70N1	M29W400DB70N1
M29W400DB55N6	M29W400DB55N6
M29W400DB55N1	M29W400DB55N1
M29W400DB45ZE6E	M29W400DB45ZE6E
M29W400DB70ZE6F TR	M29W400DB70ZE6F TR
M29W400DT70ZE6F TR	M29W400DT70ZE6F TR
M29W400DT45N6E	M29W400DT45N6E
M29W400DT45ZE6E	M29W400DT45ZE6E
M29W400DB45N6E	M29W400DB45N6E

PDF Datasheet Preview
M29W400DT M29W400DB 4 Mbit 512 Kb x 8 or 256 Kb x 16, boot block 3 V supply Flash memory - Supply voltage VCC = V to V for Program, Erase and Read - Access time 45, 55, 70 ns - Programming time 10 us per byte/word typical - 11 memory blocks 1 boot block top or bottom location 2 parameter and 8 main blocks - Program/Erase controller Embedded byte/word program algorithms - Erase Suspend and Resume modes Read and Program another block during Erase Suspend - Unlock bypass program command Faster production/batch programming - Temporary block unprotection mode - Low power consumption Standby and Automatic Standby - 100,000 Program/Erase cycles per block - Electronic signature Manufacturer code 0020h Top device code M29W400DT 00EEh Bottom device code M29W400DB 00EFh RoHS packages - Automotive Device Grade 3 Temperature to 125 °C Automotive grade certified SO44 M 1 TSOP48 N 12 x 20 mm FBGA TFBGA48 ZA 1 6 x 9 mm FBGA TFBGA48 ZE 6 x 8 mm These packages are no more in mass production. April 2009 1/48 Contents Contents M29W400DT, M29W400DB Description 6 Signal descriptions 13 Address inputs A0-A17 13 Data inputs/outputs DQ0-DQ7 13 Data inputs/outputs DQ8-DQ14 13 Data input/output or Address input DQ15A-1 13 Chip Enable E 13 Output Enable G 13 Write Enable W 14 Reset/Block Temporary Unprotect RP 14 Ready/Busy output RB 14 Byte/Word Organization Select BYTE 14 VCC supply voltage 15 VSS ground 15 Bus operations 16 Bus Read 16 Bus Write 16 Output Disable 16 Standby 16 Automatic Standby 16 Special bus operations 17 4/48 M29W400DT, M29W400DB List of figures List of figures Figure Logic diagram 7 SO connections 8 TSOP connections 9 TFBGA connections top view through package 10 Block addresses x 8 11 Block addresses x 16 12 Data polling flowchart 26 Data toggle flowchart 27 AC measurement I/O waveform 29 AC measurement load circuit 29 Read mode AC waveforms 30 Write AC waveforms, Write Enable controlled 32 Write AC waveforms, Chip Enable controlled 33 Reset/Block Temporary Unprotect AC waveforms 34 SO44 - 44 lead plastic small outline, 525 mils body width, package outline. 35 TSOP48 48 lead plastic thin small outline, 12 x 20 mm, package outline 36 TFBGA48 6 x 9 mm, 6 x 8 active ball array, mm pitch, bottom view package outline 37 TFBGA48 6 x 8 mm, 6 x 8 active ball array, mm pitch, bottom view package outline 38 Programmer equipment block protect flowchart 43 Programmer equipment chip unprotect flowchart 44 In-system equipment block protect flowchart 45 In-system equipment chip unprotect flowchart 46 5/48 M29W400DT, M29W400DB The M29W400D is a 4 Mbit 512 K x 8 or 256 K x 16 non-volatile memory that can be read, erased and reprogrammed. These operations can be performed using a single low voltage to V supply. On power-up the memory defaults to its Read mode where it can be read in the same way as a ROM or EPROM. The memory is divided into blocks that can be erased independently so it is possible to preserve valid data while old data is erased. Each block can be protected independently to prevent accidental Program or Erase commands from modifying the memory. Program and Erase commands are written to the command interface of the memory. An on-chip Program/Erase controller simplifies the process of programming or erasing the memory by taking care of all of the special operations that are required to update the memory contents. The end of a program or erase operation can be detected and any error conditions identified. The command set required to control the memory is consistent with JEDEC standards. The blocks in the memory are asymmetrically arranged, see Figure 5 and Figure 6, Block addresses. The first or last 64 Kbytes have been divided into four additional blocks. The 16 Kbyte boot block can be used for small initialization code to start the microprocessor, the two 8 Kbyte parameter blocks can be used for parameter storage and the remaining 32 Kbyte is a small main block where the application may be stored. Chip Enable, Output Enable and Write Enable signals control the bus operation of the memory. They allow simple connection to most microprocessors, often without additional logic. The memory is offered in SO44, TSOP48 12 x 20 mm , TFBGA48 mm pitch 6 x 9 mm and 6 x 8 mm packages. The memory is supplied with all the bits erased set to In order to meet environmental requirements, Numonyx offers the M29W400D in RoHS packages, which are Lead-free. The category of second level interconnect is marked on the package and on the inner box label, in compliance with JEDEC Standard JESD97. The maximum ratings related to soldering conditions are also marked on the inner box label. 6/48 M29W400DT, M29W400DB Figure Logic diagram VCC 18 A0-A17 15 DQ0-DQ14 M29W400DT M29W400DB BYTE Table Signal names Signal name Function A0-A17 DQ0-DQ7 DQ8-DQ14 E G W RP RB BYTE VCC VSS NC Address inputs Data inputs/outputs Data inputs/outputs Data input/output or Address input Chip Enable Output Enable Write Enable Reset/Block Temporary Unprotect Ready/Busy output Byte/word organization select Supply voltage Ground Not connected internally AI06853 Direction Inputs I/O I/O I/O Input Output Input 7/48 M29W400DT, M29W400DB Figure SO connections NC RB A17 A7 A6 A5 A4 A3 A2 A1 A0 E VSS G DQ0 DQ8 DQ1 DQ9 DQ2 DQ10 DQ3 DQ11 NC = Not connected. 11 M29W400DT 34 12 M29W400DB 33 RP W A8 A9 A10 A11 A12 A13 A14 A15 A16 BYTE VSS DQ7 DQ14 DQ6 DQ13 DQ5 DQ12 DQ4 VCC AI06855 8/48 Table Ordering information scheme Example: M29W400DT Device type M29 Operating voltage W = VCC = to V Device Function 400D = 4 Mbit 512 K x 8 or 256 K x 16 , boot block Array matrix T = Top boot B = Bottom boot Speed 45 = 45 ns 55 = 55 ns 70 = 70 ns Package M = SO44 N = TSOP48 12 x 20 mm ZA = TFBGA48 6 x 9 mm ZE = TFBGA48 6 x 8 mm Temperature range 6 = to 85 °C 3 1 = Automotive grade certified 2 to 125 °C 1 = 0 to 70 °C Option Blank = Standard packing T = Tape & Reel packing E = RoHS package, standard packing F = RoHS package, Tape & Reel packing 55 N 6 T Automotive grade 3 part is available only for the speed class 55 ns, package type TSOP48, 12 x 20 mm, bottom configuration. Devices are shipped from the factory with the memory content bits erased to For a list of available options speed, package, etc. or for further information on any aspect of this device, please contact the Numonyx Sales Office nearest to you. 39/48 Block address table Appendix A Block address table M29W400DT, M29W400DB Table Top boot block addresses M29W400DT # Size Kbytes Address range x 8 7C000h-7FFFFh 7A000h-7BFFFh 78000h-79FFFh 70000h-77FFFh 60000h-6FFFFh 50000h-5FFFFh 40000h-4FFFFh 30000h-3FFFFh 20000h-2FFFFh 10000h-1FFFFh Table Bottom boot block addresses M29W400DB # Size Kbytes Address range x 8 70000h-7FFFFh 60000h-6FFFFh 50000h-5FFFFh 40000h-4FFFFh 30000h-3FFFFh 20000h-2FFFFh 10000h-1FFFFh 08000h-0FFFFh 06000h-07FFFh 04000h-05FFFh Address range x 16 3E000h-3FFFFh 3D000h-3DFFFh 3C000h-3CFFFh 38000h-3BFFFh 30000h-37FFFh 28000h-2FFFFh 20000h-27FFFh 18000h-1FFFFh 10000h-17FFFh 08000h-0FFFFh Address range x 16 38000h-3FFFFh 30000h-37FFFh 28000h-2FFFFh 20000h-27FFFh 18000h-1FFFFh 10000h-17FFFh 08000h-0FFFFh 04000h-07FFFh 03000h-03FFFh 02000h-02FFFh 40/48 M29W400DT, M29W400DB Appendix B Block protection Block protection B.1 B.2 Block protection can be used to prevent any operation from modifying the data stored in the Flash. Each block can be protected individually. Once protected, Program and Erase operations on the block fail to change the data. There are three techniques that can be used to control block protection, these are the programmer technique, the in-system technique and temporary unprotection. temporary unprotection is controlled by the Reset/Block Temporary Unprotection pin, RP this is described in the Section 2 Signal descriptions. Unlike the command interface of the Program/Erase controller, the techniques for protecting and unprotecting blocks change between different Flash memory suppliers. For example, the techniques for AMD parts will not work on Numonyx parts. Care should be taken when changing drivers for one part to work on another. Programmer technique The programmer technique uses high VID voltage levels on some of the bus pins. These cannot be achieved using a standard microprocessor bus, therefore the technique is recommended only for use in programming equipment. To protect a block follow the flowchart in Figure 19 Programmer equipment block protect flowchart. To unprotect the whole chip it is necessary to protect all of the blocks first, then all blocks can be unprotected at the same time. To unprotect the chip follow Figure 20 Programmer equipment chip unprotect flowchart. Table 23 Programmer technique bus operations, BYTE = VIH or VIL, gives a summary of each operation. The timing on these flowcharts is critical. Care should be taken to ensure that, where a pause is specified, it is followed as closely as possible. Do not abort the procedure before reaching the end. Chip Unprotect can take several seconds and a user message should be provided to show that the operation is progressing. tWLWH and tELEH parameters modified for all speed classes in Table 13 Write AC characteristics, Write Enable controlled and Table 14 Write AC characteristics, Chip Enable controlled. Minor text changes. TSOP48 package updated Figure 16 and Table Document status changed to Full datasheet. TFBGA48 6 x 8 package added. TLEAD parameter added in Table 8 Absolute maximum ratings. tGLQV modified in Table 12 Read AC characteristics. 3 RB pin description corrected in Table : Tape and Reel option updated in Table 20 Ordering information scheme. 4 Lead-free packaging promotion updated in Section 1 Description, Section 6 Maximum rating and Section 9 Part numbering. RoHS text added in Section 1 Description. 5 Updated options E and F in Table 20 Ordering information scheme. Small text changes. 6 Applied Numonyx branding. Added Automotive Grade 3 part information to cover page and part 7 ordering information. 47/48 M29W400DT, M29W400DB Please Read Carefully INFORMATION IN THIS DOCUMENT IS PROVIDED IN CONNECTION WITH NUMONYX PRODUCTS. NO LICENSE, EXPRESS OR IMPLIED, BY ESTOPPEL OR OTHERWISE, TO ANY INTELLECTUAL PROPERTY RIGHTS IS GRANTED BY THIS DOCUMENT. EXCEPT AS PROVIDED IN NUMONYX'S TERMS AND CONDITIONS OF SALE FOR SUCH PRODUCTS, NUMONYX ASSUMES NO LIABILITY WHATSOEVER, AND NUMONYX DISCLAIMS ANY EXPRESS OR IMPLIED WARRANTY, RELATING TO SALE AND/OR USE OF NUMONYX PRODUCTS INCLUDING LIABILITY OR WARRANTIES RELATING TO FITNESS FOR A PARTICULAR PURPOSE, MERCHANTABILITY, OR INFRINGEMENT OF ANY PATENT, COPYRIGHT OR OTHER INTELLECTUAL PROPERTY RIGHT. Numonyx products are not intended for use in medical, life saving, life sustaining, critical control or safety systems, or in nuclear facility applications. Numonyx may make changes to specifications and product descriptions at any time, without notice. Numonyx, B.V. may have patents or pending patent applications, trademarks, copyrights, or other intellectual property rights that relate to the presented subject matter. The furnishing of documents and other materials and information does not provide any license, express or implied, by estoppel or otherwise, to any such patents, trademarks, copyrights, or other intellectual property rights. Designers must not rely on the absence or characteristics of any features or instructions marked “reserved” or “undefined.” Numonyx reserves these for future definition and shall have no responsibility whatsoever for conflicts or incompatibilities arising from future changes to them. Contact your local Numonyx sales office or your distributor to obtain the latest specifications and before placing your product order. Copies of documents which have an order number and are referenced in this document, or other Numonyx literature may be obtained by visiting Numonyx's website at Numonyx StrataFlash is a trademark or registered trademark of Numonyx or its subsidiaries in the United States and other countries. *Other names and brands may be claimed as the property of others. Copyright 2009, Numonyx, B.V., All Rights Reserved. 48/48

PDF Datasheet Preview

M29W400DT M29W400DB
4 Mbit 512 Kb x 8 or 256 Kb x 16, boot block 3 V supply Flash memory
- Supply voltage VCC = V to V for Program, Erase and Read
- Access time 45, 55, 70 ns - Programming time
10 us per byte/word typical - 11 memory blocks
1 boot block top or bottom location 2 parameter and 8 main blocks - Program/Erase controller Embedded byte/word program algorithms - Erase Suspend and Resume modes Read and Program another block during

Erase Suspend - Unlock bypass program command

Faster production/batch programming - Temporary block unprotection mode - Low power consumption

Standby and Automatic Standby - 100,000 Program/Erase cycles per block - Electronic signature

Manufacturer code 0020h Top device code M29W400DT 00EEh Bottom device code M29W400DB 00EFh RoHS packages - Automotive Device Grade 3 Temperature to 125 °C Automotive grade certified

SO44 M 1

TSOP48 N 12 x 20 mm

FBGA TFBGA48 ZA 1
6 x 9 mm FBGA

TFBGA48 ZE 6 x 8 mm

These packages are no more in mass production.

April 2009
1/48

Contents

Contents

M29W400DT, M29W400DB

Description 6

Signal descriptions 13

Address inputs A0-A17 13

Data inputs/outputs DQ0-DQ7 13

Data inputs/outputs DQ8-DQ14 13

Data input/output or Address input DQ15A-1 13

Chip Enable E 13

Output Enable G 13

Write Enable W 14

Reset/Block Temporary Unprotect RP 14

Ready/Busy output RB 14

Byte/Word Organization Select BYTE 14

VCC supply voltage 15 VSS ground 15

Bus operations 16

Bus Read 16

Bus Write 16

Output Disable 16

Standby 16

Automatic Standby 16

Special bus operations 17
4/48

M29W400DT, M29W400DB

List of figures

List of figures

Figure

Logic diagram 7 SO connections 8 TSOP connections 9 TFBGA connections top view through package 10 Block addresses x 8 11 Block addresses x 16 12 Data polling flowchart 26 Data toggle flowchart 27 AC measurement I/O waveform 29 AC measurement load circuit 29 Read mode AC waveforms 30 Write AC waveforms, Write Enable controlled 32 Write AC waveforms, Chip Enable controlled 33 Reset/Block Temporary Unprotect AC waveforms 34 SO44 - 44 lead plastic small outline, 525 mils body width, package outline. 35 TSOP48 48 lead plastic thin small outline, 12 x 20 mm, package outline 36 TFBGA48 6 x 9 mm, 6 x 8 active ball array, mm pitch, bottom view package outline 37 TFBGA48 6 x 8 mm, 6 x 8 active ball array, mm pitch, bottom view package outline 38 Programmer equipment block protect flowchart 43 Programmer equipment chip unprotect flowchart 44 In-system equipment block protect flowchart 45 In-system equipment chip unprotect flowchart 46
5/48

M29W400DT, M29W400DB

The M29W400D is a 4 Mbit 512 K x 8 or 256 K x 16 non-volatile memory that can be read, erased and reprogrammed. These operations can be performed using a single low voltage to V supply. On power-up the memory defaults to its Read mode where it can be read in the same way as a ROM or EPROM.

The memory is divided into blocks that can be erased independently so it is possible to preserve valid data while old data is erased. Each block can be protected independently to prevent accidental Program or Erase commands from modifying the memory. Program and Erase commands are written to the command interface of the memory. An on-chip Program/Erase controller simplifies the process of programming or erasing the memory by taking care of all of the special operations that are required to update the memory contents.

The end of a program or erase operation can be detected and any error conditions identified. The command set required to control the memory is consistent with JEDEC standards.

The blocks in the memory are asymmetrically arranged, see Figure 5 and Figure 6, Block addresses. The first or last 64 Kbytes have been divided into four additional blocks. The 16 Kbyte boot block can be used for small initialization code to start the microprocessor, the two 8 Kbyte parameter blocks can be used for parameter storage and the remaining 32 Kbyte is a small main block where the application may be stored.

Chip Enable, Output Enable and Write Enable signals control the bus operation of the memory. They allow simple connection to most microprocessors, often without additional logic.

The memory is offered in SO44, TSOP48 12 x 20 mm , TFBGA48 mm pitch 6 x 9 mm and 6 x 8 mm packages. The memory is supplied with all the bits erased set to

In order to meet environmental requirements, Numonyx offers the M29W400D in RoHS packages, which are Lead-free. The category of second level interconnect is marked on the package and on the inner box label, in compliance with JEDEC Standard JESD97. The maximum ratings related to soldering conditions are also marked on the inner box label.
6/48

M29W400DT, M29W400DB

Figure Logic diagram VCC
18 A0-A17
15 DQ0-DQ14

M29W400DT

M29W400DB

BYTE

Table Signal names

Signal name

Function

A0-A17 DQ0-DQ7 DQ8-DQ14 E G W RP RB BYTE VCC VSS NC

Address inputs Data inputs/outputs Data inputs/outputs Data input/output or Address input Chip Enable Output Enable Write Enable Reset/Block Temporary Unprotect Ready/Busy output Byte/word organization select Supply voltage Ground Not connected internally

AI06853

Direction Inputs I/O I/O I/O Input Output Input
7/48

M29W400DT, M29W400DB

Figure SO connections

NC RB A17 A7 A6 A5 A4 A3 A2 A1 A0

E VSS

G DQ0 DQ8 DQ1 DQ9 DQ2 DQ10 DQ3 DQ11

NC = Not connected.
11 M29W400DT 34 12 M29W400DB 33

RP W A8 A9 A10 A11 A12 A13 A14 A15 A16 BYTE VSS DQ7 DQ14 DQ6 DQ13 DQ5 DQ12 DQ4 VCC

AI06855
8/48
Table Ordering information scheme

Example:

M29W400DT

Device type M29

Operating voltage W = VCC = to V

Device Function 400D = 4 Mbit 512 K x 8 or 256 K x 16 , boot block

Array matrix T = Top boot B = Bottom boot

Speed 45 = 45 ns 55 = 55 ns 70 = 70 ns

Package M = SO44 N = TSOP48 12 x 20 mm ZA = TFBGA48 6 x 9 mm ZE = TFBGA48 6 x 8 mm

Temperature range 6 = to 85 °C 3 1 = Automotive grade certified 2 to 125 °C 1 = 0 to 70 °C

Option Blank = Standard packing T = Tape & Reel packing E = RoHS package, standard packing F = RoHS package, Tape & Reel packing
55 N 6 T

Automotive grade 3 part is available only for the speed class 55 ns, package type TSOP48, 12 x 20 mm, bottom configuration.

Devices are shipped from the factory with the memory content bits erased to

For a list of available options speed, package, etc. or for further information on any aspect of this device, please contact the Numonyx Sales Office nearest to you.
39/48

Block address table

Appendix A Block address table

M29W400DT, M29W400DB

Table Top boot block addresses M29W400DT
# Size Kbytes

Address range x 8
7C000h-7FFFFh 7A000h-7BFFFh 78000h-79FFFh 70000h-77FFFh 60000h-6FFFFh 50000h-5FFFFh 40000h-4FFFFh 30000h-3FFFFh 20000h-2FFFFh 10000h-1FFFFh

Table Bottom boot block addresses M29W400DB
# Size Kbytes

Address range x 8
70000h-7FFFFh 60000h-6FFFFh 50000h-5FFFFh 40000h-4FFFFh 30000h-3FFFFh 20000h-2FFFFh 10000h-1FFFFh 08000h-0FFFFh 06000h-07FFFh 04000h-05FFFh

Address range x 16 3E000h-3FFFFh 3D000h-3DFFFh 3C000h-3CFFFh 38000h-3BFFFh 30000h-37FFFh 28000h-2FFFFh 20000h-27FFFh 18000h-1FFFFh 10000h-17FFFh 08000h-0FFFFh

Address range x 16 38000h-3FFFFh 30000h-37FFFh 28000h-2FFFFh 20000h-27FFFh 18000h-1FFFFh 10000h-17FFFh 08000h-0FFFFh 04000h-07FFFh 03000h-03FFFh 02000h-02FFFh
40/48

M29W400DT, M29W400DB

Appendix B Block protection

Block protection

B.1 B.2

Block protection can be used to prevent any operation from modifying the data stored in the Flash. Each block can be protected individually. Once protected, Program and Erase operations on the block fail to change the data.

There are three techniques that can be used to control block protection, these are the programmer technique, the in-system technique and temporary unprotection. temporary unprotection is controlled by the Reset/Block Temporary Unprotection pin, RP this is described in the Section 2 Signal descriptions.

Unlike the command interface of the Program/Erase controller, the techniques for protecting and unprotecting blocks change between different Flash memory suppliers. For example, the techniques for AMD parts will not work on Numonyx parts. Care should be taken when changing drivers for one part to work on another.

Programmer technique

The programmer technique uses high VID voltage levels on some of the bus pins. These cannot be achieved using a standard microprocessor bus, therefore the technique is recommended only for use in programming equipment.

To protect a block follow the flowchart in Figure 19 Programmer equipment block protect flowchart. To unprotect the whole chip it is necessary to protect all of the blocks first, then all blocks can be unprotected at the same time. To unprotect the chip follow Figure 20 Programmer equipment chip unprotect flowchart. Table 23 Programmer technique bus operations, BYTE = VIH or VIL, gives a summary of each operation.

The timing on these flowcharts is critical. Care should be taken to ensure that, where a pause is specified, it is followed as closely as possible. Do not abort the procedure before reaching the end. Chip Unprotect can take several seconds and a user message should be provided to show that the operation is progressing.
tWLWH and tELEH parameters modified for all speed classes in Table 13 Write AC characteristics, Write Enable controlled and Table 14 Write AC characteristics, Chip Enable controlled. Minor text changes. TSOP48 package updated Figure 16 and Table

Document status changed to Full datasheet. TFBGA48 6 x 8 package added.

TLEAD parameter added in Table 8 Absolute maximum ratings.
tGLQV modified in Table 12 Read AC characteristics.
3 RB pin description corrected in Table :
Tape and Reel option updated in Table 20 Ordering information scheme. 4 Lead-free packaging promotion updated in Section 1 Description,

Section 6 Maximum rating and Section 9 Part numbering.
RoHS text added in Section 1 Description. 5 Updated options E and F in Table 20 Ordering information scheme.

Small text changes.
6 Applied Numonyx branding.

Added Automotive Grade 3 part information to cover page and part 7
ordering information.
47/48

M29W400DT, M29W400DB

Please Read Carefully INFORMATION IN THIS DOCUMENT IS PROVIDED IN CONNECTION WITH NUMONYX PRODUCTS. NO LICENSE, EXPRESS OR IMPLIED, BY ESTOPPEL OR OTHERWISE, TO ANY INTELLECTUAL PROPERTY RIGHTS IS GRANTED BY THIS DOCUMENT. EXCEPT AS PROVIDED IN NUMONYX'S TERMS AND CONDITIONS OF SALE FOR SUCH PRODUCTS, NUMONYX ASSUMES NO LIABILITY

WHATSOEVER, AND NUMONYX DISCLAIMS ANY EXPRESS OR IMPLIED WARRANTY, RELATING TO SALE AND/OR USE OF NUMONYX PRODUCTS INCLUDING LIABILITY OR WARRANTIES RELATING TO FITNESS FOR A PARTICULAR PURPOSE, MERCHANTABILITY, OR INFRINGEMENT OF ANY PATENT, COPYRIGHT OR OTHER INTELLECTUAL PROPERTY RIGHT.

Numonyx products are not intended for use in medical, life saving, life sustaining, critical control or safety systems, or in nuclear facility applications.

Numonyx may make changes to specifications and product descriptions at any time, without notice. Numonyx, B.V. may have patents or pending patent applications, trademarks, copyrights, or other intellectual property rights that relate to the presented subject matter. The furnishing of documents and other materials and information does not provide any license, express or implied,
by estoppel or otherwise, to any such patents, trademarks, copyrights, or other intellectual property rights. Designers must not rely on the absence or characteristics of any features or instructions marked “reserved” or “undefined.” Numonyx reserves these for future definition and shall have no responsibility whatsoever for conflicts or incompatibilities arising from future changes to them.

Contact your local Numonyx sales office or your distributor to obtain the latest specifications and before placing your product order. Copies of documents which have an order number and are referenced in this document, or other Numonyx literature may be obtained by
visiting Numonyx's website at Numonyx StrataFlash is a trademark or registered trademark of Numonyx or its subsidiaries in the United States and other countries.
*Other names and brands may be claimed as the property of others. Copyright 2009, Numonyx, B.V., All Rights Reserved.
48/48

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Datasheet ID: M29W400DT70N1 648293