M25P128-VMF6TP TR

M25P128-VMF6TP TR Datasheet

M25P128

Part	Datasheet
M25P128-VMF6TP TR	M25P128-VMF6TP TR (pdf)

Related Parts	Information
M25P128-VME6G	M25P128-VME6G
M25P128-VME6TG TR	M25P128-VME6TG TR
M25P128-VMF6P	M25P128-VMF6P

PDF Datasheet Preview
M25P128 128-Mbit, low-voltage, serial flash memory with 54-MHz SPI bus interface - 128-Mbit flash memory - to V single supply voltage - SPI bus compatible serial interface - 54 MHz clock rate maximum for 65 nm devices - VPP = 9 V for fast program/erase mode optional - Page program up to 256 Bytes : in ms typical for 65 nm devices in ms typical with VPP = 9 V for 65 nm devices - Sector erase 2 Mbit - Bulk erase 128 Mbit - Electronic signature JEDEC standard two-byte signature 2018h - More than 10,000 erase/program cycles per sector - More than 20-year data retention - RoHS compliant packages VDFPN8 ME 8 x 6 mm MLP8 SO16 MF 300 mils width March 2010 1/47 Contents Contents M25P128 Description 6 Signal description 8 Serial data output Q 8 Serial data input D 8 Serial clock C 8 Chip Select S 8 Hold 8 Write protect/enhanced program supply voltage W/VPP 9 VCC supply voltage 9 VSS ground 9 SPI modes 10 Operating features 12 Page programming 12 Sector erase and bulk erase 12 Polling during a write, program or erase cycle 12 Fast program/erase mode 12 Active power and standby power modes 13 Status register 13 Protection modes 13 Hold condition 14 Memory organization 16 Instructions 19 Write enable WREN 20 Write disable WRDI 20 Read identification RDID 21 Read status register RDSR 22 Ordering information 45 3/47 List of tables List of tables M25P128 Table Table 4/47 M25P128 List of figures List of figures Figure Logic diagram 6 VDFPN connections 7 SO connections 7 Bus master and memory devices on the SPI bus 10 SPI modes supported 11 Hold condition activation 15 Block diagram 16 Write enable WREN instruction sequence 20 Write disable WRDI instruction sequence 20 Read identification RDID instruction sequence and data-out sequence 21 Read status register RDSR instruction sequence and data-out sequence 23 Write status register WRSR instruction sequence 25 Read data bytes READ instruction sequence and data-out sequence 26 Read data bytes at higher speed FAST_READ instruction and data-out sequence 27 Page program PP instruction sequence 29 Sector erase SE instruction sequence 30 Bulk erase BE instruction sequence. 31 Power-up timing 33 AC measurement I/O waveform 35 Serial input timing 40 Write protect setup and hold timing during WRSR when SRWD 41 Hold timing 41 Output timing 42 VPPH timing 42 VDFPN8 MLP8 , 8-lead Very thin Dual Flat Package No lead, 8x6mm, package outline 43 SO16 wide 16 lead Plastic Small Outline, 300 mils body width 44 5/47 M25P128 Note: The M25P128 is a 128-Mbit 16 Mbit x 8 serial flash memory, with advanced write protection mechanisms and accessed by a high speed SPI-compatible bus, which allows clock frequency operation up to 54 MHz 1 . The memory can be programmed 1 to 256 Bytes at a time, using the page program instruction. The memory is organized as 64 sectors, each containing 1024 pages. Each page is 256 bytes wide. Thus, the whole memory can be viewed as consisting of 65536 pages, or 16777216 bytes. An enhanced fast program/erase mode is available to speed up operations in factory environment. The device enters this mode whenever the VPPH voltage is applied to the write protect/enhanced program supply voltage pin W/VPP . The whole memory can be erased using the bulk erase instruction, or a sector at a time, using the sector erase instruction. In order to meet environmental requirements, Numonyx offers these devices in Lead-free and RoHS compliant packages. Important this datasheet details the functionality of the M25P128 devices, based on the previous 130 nm MLC process or based on the current 65 nm SLC process, identified by the process identification digit ‘A’ in the device marking and process letter "B" in the part number. The new device is backward compatible with the old one. Figure Logic diagram VCC D C S W/VPP HOLD Q M25P128 AI11313b 6/47 54 MHz operation is available only for 65 nm process technology devices, which are identified by the process identification digit ‘A’ in the device marking and process letter "B" in the part number. M25P128 Table Signal names Symbol C D Q S W/VPP HOLD VCC VSS Serial Clock Serial Data Input Serial Data Output Chip Select Write Protect/Enhanced Program supply voltage Hold Supply voltage Ground Figure VDFPN connections Direction Input Output Input Supply Ground M25P128 S1 Q2 W/VPP 3 VSS 4 8 VCC 7 HOLD 6C 5D AI11314b There is an exposed die paddle on the underside of the MLP8 package. This is pulled, internally, to VSS, and must not be allowed to be connected to any other voltage or signal line on the PCB. See Package mechanical section for package dimensions, and how to identify pin-1. Figure SO connections M25P128 HOLD 1 VCC 2 DU 3 DU 4 DU 5 DU 6 S7 Q8 16 C 15 D 14 DU 13 DU 12 DU 11 DU 10 VSS 9 W/VPP AI11315b 12 Ordering information Ordering information Table Ordering information scheme Example: M25P128 V MF 6 T P B Device Type M25P = Serial flash memory for code storage Device function 128 = 128 Mbit 16 Mbit x 8 Operating voltage V = VCC = to V Package MF = SO16 300 mil width ME = VDFPN8 8 x 6 mm MLP8 Device grade 6 = Industrial temperature range, to 85 °C. Device tested with standard test flow Option blank = Standard packing T = Tape and reel packing Plating technology P or G = RoHS compliant Process Technology Blank = 130nm MLC B = 65 nm SLC For a list of available options speed, package, etc. or for further information on any aspect of this device, please contact your nearest Numonyx sales office. The category of second-level interconnect is marked on the package and on the inner box label, in compliance with JEDEC Standard JESD97. The maximum ratings related to soldering conditions are also marked on the inner box label. 45/47 M25P128 Changes 02-May-2005 09-Jun-2005 First issue. Table 2 Protected area sizes updated. Memory capacity modified in Section Read identification RDID . 28-Aug-2005 Updated tPP values in Table 17 AC characteristics for 130 nm devices and tVSL value in Table 8 Power-up timing and VWI threshold for 65 nm devices. Modified information in Section Page programming and Section Page program PP . 20-Jan-2006 17-Oct-2006 10-Dec-2007 26-Nov-2009 17-Dec-2009 Document status promoted from Target specification to Preliminary data. Packages are compliant. Blank option removed under Plating technology in Table Read Electronic Signature RES instruction removed. ICC1 parameter updated in Table 14 DC characteristics for 65 nm devices. Document status promoted from Preliminary Data to full Datasheet. Write Protect pin W changed to Write protect/enhanced program supply voltage W/VPP . Section Fast program/erase mode and Added “Process Technology” to Ordering Information table. 1-Feb-2010 Added sector erase cycle times to Table AC characteristics for 65 nm devices. 6 Changed Icc3 test conditions in Table DC characteristics for 65 nm devices as follows 50 MHz to 54 MHz and 20 MHz to 33 MHz. 46/47 M25P128 Please Read Carefully INFORMATION IN THIS DOCUMENT IS PROVIDED IN CONNECTION WITH NUMONYX PRODUCTS. NO LICENSE, EXPRESS OR IMPLIED, BY ESTOPPEL OR OTHERWISE, TO ANY INTELLECTUAL PROPERTY RIGHTS IS GRANTED BY THIS DOCUMENT. EXCEPT AS PROVIDED IN NUMONYX'S TERMS AND CONDITIONS OF SALE FOR SUCH PRODUCTS, NUMONYX ASSUMES NO LIABILITY WHATSOEVER, AND NUMONYX DISCLAIMS ANY EXPRESS OR IMPLIED WARRANTY, RELATING TO SALE AND/OR USE OF NUMONYX PRODUCTS INCLUDING LIABILITY OR WARRANTIES RELATING TO FITNESS FOR A PARTICULAR PURPOSE, MERCHANTABILITY, OR INFRINGEMENT OF ANY PATENT, COPYRIGHT OR OTHER INTELLECTUAL PROPERTY RIGHT. Numonyx products are not intended for use in medical, life saving, life sustaining, critical control or safety systems, or in nuclear facility applications. Numonyx may make changes to specifications and product descriptions at any time, without notice. Numonyx, B.V. may have patents or pending patent applications, trademarks, copyrights, or other intellectual property rights that relate to the presented subject matter. The furnishing of documents and other materials and information does not provide any license, express or implied, by estoppel or otherwise, to any such patents, trademarks, copyrights, or other intellectual property rights. Designers must not rely on the absence or characteristics of any features or instructions marked “reserved” or “undefined.” Numonyx reserves these for future definition and shall have no responsibility whatsoever for conflicts or incompatibilities arising from future changes to them. Contact your local Numonyx sales office or your distributor to obtain the latest specifications and before placing your product order. Copies of documents which have an order number and are referenced in this document, or other Numonyx literature may be obtained by visiting Numonyx's website at Numonyx StrataFlash is a trademark or registered trademark of Numonyx or its subsidiaries in the United States and other countries. *Other names and brands may be claimed as the property of others. Copyright 2010, Numonyx, B.V., All Rights Reserved. 47/47

PDF Datasheet Preview

M25P128
128-Mbit, low-voltage, serial flash memory with 54-MHz SPI bus interface
- 128-Mbit flash memory - to V single supply voltage - SPI bus compatible serial interface - 54 MHz clock rate maximum for 65 nm
devices - VPP = 9 V for fast program/erase mode
optional - Page program up to 256 Bytes :
in ms typical for 65 nm devices in ms typical with VPP = 9 V for 65 nm
devices - Sector erase 2 Mbit - Bulk erase 128 Mbit - Electronic signature

JEDEC standard two-byte signature 2018h
- More than 10,000 erase/program cycles per sector
- More than 20-year data retention - RoHS compliant packages

VDFPN8 ME 8 x 6 mm MLP8

SO16 MF 300 mils width

March 2010
1/47

Contents

Contents

M25P128

Description 6

Signal description 8

Serial data output Q 8

Serial data input D 8

Serial clock C 8

Chip Select S 8

Hold 8

Write protect/enhanced program supply voltage W/VPP 9 VCC supply voltage 9 VSS ground 9

SPI modes 10

Operating features 12

Page programming 12

Sector erase and bulk erase 12

Polling during a write, program or erase cycle 12

Fast program/erase mode 12

Active power and standby power modes 13

Status register 13

Protection modes 13

Hold condition 14

Memory organization 16

Instructions 19

Write enable WREN 20

Write disable WRDI 20

Read identification RDID 21

Read status register RDSR 22
Ordering information 45
3/47

List of tables

List of tables

M25P128

Table

Table
4/47

M25P128

List of figures

List of figures

Figure

Logic diagram 6 VDFPN connections 7 SO connections 7 Bus master and memory devices on the SPI bus 10 SPI modes supported 11 Hold condition activation 15 Block diagram 16 Write enable WREN instruction sequence 20 Write disable WRDI instruction sequence 20 Read identification RDID instruction sequence and data-out sequence 21 Read status register RDSR instruction sequence and data-out sequence 23 Write status register WRSR instruction sequence 25 Read data bytes READ instruction sequence and data-out sequence 26 Read data bytes at higher speed FAST_READ instruction and data-out sequence 27 Page program PP instruction sequence 29 Sector erase SE instruction sequence 30 Bulk erase BE instruction sequence. 31 Power-up timing 33 AC measurement I/O waveform 35 Serial input timing 40 Write protect setup and hold timing during WRSR when SRWD 41 Hold timing 41 Output timing 42 VPPH timing 42 VDFPN8 MLP8 , 8-lead Very thin Dual Flat Package No lead, 8x6mm, package outline 43 SO16 wide 16 lead Plastic Small Outline, 300 mils body width 44
5/47

M25P128

Note:

The M25P128 is a 128-Mbit 16 Mbit x 8 serial flash memory, with advanced write protection mechanisms and accessed by a high speed SPI-compatible bus, which allows clock frequency operation up to 54 MHz 1 .

The memory can be programmed 1 to 256 Bytes at a time, using the page program instruction.

The memory is organized as 64 sectors, each containing 1024 pages. Each page is 256 bytes wide. Thus, the whole memory can be viewed as consisting of 65536 pages, or 16777216 bytes.

An enhanced fast program/erase mode is available to speed up operations in factory environment. The device enters this mode whenever the VPPH voltage is applied to the write protect/enhanced program supply voltage pin W/VPP .

The whole memory can be erased using the bulk erase instruction, or a sector at a time, using the sector erase instruction.

In order to meet environmental requirements, Numonyx offers these devices in Lead-free and RoHS compliant packages.

Important this datasheet details the functionality of the M25P128 devices, based on the previous 130 nm MLC process or based on the current 65 nm SLC process, identified by the process identification digit ‘A’ in the device marking and process letter "B" in the part number. The new device is backward compatible with the old one.

Figure Logic diagram VCC

D C S W/VPP HOLD

Q M25P128

AI11313b
6/47
54 MHz operation is available only for 65 nm process technology devices, which are identified by the process identification digit ‘A’ in the device marking and process letter "B" in the part number.

M25P128

Table Signal names Symbol

C D Q S W/VPP HOLD VCC VSS

Serial Clock Serial Data Input Serial Data Output Chip Select Write Protect/Enhanced Program supply voltage Hold Supply voltage Ground

Figure VDFPN connections

Direction Input Output Input Supply

Ground

M25P128

S1 Q2 W/VPP 3 VSS 4
8 VCC 7 HOLD 6C 5D

AI11314b

There is an exposed die paddle on the underside of the MLP8 package. This is pulled, internally, to VSS, and must not be allowed to be connected to any other voltage or signal line on the PCB.

See Package mechanical section for package dimensions, and how to identify pin-1.

Figure SO connections

M25P128

HOLD 1 VCC 2 DU 3 DU 4 DU 5 DU 6 S7 Q8
16 C 15 D 14 DU 13 DU 12 DU 11 DU 10 VSS
9 W/VPP

AI11315b
12 Ordering information
Ordering information
Table Ordering information scheme

Example:

M25P128 V MF 6 T P B

Device Type

M25P = Serial flash memory for code storage

Device function
128 = 128 Mbit 16 Mbit x 8

Operating voltage

V = VCC = to V Package

MF = SO16 300 mil width

ME = VDFPN8 8 x 6 mm MLP8

Device grade
6 = Industrial temperature range, to 85 °C. Device tested with standard test flow

Option
blank = Standard packing

T = Tape and reel packing

Plating technology

P or G = RoHS compliant

Process Technology

Blank = 130nm MLC B = 65 nm SLC

For a list of available options speed, package, etc. or for further information on any aspect of this device, please contact your nearest Numonyx sales office.

The category of second-level interconnect is marked on the package and on the inner box label, in compliance with JEDEC Standard JESD97. The maximum ratings related to soldering conditions are also marked on the inner box label.
45/47

M25P128

Changes
02-May-2005 09-Jun-2005

First issue. Table 2 Protected area sizes updated.

Memory capacity modified in Section Read identification RDID .
28-Aug-2005

Updated tPP values in Table 17 AC characteristics for 130 nm
devices and tVSL value in Table 8 Power-up timing and VWI threshold for 65 nm devices. Modified information in Section

Page programming and Section Page program PP .
20-Jan-2006
17-Oct-2006 10-Dec-2007 26-Nov-2009 17-Dec-2009

Document status promoted from Target specification to Preliminary data.

Packages are compliant. Blank option removed under

Plating technology in Table Read Electronic Signature RES
instruction removed. ICC1 parameter updated in Table 14 DC characteristics for 65 nm devices.

Document status promoted from Preliminary Data to full Datasheet.

Write Protect pin W changed to Write protect/enhanced program
supply voltage W/VPP . Section Fast program/erase mode and
Added “Process Technology” to Ordering Information table.
1-Feb-2010

Added sector erase cycle times to Table AC characteristics for 65 nm devices. 6 Changed Icc3 test conditions in Table DC characteristics for 65 nm devices as follows 50 MHz to 54 MHz and 20 MHz to 33 MHz.
46/47

M25P128

Please Read Carefully INFORMATION IN THIS DOCUMENT IS PROVIDED IN CONNECTION WITH NUMONYX PRODUCTS. NO LICENSE, EXPRESS OR IMPLIED, BY ESTOPPEL OR OTHERWISE, TO ANY INTELLECTUAL PROPERTY RIGHTS IS GRANTED BY THIS DOCUMENT. EXCEPT AS PROVIDED IN NUMONYX'S TERMS AND CONDITIONS OF SALE FOR SUCH PRODUCTS, NUMONYX ASSUMES NO LIABILITY

WHATSOEVER, AND NUMONYX DISCLAIMS ANY EXPRESS OR IMPLIED WARRANTY, RELATING TO SALE AND/OR USE OF NUMONYX PRODUCTS INCLUDING LIABILITY OR WARRANTIES RELATING TO FITNESS FOR A PARTICULAR PURPOSE, MERCHANTABILITY, OR INFRINGEMENT OF ANY PATENT, COPYRIGHT OR OTHER INTELLECTUAL PROPERTY RIGHT.

Numonyx products are not intended for use in medical, life saving, life sustaining, critical control or safety systems, or in nuclear facility applications.

Numonyx may make changes to specifications and product descriptions at any time, without notice. Numonyx, B.V. may have patents or pending patent applications, trademarks, copyrights, or other intellectual property rights that relate to the presented subject matter. The furnishing of documents and other materials and information does not provide any license, express or implied,
by estoppel or otherwise, to any such patents, trademarks, copyrights, or other intellectual property rights. Designers must not rely on the absence or characteristics of any features or instructions marked “reserved” or “undefined.” Numonyx reserves these for future definition and shall have no responsibility whatsoever for conflicts or incompatibilities arising from future changes to them.

Contact your local Numonyx sales office or your distributor to obtain the latest specifications and before placing your product order. Copies of documents which have an order number and are referenced in this document, or other Numonyx literature may be obtained by
visiting Numonyx's website at Numonyx StrataFlash is a trademark or registered trademark of Numonyx or its subsidiaries in the United States and other countries.
*Other names and brands may be claimed as the property of others. Copyright 2010, Numonyx, B.V., All Rights Reserved.
47/47

Notice: we do not provide any warranties that information, datasheets, application notes, circuit diagrams, or software stored on this website are up-to-date or error free. The archived M25P128-VMF6TPTR Datasheet file may be downloaded here without warranties.

Datasheet ID: M25P128-VMF6TPTR 648281