TP0606N3-G

TP0606N3-G Datasheet

TP0606

Part	Datasheet
TP0606N3-G	TP0606N3-G (pdf)

Related Parts	Information
TP0606N3-G-P003	TP0606N3-G-P003
TP0606N3-G-P002	TP0606N3-G-P002

PDF Datasheet Preview
Supertex inc. TP0606 P-Channel Enhancement-Mode Vertical DMOS FET ►► Low threshold -2.4V max. ►► High input impedance ►► Low input capacitance 80pF typ. ►► Fast switching speeds ►► Low on-resistance ►► Free from secondary breakdown ►► Low input and output leakage ►► Logic level interfaces ideal for TTL and CMOS ►► Solid state relays ►► Battery operated systems ►► Photo voltaic drives ►► Analog switches ►► General purpose line drivers ►► Telecom switches This low threshold, enhancement-mode normally-off transistor utilizes a vertical DMOS structure and Supertex’s well-proven, silicon-gate manufacturing process. This combination produces a device with the power handling capabilities of bipolar transistors and the high input impedance and positive temperature coefficient inherent in MOS devices. Characteristic of all MOS structures, this device is free from thermal runaway and thermally-induced secondary breakdown. Supertex’s vertical DMOS FETs are ideally suited to a wide range of switching and amplifying applications where very low threshold voltage, high breakdown voltage, high input impedance, low input capacitance, and fast switching speeds are desired. Ordering Information Device Package TO-92 NW Die in wafer form Wafer / Die Options NJ Die on adhesive tape TP0606 TP0606N3-G TP2506NW TP2506NJ For packaged products, -G indicates package is RoHS compliant ‘Green’ . Devices in Wafer / Die form are RoHS compliant ‘Green’ . Refer to Die Specification VF25 for layout and dimensions. ND Die in waffle pack TP2506ND Product Summary Pin Configuration Device BVDSS/BVDGS RDS ON max Ω ID ON min A VGS th max V TP0606N3-G DRAIN Absolute Maximum Ratings SOURCE Parameter Drain-to-source voltage Drain-to-gate voltage Gate-to-source voltage Value BVDSS BVDGS ±20V GATE TO-92 N3 Product Marking Operating and storage temperature -55OC to +150OC Absolute Maximum Ratings are those values beyond which damage to the device may occur. Functional operation under these conditions is not implied. Continuous operation of the device at the absolute rating level may affect device reliability. All voltages are referenced to device ground. SiTP YY = Year Sealed 0 6 0 6 WW = Week Sealed YYWW = “Green” Packaging Package may or may not include the following marks Si or TO-92 N3 Supertex inc. ● 1235 Bordeaux Drive, Sunnyvale, CA 94089 ● Tel 408-222-8888 ●

PDF Datasheet Preview

Supertex inc.

TP0606

P-Channel Enhancement-Mode Vertical DMOS FET
►► Low threshold -2.4V max. ►► High input impedance ►► Low input capacitance 80pF typ. ►► Fast switching speeds ►► Low on-resistance ►► Free from secondary breakdown ►► Low input and output leakage
►► Logic level interfaces ideal for TTL and CMOS ►► Solid state relays ►► Battery operated systems ►► Photo voltaic drives ►► Analog switches ►► General purpose line drivers ►► Telecom switches

This low threshold, enhancement-mode normally-off transistor utilizes a vertical DMOS structure and Supertex’s well-proven, silicon-gate manufacturing process. This combination produces a device with the power handling capabilities of bipolar transistors and the high input impedance and positive temperature coefficient inherent in MOS devices. Characteristic of all MOS structures, this device is free from thermal runaway and thermally-induced secondary breakdown.

Supertex’s vertical DMOS FETs are ideally suited to a wide range of switching and amplifying applications where very low threshold voltage, high breakdown voltage, high input impedance, low input capacitance, and fast switching speeds are desired.
Ordering Information

Device

Package TO-92

NW Die in wafer form

Wafer / Die Options

NJ Die on adhesive tape

TP0606

TP0606N3-G

TP2506NW

TP2506NJ

For packaged products, -G indicates package is RoHS compliant ‘Green’ . Devices in Wafer / Die form are RoHS compliant ‘Green’ . Refer to Die Specification VF25 for layout and dimensions.

ND Die in waffle pack

TP2506ND

Product Summary

Pin Configuration

Device

BVDSS/BVDGS

RDS ON
max Ω

ID ON
min A

VGS th
max V

TP0606N3-G

DRAIN

Absolute Maximum Ratings

SOURCE

Parameter Drain-to-source voltage Drain-to-gate voltage Gate-to-source voltage

Value BVDSS BVDGS ±20V

GATE

TO-92 N3

Product Marking

Operating and storage temperature -55OC to +150OC

Absolute Maximum Ratings are those values beyond which damage to the device may occur. Functional operation under these conditions is not implied. Continuous operation of the device at the absolute rating level may affect device reliability. All voltages are referenced to device ground.

SiTP YY = Year Sealed
0 6 0 6 WW = Week Sealed

YYWW
= “Green” Packaging

Package may or may not include the following marks Si or

TO-92 N3

Supertex inc. ● 1235 Bordeaux Drive, Sunnyvale, CA 94089 ● Tel 408-222-8888 ●

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Datasheet ID: TP0606N3-G 648239