LPC47N217N-ABZJ-TR

LPC47N217N-ABZJ-TR Datasheet

LPC47N217N

Part	Datasheet
LPC47N217N-ABZJ-TR	LPC47N217N-ABZJ-TR (pdf)

Related Parts	Information
LPC47N217N-ABZJ	LPC47N217N-ABZJ

PDF Datasheet Preview
LPC47N217N 56-Pin Super I/O with LPC Interface PRODUCT FEATURES Data Brief - Volt Operation 5V tolerant - Programmable Wakeup Event Interface IO_PME# Pin - SMI Support IO_SMI# Pin - GPIOs 13 - Two IRQ Input Pins - XNOR Chain - PC2001 - ACPI Compliant - 56-pin QFN Lead-free RoHS Compliant package - Intelligent Auto Power Management - Serial Port One Full Function Serial Port High Speed 16C550A Compatible UART with Send/Receive 16-Byte FIFO Supports 230k and 460k Baud Programmable Baud Rate Generator Modem Control Circuitry Multiple Base I/O Address options and 15 IRQ Options - Multi-Mode Parallel Port with ChiProtect Standard Mode IBM and PS/2 Compatible Bidirectional Parallel Port Enhanced Parallel Port EPP Compatible - EPP and EPP IEEE 1284 Compliant IEEE 1284 Compliant Enhanced Capabilities Port ECP ChiProtect Circuitry for Protection Against Damage Due to Printer Power-On 192 Base I/O Address, 15 IRQ and 3 DMA Options - LPC Bus Host Interface Multiplexed Command, Address and Data Bus 8-Bit I/O Transfers 8-Bit DMA Transfers 16-Bit Address Qualification Serial IRQ Interface Compatible with Serialized IRQ Support for PCI Systems PCI CLKRUN# Support Power Management Event IO_PME# Interface Pin SMSC LPC47N217N 56QFN PRODUCT PREVIEW 56-Pin Super I/O with LPC Interface ORDER NUMBER S LPC47N217N-ABZJ for 56-pin QFN Lead-free ROHS Compliant package LPC47N217N-ABZJ-TR for 56-pin QFN Lead-free ROHS Compliant package tape and reel 80 ARKAY DRIVE, HAUPPAUGE, NY 11788 631 435-6000, FAX 631 273-3123 Copyright 2009 SMSC or its subsidiaries. All rights reserved. Circuit diagrams and other information relating to SMSC products are included as a means of illustrating typical applications. Consequently, complete information sufficient for construction purposes is not necessarily given. Although the information has been checked and is believed to be accurate, no responsibility is assumed for inaccuracies. SMSC reserves the right to make changes to specifications and product descriptions at any time without notice. Contact your local SMSC sales office to obtain the latest specifications before placing your product order. The provision of this information does not convey to the purchaser of the described semiconductor devices any licenses under any patent rights or other intellectual property rights of SMSC or others. All sales are expressly conditional on your agreement to the terms and conditions of the most recently dated version of SMSC's standard Terms of Sale Agreement dated before the date of your order the "Terms of Sale Agreement" . The product may contain design defects or errors known as anomalies which may cause the product's functions to deviate from published specifications. Anomaly sheets are available upon request. SMSC products are not designed, intended, authorized or warranted for use in any life support or other application where product failure could cause or contribute to personal injury or severe property damage. Any and all such uses without prior written approval of an Officer of SMSC and further testing and/or modification will be fully at the risk of the customer. Copies of this document or other SMSC literature, as well as the Terms of Sale Agreement, may be obtained by visiting SMSC’s website at SMSC is a registered trademark of Standard Microsystems Corporation “SMSC” . Product names and company names are the trademarks of their respective holders. PRODUCT PREVIEW SMSC LPC47N217N 56QFN 56-Pin Super I/O with LPC Interface The SMSC LPC47N217N is a 3.3V PC 99, PC2001, and ACPI compliant Super I/O Controller. The LPC47N217N implements the LPC interface, a pin reduced ISA interface which provides the same or better performance as the ISA/X-bus with a substantial savings in pins used. The part also includes 13 GPIO pins. The LPC47N217N incorporates a 16C550A compatible UART and one Multi-Mode parallel port with ChiProtect circuitry plus EPP and ECP support. The LPC47N217N is easy to use and offers lower system cost and reduced board area. The LPC47N217N offers a full 16-bit internally decoded address bus, a Serial IRQ interface with PCI CLKRUN# support, relocatable configuration ports, and three DMA channel options. The parallel port is compatible with IBM PC/AT architectures, as well as IEEE 1284 EPP and ECP. The parallel port ChiProtect circuitry prevents damage caused by an attached powered printer when the LPC47N217N is not powered. The LPC47N217N features Software Configurable Logic SCL for ease of use. SCL allows programmable system configuration of key functions such as the parallel port and UART. The LPC47N217N supports the ISA Plug-and-Play Standard register set Version 1.0a and provides the recommended functionality to support Windows operating systems, PC99, and PC2001. The I/O Address, DMA Channel, and Hardware IRQ of each device in the LPC47N217N may be reprogrammed through the internal configuration registers. There are multiple I/O address location options, a Serialized IRQ interface, and three DMA channels. SMSC LPC47N217N 56QFN PRODUCT PREVIEW Block Diagram 56-Pin Super I/O with LPC Interface IO_SMI#* IO_PME# SMI PME WDT CONTROL, ADDRESS, DATA SER_IRQ PCI_CLK

PDF Datasheet Preview

LPC47N217N
56-Pin Super I/O with LPC Interface

PRODUCT FEATURES

Data Brief
- Volt Operation 5V tolerant - Programmable Wakeup Event Interface IO_PME#

Pin - SMI Support IO_SMI# Pin - GPIOs 13 - Two IRQ Input Pins - XNOR Chain - PC2001 - ACPI Compliant - 56-pin QFN Lead-free RoHS Compliant package - Intelligent Auto Power Management - Serial Port

One Full Function Serial Port High Speed 16C550A Compatible UART with

Send/Receive 16-Byte FIFO Supports 230k and 460k Baud Programmable Baud Rate Generator Modem Control Circuitry Multiple Base I/O Address options and 15 IRQ Options
- Multi-Mode Parallel Port with ChiProtect

Standard Mode IBM and PS/2 Compatible Bidirectional Parallel Port

Enhanced Parallel Port EPP Compatible - EPP and EPP IEEE 1284 Compliant

IEEE 1284 Compliant Enhanced Capabilities Port ECP

ChiProtect Circuitry for Protection Against Damage Due to Printer Power-On
192 Base I/O Address, 15 IRQ and 3 DMA Options
- LPC Bus Host Interface

Multiplexed Command, Address and Data Bus 8-Bit I/O Transfers 8-Bit DMA Transfers 16-Bit Address Qualification Serial IRQ Interface Compatible with Serialized IRQ

Support for PCI Systems PCI CLKRUN# Support Power Management Event IO_PME# Interface Pin

SMSC LPC47N217N 56QFN

PRODUCT PREVIEW
56-Pin Super I/O with LPC Interface

ORDER NUMBER S LPC47N217N-ABZJ for 56-pin QFN Lead-free ROHS Compliant package LPC47N217N-ABZJ-TR for 56-pin QFN Lead-free ROHS Compliant package tape and reel
80 ARKAY DRIVE, HAUPPAUGE, NY 11788 631 435-6000, FAX 631 273-3123

Copyright 2009 SMSC or its subsidiaries. All rights reserved.

Circuit diagrams and other information relating to SMSC products are included as a means of illustrating typical applications. Consequently, complete information sufficient for construction purposes is not necessarily given. Although the information has been checked and is believed to be accurate, no responsibility is assumed for inaccuracies. SMSC reserves the right to make changes to specifications and product descriptions at any time without notice. Contact your local SMSC sales office to obtain the latest specifications before placing your product order. The provision of this information does not convey to the purchaser of the described semiconductor devices any licenses under any patent rights or other intellectual property rights of SMSC or others. All sales are expressly conditional on your agreement to the terms and conditions of the most recently dated version of SMSC's standard Terms of Sale Agreement dated before the date of your order the "Terms of Sale Agreement" . The product may contain design defects or errors known as anomalies which may cause the product's functions to deviate from published specifications. Anomaly sheets are available upon request. SMSC products are not designed, intended, authorized or warranted for use in any life support or other application where product failure could cause or contribute to personal injury or severe property damage. Any and all such uses without prior written approval of an Officer of SMSC and further testing and/or modification will be fully at the risk of the customer. Copies of this document or other SMSC literature, as well as the Terms of Sale Agreement, may be obtained by visiting SMSC’s website at SMSC is a registered trademark of Standard Microsystems Corporation “SMSC” . Product names and company names are the trademarks of their respective holders.

PRODUCT PREVIEW

SMSC LPC47N217N 56QFN
56-Pin Super I/O with LPC Interface

The SMSC LPC47N217N is a 3.3V PC 99, PC2001, and ACPI compliant Super I/O Controller. The LPC47N217N implements the LPC interface, a pin reduced ISA interface which provides the same or better performance as the ISA/X-bus with a substantial savings in pins used. The part also includes 13 GPIO pins.

The LPC47N217N incorporates a 16C550A compatible UART and one Multi-Mode parallel port with ChiProtect circuitry plus EPP and ECP support. The LPC47N217N is easy to use and offers lower system cost and reduced board area.

The LPC47N217N offers a full 16-bit internally decoded address bus, a Serial IRQ interface with PCI CLKRUN# support, relocatable configuration ports, and three DMA channel options.

The parallel port is compatible with IBM PC/AT architectures, as well as IEEE 1284 EPP and ECP. The parallel port ChiProtect circuitry prevents damage caused by an attached powered printer when the LPC47N217N is not powered.

The LPC47N217N features Software Configurable Logic SCL for ease of use. SCL allows programmable system configuration of key functions such as the parallel port and UART.

The LPC47N217N supports the ISA Plug-and-Play Standard register set Version 1.0a and provides the recommended functionality to support Windows operating systems, PC99, and PC2001. The I/O Address, DMA Channel, and Hardware IRQ of each device in the LPC47N217N may be reprogrammed through the internal configuration registers. There are multiple I/O address location options, a Serialized IRQ interface, and three DMA channels.

SMSC LPC47N217N 56QFN

PRODUCT PREVIEW

Block Diagram
56-Pin Super I/O with LPC Interface

IO_SMI#* IO_PME# SMI PME WDT

CONTROL, ADDRESS, DATA

SER_IRQ

PCI_CLK

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Notice: we do not provide any warranties that information, datasheets, application notes, circuit diagrams, or software stored on this website are up-to-date or error free. The archived LPC47N217N-ABZJ-TR Datasheet file may be downloaded here without warranties.

Datasheet ID: LPC47N217N-ABZJ-TR 648127