LPC47M192-NW

LPC47M192-NW Datasheet

LPC47M192

Part	Datasheet
LPC47M192-NW	LPC47M192-NW (pdf)

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LPC47M192 LPC Super I/O with Hardware Monitoring Block Volt Operation SIO Block is 5 Volt Tolerant LPC Interface ACPI Compliant Fan Control - Fan Speed Control Outputs 2 - Fan Tachometer Inputs 2 Programmable Wake-up Event Interface PC98, PC99, PC01 Compliant Dual Game Port Interface MPU-401 MIDI Support General Purpose Input/Output Pins 37 ISA Plug-and-Play Compatible Register Set Intelligent Auto Power Management System Management Interrupt 2.88MB Super I/O Floppy Disk Controller - Licensed CMOS 765B Floppy Disk Controller - Software and Register Compatible with SMSC's Proprietary 82077AA Compatible Core - Supports Two Floppy Drives - Configurable Open Drain/Push-Pull Output Drivers - Supports Vertical Recording Format - 16-Byte Data FIFO - 100% IBM Compatibility - Detects All Overrun and Underrun Conditions - Sophisticated Power Control Circuitry PCC Including Multiple Powerdown Modes for Reduced Power Consumption - DMA Enable Logic - Data Rate and Drive Control Registers - 480 Address, Up to 15 IRQ and Three DMA Options Enhanced Digital Data Separator - 2 Mbps, 1 Mbps, 500 Kbps, 300 Kbps, 250 Kbps Data Rates - Programmable Precompensation Modes Keyboard Controller - 8042 Software Compatible - 8 Bit Microcomputer - 2k Bytes of Program ROM - 256 Bytes of Data RAM - Four Open Drain Outputs Dedicated for Keyboard/Mouse Interface - Asynchronous Access to Two Data Registers and One Status Register - Supports Interrupt and Polling Access - 8 Bit Counter Timer - Port 92 Support - Fast Gate A20 and KRESET Outputs Serial Ports - Two Full Function Serial Ports - High Speed 16C550A Compatible UARTs with Send/Receive 16-Byte FIFOs - Supports 230k and 460k Baud Programmable Baud Rate Generator Modem Control Circuitry - 480 Address and 15 IRQ Options Infrared Port - Multiprotocol Infrared Interface - IrDA Compliant - SHARP ASK IR - 480 Addresses, Up to 15 IRQ Multi-Mode Parallel Port with ChiProtect - Standard Mode IBM PC/XT, PC/AT, and PS/2 Compatible Bi-directional Parallel Port - Enhanced Parallel Port EPP Compatible EPP and EPP IEEE 1284 Compliant - IEEE 1284 Compliant Enhanced Capabilities Port ECP - ChiProtect Circuitry for Protection - 960 Address, Up to 15 IRQ and Three DMA Options LPC Interface - Multiplexed Command, Address and Data Bus - Serial IRQ Interface Compatible with Serialized IRQ Support for PCI Systems - PME Interface Hardware Monitor - Monitor Power supplies +2.5V, +3.3V, +5V, +12V, +1.8V, +1.5V, Vccp processor voltage , and VCC or HVSB - Remote Thermal Diode Sensing for Two External Temperature Measurements - Internal Ambient Temperature Measurement - Limit Comparison of all Monitored Values - System Management Bus SMBus Interface - THERM# Pin for out-of-limit Temperature or Voltage Indication - RESET# Pin for generating 20msec Low Reset Pulse - Configurable offset for internal or external temperature channels. AMI Keyboard BIOS ROM 128 Pin QFP, 3.2mm footprint Package green, lead-free package also available SMSC DS LPC47M192 DATASHEET 80 Arkay Drive Hauppauge, NY 11788 631 435-6000 FAX 631 273-3123 Copyright SMSC All rights reserved. Circuit diagrams and other information relating to SMSC products are included as a means of illustrating typical applications. Consequently, complete information sufficient for construction purposes is not necessarily given. Although the information has been checked and is believed to be accurate, no responsibility is assumed for inaccuracies. SMSC reserves the right to make changes to specifications and product descriptions at any time without notice. Contact your local SMSC sales office to obtain the latest specifications before placing your product order. The provision of this information does not convey to the purchaser of the described semiconductor devices any licenses under any patent rights or other intellectual property rights of SMSC or others. All sales are expressly conditional on your agreement to the terms and conditions of the most recently dated version of SMSC's standard Terms of Sale Agreement dated before the date of your order the "Terms of Sale Agreement" . The product may contain design defects or errors known as anomalies which may cause the product's functions to deviate from published specifications. Anomaly sheets are available upon request. SMSC products are not designed, intended, authorized or warranted for use in any life support or other application where product failure could cause or contribute to personal injury or severe property damage. Any and all such uses without prior written approval of an Officer of SMSC and further testing and/or modification will be fully at the risk of the customer. Copies of this document or other SMSC literature, as well as the Terms of Sale Agreement, may be obtained by visiting SMSC’s website at SMSC is a registered trademark of Standard Microsystems Corporation “SMSC” . Product names and company names are the trademarks of their respective holders. SMSC DISCLAIMS AND EXCLUDES ANY AND ALL WARRANTIES, INCLUDING WITHOUT LIMITATION ANY AND ALL IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE, AND AGAINST INFRINGEMENT AND THE LIKE, AND ANY AND ALL WARRANTIES ARISING FROM ANY COURSE OF DEALING OR USAGE OF TRADE. SMSC DS LPC47M192 DATASHEET 1 GENERAL DESCRIPTION The LPC47M192 is a 3.3V Super I/O Block is 5V tolerant PC99/PC2001 compliant Super I/O controller with an LPC interface and Hardware Monitoring capabilities. The LPC47M192’s hardware monitoring capability includes voltage and temperature monitoring with the ability to alert the system of out-of-limit conditions. There are 7 analog inputs for monitoring external voltages of +1.5V, +1.8V, +2.5V, +3.3V, +5V, +12V and Vccp core processor voltage , as well as internal monitoring of the devices own HVCC or HVSB. The LPC47M192 includes support for monitoring two external temperatures via thermal diode inputs and an internal sensor for measuring ambient temperature. The nTHERM pin is implemented to indicate out-of-limit temperature and voltage conditions. The block has an ability to output 20ms low pulse via nRESET pin. The hardware monitoring block of the LPC47M192 is accessible via the System Management Bus SMBus . The LPC47M192 incorporates complete legacy Super I/O functionality including an 8042 based keyboard and mouse controller, an IEEE 1284, EPP, and ECP compatible parallel port, two serial ports that are 16C550A UART compatible, two IrDA infrared ports, and a floppy disk controller with SMSC's true CMOS 765B core and enhanced digital data separator, The true CMOS 765B core provides 100% compatibility with IBM PC/XT and PC/AT architectures and is software and register compatible with SMSC's proprietary 82077AA core. System related functionality, which offers flexibility to the system designer, includes an MPU-401 MIDI interface, 37 General Purpose I/O control functions, control of two LED’s, a game port interface supporting two joysticks, and fan control using fan tachometer inputs and pulse width modulator, PWM , outputs The LPC47M192 is ACPI compatible and therefore supports multiple low power-down modes. It incorporates sophisticated power control circuitry PCC which includes support for keyboard and mouse wake-up events. The LPC47M192 supports the ISA Plug-and-Play Standard register set Version 1.0a . The I/O Address, DMA Channel and hardware IRQ of each logical device in the LPC47M192 may be reprogrammed through the internal configuration registers. There are up to 480 960 - Parallel Port I/O address location options, a Serialized IRQ interface, and Three DMA channels. The LPC47M192 does not require any external filter components and is therefore easy to use and offers lower system costs and reduced board area. PART# LPC47M192-NC LPC47M192-NW ORDERING INFORMATION PACKAGE 128 Pin QFP 128 Pin QFP Green, Lead-Free KEYBOARD BIOS AMI SMSC DS LPC47M192 DATASHEET TABLE OF CONTENTS 1 GENERAL DESCRIPTION 3 2 PIN LAYOUT 10 3 PIN CONFIGURATION 11 4 DESCRIPTION OF PIN 12 BUFFER NAME 20 PINS THAT REQUIRE EXTERNAL PULLUP 20 Super I/O Pins Hardware Monitoring Block 5 BLOCK 22 6 POWER FUNCTIONALITY 23 VCC/HVCC POWER 23 3 VOLT OPERATION / 5 VOLT TOLERANCE VREF 23 VTR 23 Trickle Power Functionality KHZ TRICKLE CLOCK 25 Indication of 32KHZ Clock INTERNAL 25 MAXIMUM CURRENT 25 Super I/O Hardware Monitoring Block Functions POWER MANAGEMENT EVENTS 26 7 FUNCTIONAL 27 SUPER I/O REGISTERS 27 HOST PROCESSOR INTERFACE LPC 27 LPC INTERFACE LPC Interface Signal LPC Cycles Field Definitions LFRAME# I/O Read and Write Cycles DMA Read and Write Cycles DMA Protocol POWER MANAGEMENT CLOCKRUN Protocol 29 LPCPD 29 SYNC Protocol Typical Usage 29 SYNC Timeout 30 SYNC Patterns and Maximum Number of SYNCS 30 SYNC Error 30 I/O and DMA START Fields 30 Reset 30 LPC TRANSFERS Wait State 30 FLOPPY DISK CONTROLLER 31 FDC Internal Registers STATUS REGISTER ENCODING Instruction DATA TRANSFER DIRECT SUPPORT FOR TWO FLOPPY SMSC DS LPC47M192 DATASHEET FDC Swap Bit SERIAL PORT 64 INFRARED 77 MPU-401 MIDI UART 78 Host Interface MIDI Data Port Status Bit 7 MIDI Receive Buffer Empty 79 Bit 6 MIDI Transmit Busy 80 MPU-401 Command Controller MIDI UART MPU-401 Configuration Registers Activate and I/O Base 83 PARALLEL PORT 83 IBM XT/AT Compatible, Bi-Directional and EPP Modes Extended Capabilities Parallel POWER MANAGEMENT 98 SERIAL IRQ 102 8042 KEYBOARD CONTROLLER DESCRIPTION 105 Keyboard External Keyboard and Mouse Interface Keyboard Power Interrupts Memory Configurations Register Definitions Host I/F Data 108 Host I/F Status 108 External Clock Signal Default Reset Conditions Keyboard and Mouse PME GENERAL PURPOSE 113 Lead-free ordering information added. Updated Package Outline 07/25/02 SMSC DS LPC47M192 Page 228 DATASHEET

PDF Datasheet Preview

LPC47M192

LPC Super I/O with Hardware Monitoring Block

Volt Operation SIO Block is 5 Volt Tolerant LPC Interface ACPI Compliant Fan Control
- Fan Speed Control Outputs 2 - Fan Tachometer Inputs 2 Programmable Wake-up Event Interface PC98, PC99, PC01 Compliant Dual Game Port Interface MPU-401 MIDI Support

General Purpose Input/Output Pins 37 ISA Plug-and-Play Compatible Register Set Intelligent Auto Power Management System Management Interrupt 2.88MB Super I/O Floppy Disk Controller
- Licensed CMOS 765B Floppy Disk Controller
- Software and Register Compatible with SMSC's Proprietary 82077AA Compatible Core
- Supports Two Floppy Drives - Configurable Open Drain/Push-Pull Output

Drivers - Supports Vertical Recording Format - 16-Byte Data FIFO - 100% IBM Compatibility - Detects All Overrun and Underrun

Conditions - Sophisticated Power Control Circuitry PCC

Including Multiple Powerdown Modes for Reduced Power Consumption - DMA Enable Logic - Data Rate and Drive Control Registers - 480 Address, Up to 15 IRQ and Three DMA Options Enhanced Digital Data Separator - 2 Mbps, 1 Mbps, 500 Kbps, 300 Kbps, 250 Kbps Data Rates - Programmable Precompensation Modes Keyboard Controller - 8042 Software Compatible - 8 Bit Microcomputer - 2k Bytes of Program ROM - 256 Bytes of Data RAM - Four Open Drain Outputs Dedicated for Keyboard/Mouse Interface - Asynchronous Access to Two Data Registers and One Status Register - Supports Interrupt and Polling Access - 8 Bit Counter Timer
- Port 92 Support - Fast Gate A20 and KRESET Outputs Serial Ports - Two Full Function Serial Ports - High Speed 16C550A Compatible UARTs
with Send/Receive 16-Byte FIFOs - Supports 230k and 460k Baud

Programmable Baud Rate Generator Modem Control Circuitry - 480 Address and 15 IRQ Options Infrared Port - Multiprotocol Infrared Interface - IrDA Compliant - SHARP ASK IR - 480 Addresses, Up to 15 IRQ Multi-Mode Parallel Port with ChiProtect - Standard Mode IBM PC/XT, PC/AT, and PS/2 Compatible Bi-directional Parallel Port - Enhanced Parallel Port EPP Compatible EPP and EPP IEEE 1284 Compliant - IEEE 1284 Compliant Enhanced Capabilities Port ECP - ChiProtect Circuitry for Protection - 960 Address, Up to 15 IRQ and Three DMA Options LPC Interface - Multiplexed Command, Address and Data Bus - Serial IRQ Interface Compatible with Serialized IRQ Support for PCI Systems - PME Interface Hardware Monitor - Monitor Power supplies +2.5V, +3.3V, +5V, +12V, +1.8V, +1.5V, Vccp processor voltage , and VCC or HVSB - Remote Thermal Diode Sensing for Two External Temperature Measurements - Internal Ambient Temperature Measurement - Limit Comparison of all Monitored Values - System Management Bus SMBus Interface - THERM# Pin for out-of-limit Temperature or Voltage Indication - RESET# Pin for generating 20msec Low Reset Pulse - Configurable offset for internal or external temperature channels. AMI Keyboard BIOS ROM 128 Pin QFP, 3.2mm footprint Package green, lead-free package also available

SMSC DS LPC47M192

DATASHEET
80 Arkay Drive Hauppauge, NY 11788 631 435-6000 FAX 631 273-3123

Copyright SMSC All rights reserved.

Circuit diagrams and other information relating to SMSC products are included as a means of illustrating typical applications. Consequently, complete information sufficient for construction purposes is not necessarily given. Although the information has been checked and is believed to be accurate, no responsibility is assumed for inaccuracies. SMSC reserves the right to make changes to specifications and product descriptions at any time without notice. Contact your local SMSC sales office to obtain the latest specifications before placing your product order. The provision of this information does not convey to the purchaser of the described semiconductor devices any licenses under any patent rights or other intellectual property rights of SMSC or others. All sales are expressly conditional on your agreement to the terms and conditions of the most recently dated version of SMSC's standard Terms of Sale Agreement dated before the date of your order the "Terms of Sale Agreement" . The product may contain design defects or errors known as anomalies which may cause the product's functions to deviate from published specifications. Anomaly sheets are available upon request. SMSC products are not designed, intended, authorized or warranted for use in any life support or other application where product failure could cause or contribute to personal injury or severe property damage. Any and all such uses without prior written approval of an Officer of SMSC and further testing and/or modification will be fully at the risk of the customer. Copies of this document or other SMSC literature, as well as the Terms of Sale Agreement, may be obtained by visiting SMSC’s website at SMSC is a registered trademark of Standard Microsystems Corporation “SMSC” . Product names and company names are the trademarks of their respective holders.

SMSC DISCLAIMS AND EXCLUDES ANY AND ALL WARRANTIES, INCLUDING WITHOUT LIMITATION ANY AND ALL IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE, AND AGAINST INFRINGEMENT AND THE LIKE, AND ANY AND ALL WARRANTIES ARISING FROM ANY COURSE OF DEALING OR USAGE OF TRADE.

SMSC DS LPC47M192

DATASHEET
1 GENERAL DESCRIPTION

The LPC47M192 is a 3.3V Super I/O Block is 5V tolerant PC99/PC2001 compliant Super I/O controller with an LPC interface and Hardware Monitoring capabilities.

The LPC47M192’s hardware monitoring capability includes voltage and temperature monitoring with the ability to alert the system of out-of-limit conditions. There are 7 analog inputs for monitoring external voltages of +1.5V, +1.8V, +2.5V, +3.3V, +5V, +12V and Vccp core processor voltage , as well as internal monitoring of the devices own HVCC or HVSB. The LPC47M192 includes support for monitoring two external temperatures via thermal diode inputs and an internal sensor for measuring ambient temperature. The nTHERM pin is implemented to indicate out-of-limit temperature and voltage conditions. The block has an ability to output 20ms low pulse via nRESET pin. The hardware monitoring block of the LPC47M192 is accessible via the System Management Bus SMBus .

The LPC47M192 incorporates complete legacy Super I/O functionality including an 8042 based keyboard and mouse controller, an IEEE 1284, EPP, and ECP compatible parallel port, two serial ports that are 16C550A UART compatible, two IrDA infrared ports, and a floppy disk controller with SMSC's true CMOS 765B core and enhanced digital data separator, The true CMOS 765B core provides 100% compatibility with IBM PC/XT and PC/AT architectures and is software and register compatible with SMSC's proprietary 82077AA core. System related functionality, which offers flexibility to the system designer, includes an MPU-401 MIDI interface, 37 General Purpose I/O control functions, control of two LED’s, a game port interface supporting two joysticks, and fan control using fan tachometer inputs and pulse width modulator, PWM , outputs

The LPC47M192 is ACPI compatible and therefore supports multiple low power-down modes. It incorporates sophisticated power control circuitry PCC which includes support for keyboard and mouse wake-up events.

The LPC47M192 supports the ISA Plug-and-Play Standard register set Version 1.0a . The I/O Address, DMA Channel and hardware IRQ of each logical device in the LPC47M192 may be reprogrammed through the internal configuration registers. There are up to 480 960 - Parallel Port I/O address location options, a Serialized IRQ interface, and Three DMA channels.

The LPC47M192 does not require any external filter components and is therefore easy to use and offers lower system costs and reduced board area.

PART# LPC47M192-NC LPC47M192-NW
ORDERING INFORMATION

PACKAGE 128 Pin QFP 128 Pin QFP Green, Lead-Free

KEYBOARD BIOS AMI

SMSC DS LPC47M192

DATASHEET

TABLE OF CONTENTS
1 GENERAL DESCRIPTION 3
2 PIN LAYOUT 10
3 PIN CONFIGURATION 11
4 DESCRIPTION OF PIN 12

BUFFER NAME 20 PINS THAT REQUIRE EXTERNAL PULLUP 20

Super I/O Pins Hardware Monitoring Block
5 BLOCK 22
6 POWER FUNCTIONALITY 23

VCC/HVCC POWER 23
3 VOLT OPERATION / 5 VOLT TOLERANCE

VREF 23 VTR 23

Trickle Power Functionality

KHZ TRICKLE CLOCK 25

Indication of 32KHZ Clock

INTERNAL 25 MAXIMUM CURRENT 25

Super I/O Hardware Monitoring Block Functions

POWER MANAGEMENT EVENTS 26
7 FUNCTIONAL 27

SUPER I/O REGISTERS 27 HOST PROCESSOR INTERFACE LPC 27 LPC INTERFACE

LPC Interface Signal LPC Cycles Field Definitions LFRAME# I/O Read and Write Cycles DMA Read and Write Cycles DMA Protocol POWER MANAGEMENT

CLOCKRUN Protocol 29 LPCPD 29 SYNC Protocol Typical Usage 29 SYNC Timeout 30 SYNC Patterns and Maximum Number of SYNCS 30 SYNC Error 30 I/O and DMA START Fields 30 Reset 30 LPC TRANSFERS Wait State 30

FLOPPY DISK CONTROLLER 31

FDC Internal Registers STATUS REGISTER ENCODING Instruction DATA TRANSFER DIRECT SUPPORT FOR TWO FLOPPY

SMSC DS LPC47M192

DATASHEET

FDC Swap Bit

SERIAL PORT 64 INFRARED 77 MPU-401 MIDI UART 78

Host Interface MIDI Data Port Status

Bit 7 MIDI Receive Buffer Empty 79 Bit 6 MIDI Transmit Busy 80 MPU-401 Command Controller MIDI UART MPU-401 Configuration Registers Activate and I/O Base 83

PARALLEL PORT 83

IBM XT/AT Compatible, Bi-Directional and EPP Modes Extended Capabilities Parallel

POWER MANAGEMENT 98 SERIAL IRQ 102 8042 KEYBOARD CONTROLLER DESCRIPTION 105

Keyboard External Keyboard and Mouse Interface Keyboard Power Interrupts Memory Configurations Register Definitions

Host I/F Data 108 Host I/F Status 108 External Clock Signal Default Reset Conditions Keyboard and Mouse PME

GENERAL PURPOSE 113
Lead-free ordering information added. Updated Package Outline
07/25/02

SMSC DS LPC47M192

Page 228

DATASHEET

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Notice: we do not provide any warranties that information, datasheets, application notes, circuit diagrams, or software stored on this website are up-to-date or error free. The archived LPC47M192-NW Datasheet file may be downloaded here without warranties.

Datasheet ID: LPC47M192-NW 648125