MICRF003 / 033
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MICRF003BM (pdf) |
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MICRF003BM TR |
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MICRF003 / 033 QwikRadiotm 900 MHz UHF Receiver Preliminary Information The MICRF003 is a single chip OOK ON-OFF Keyed Receiver IC for remote wireless applications, employing Micrel’s latest QwikRadiotm technology. This device is a true “antenna-in, data-out” monolithic device. All RF and IF tuning is accomplished automatically within the IC, which eliminates manual tuning, and reduces production costs. Receiver functions are completely integrated. The result is a highly reliable yet extremely low cost solution for high volume wireless applications. Because the MICRF003 is a true single-chip radio receiver, it is extremely easy to apply, minimizing design and production costs, and improving time to market. The MICRF003 provides two fundamental modes of operation, FIXED and SWP. In FIXED mode, the device functions like a conventional Superheterodyne receiver, with an internal local oscillator fixed at a single frequency based on an external reference crystal or clock. As with any conventional superheterodyne receiver, the transmit frequency must be accurately controlled, generally with a crystal or SAW Surface Acoustic Wave resonator. In SWP mode, the MICRF003 sweeps the internal local oscillator at rates greater than the baseband data rate. This effectively “broadens” the RF bandwidth of the receiver to a value equivalent to conventional superregenerative receivers. Thus the MICRF003 can operate with less expensive LC transmitters without additional components or tuning, even though the receiver topology is still superheterodyne. In this mode the reference crystal can be replaced with a less expensive ± ceramic resonator. The MICRF003 provides two additional key features 1 a Shutdown Mode, which may be used for duty-cycle operation, and 2 a “Wakeup” function, which provides a logical indication of an incoming RF signal. These features make the MICRF003 ideal for low and ultra-low power applications, such as RKE and RFID. All post-detection demodulator data filtering is provided on the MICRF003, so no external filters need to be designed. Any one of four filter bandwidths may be selected externally by the user. Nominal filter bandwidths range in binary steps, from 0.75kHz to 6kHz SWP mode or 2.8kHz to 22.4kHz FIXED mode . The user only needs to program the appropriate filter selection based on data rate and code modulation format. • Complete 900 MHz Band receiver on a monolithic IC • UHF Frequency range 800 to 1000 MHz • Typical range over 170 meters with monopole antenna • Data rates to 5kbps SWP , 20kbps FIXED • Automatic tuning, no manual adjustment • No Filters or Inductors required • Low Operating Supply Current--4mA 868MHz • Shutdown Mode for Duty-Cycle Operation in excess of 100:1 • Wakeup Function to Enable External Decoders and Microprocessors • Very low RF re-radiation at the antenna • CMOS logic interface to standard decoder and microprocessor ICs • Extremely low external part count • Automotive Remote Keyless Entry • Security Systems • Low Rate Data Modems • Remote Meter Data Collection Typical Operating Circuit 915 MHz, 2400 bps OOK ISM Band RECEIVER Micrel Inc. • 1849 Fortune Drive San Jose, Ca 95131 • USA • tel + 1 408 944-0800 • fax + 1 408 944-0970 • MICRF003 Ordering Information Part Number MICRF003BM MICRF033BM QwikRadio tm Temperature Range -40°C to +105°C -40°C to +105°C Package 16-Pin SOIC 8-Pin SOIC Micrel The standard 16-pin package provides the user with complete control of MICRF002 mode and filter selection. An 8-pin standard part is also available for very low cost applications. The 8-pin version comes pre-programmed in SWP mode, with Demodulator Filter bandwidth set to 5000Hz, and SHUT pin externally available. Other 8-pin configurations are available. Contact the factory for details. Pin Configuration SOIC October 1999 MICRF003 MICRF003 QwikRadio tm Pin Description Pin numbers for the 8-pin version are identified in parentheses Micrel Pin Number 1 2/3 6 3 7 4 10 5 11 6 12 13 7 14 15 8 Pin Name SEL0 VSSRF VDDRF VDDBB VDDRF N/C VSSBB DO SHUT W AKEB CAGC SEL1 REFOSC SWEN Pin Function This pin, in conjunction with SEL1, programs the desired Demodulator Filter Bandwidth. This pin is internally pulled-up to VDDRF. See Table This pin is the ground return for the RF section of the IC. The bypass capacitor connected from VDDRF to VSSRF should have the shortest possible lead length. For best performance, connect VSSRF to VSSBB at the power supply only i.e., keep VSSBB currents from flowing through VSSRF return path . This pin is the ground return for the IC. The bypass capacitor connected from VDDRF to VSSRF should have the shortest possible lead length. This is the receive RF input, internally ac-coupled. Connect this pin to the receive antenna. Input impedance is high FET gate with approximately 2pF of shunt parasitic capacitance. For applications located in high ambient noise environments, a fixed value band-pass network may be connected between the ANT pin and VSSRF to provide additional receive selectivity and input overload protection. See “Application Note TBD”. This pin is the positive supply input for the RF section of the IC. VDDBB and VDDRF should be connected directly at the IC pins. Connect a low ESL, low ESR decoupling capacitor from this pin to VSSRF, as short as possible. This pin is the positive supply input for the baseband section of the IC. VDDBB and VDDRF should be connected directly at the IC pins. This pin is the positive supply input for the IC. Connect a low ESL, low ESR decoupling capacitor from this pin to VSSRF, as short as possible. This capacitor extracts the DC average value from the demodulated waveform, which becomes the reference for the internal data slicing comparator. Treat this as a low-pass RC filter with source impedance of nominally 90kohms for REFOSC frequency Ft = 6.75MHz, see “Application Note TBD” . A standard ± 20% X7R ceramic capacitor is generally sufficient. Unused Pin This is the ground return for the baseband section of the IC. The bypass and output capacitors connected to VSSBB should have the shortest possible lead lengths. For best performance, connect VSSRF to VSSBB at the power supply only i.e., keep VSSBB currents from flowing through VSSRF return path . The output data signal. CMOS level compatible. A logic input for Shutdown Mode control. Pull this pin low to place the IC into operation. This pin in internally pulled-up to VDDRF. An output signal, active low when the IC detects an incoming RF signal, determined by monitoring for data preamble. CMOS level compatible. Integrating capacitor for on-chip AGC Automatic Gain Control . The Decay/Attack time-constant TC ratio is nominally set as Use of 0.47uF or greater is strongly recommended for best range performance. Use low-leakage type capacitors for duty-cycle operation Dip Tantalum, Ceramic, Polyester . See “Application Note TBD. This pin, in conjunction with SEL0, programs the desired Demodulator Filter Bandwidth. This pin in internally pulled-up to VDDRF. See Table This is the timing reference for on-chip tuning and alignment. Connect either a ceramic resonator or crystal mode dependent between this pin and VSSBB, or drive the input with an AC coupled 0.5Vpp input clock. Use ceramic resonators without integral capacitors. Note that if operating in FIXED mode, a crystal must be used however in SWP mode, one may use either a crystal or ceramic resonator. See “Application Note TBD” for details on frequency selection and accuracy. This logic pin controls the operating mode of the MICRF003. When SWEN = HIGH, the MICRF003 is in SWP mode. When SWEN = LOW, the device operates as a conventional single-conversion superheterodyne receiver. See “Application Note TBD” for details. This pin is internally pulled-up to VDDRF. SEL0 1 0 1 0 SEL1 SWP Mode 6000 3000 1500 750 Demodulator Bandwidth Hz FIXED Mode 22400 11200 5600 2800 Table 1 Nominal Demodulator Baseband Filter Bandwidth vs. SEL0, SEL1 and Mode October 1999 MICRF003 MICRF003 |
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