U2731B-NFNG1

U2731B-NFNG1 Datasheet


U2731B

Part Datasheet
U2731B-NFNG1 U2731B-NFNG1 U2731B-NFNG1 (pdf)
Related Parts Information
U2731B-NFN U2731B-NFN U2731B-NFN
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• V Supply Voltage
• Voltage Regulator for Stable Operating Conditions
• Microprocessor-controlled Via a Simple Two-wire Bus
• Two Addresses Selectable
• Gain-controlled RF Amplifier with Two Inputs, Selectable Via a Simple Two-wire Bus

Control
• Balanced RF Amplifier Inputs
• Gain-controlled RF Mixer
• Four-pin Voltage-controlled Oscillator
• SAW Filter Driver with Differential Low-impedance Output
• AGC Voltage Generation for RF Section, Available at Charge-pump Output

Can Also Be Used to Control a PIN Diode Attenuator
• Gain-controlled IF Amplifier
• Balanced IF Amplifier Inputs
• Selectable Gain-controlled IF Mixer
• Single-ended IF Output
• AGC Voltage Generation for IF Section, Available at Charge-pump Output
• Separate Differential Input for the IF AGC Block
• All AGC Time Constants Adjustable
• AGC Thresholds Programmable Via a Simple Two-wire Bus
• Three AGC Charge Pump Currents Selectable Zero, Low, High
• Reference Oscillator
• Programmable 9-bit Reference Divider
• Programmable 15-bit Counter 1:2048 to 1:32767 Effectively
• Tristate Phase Detector with Programmable Charge Pump
• Superior Phase-noise Performance
• Deactivation of Tuning Output Programmable
• Three Switching Outputs Open Collector
• Three D/A Converters Resolution 8 Bits
• Lock Status Indication Open Collector

Electrostatic sensitive device. Observe precautions for handling.

DAB One-chip Front End

U2731B

The U2731B is a monolithically integrated Digital Audio Broadcasting one-chip front end circuit manufactured using Atmel’s advanced UHF5S technology. Its functionality covers a gain-controlled RF amplifier with two selectable RF inputs, a gain-controlled RF mixer, a VCO which provides the LO signal for the RF mixers, either directly or after passing a frequency divider, a SAW filter driver, an AGC block for the RF section, a gain-controlled IF amplifier, an IF mixer which can also be bypassed, an AGC block for the IF section and a fractional-N frequency synthesizer. The frequency synthesizer controls the VCO to synthesize frequencies in the range of 70 MHz to 500 MHz in a 16-kHz raster within certain limits the reference divider factor is fully programmable. The lock status of the phase detector is indicated at a special output pin three switching outputs can be addressed. A reference signal which is generated by an on-chip reference oscillator is available at an output pin. This reference signal is also used to generate the LO signal for the IF mixer, either by doubling the frequency or by using the reference frequency itself. Three D/A converters at a resolution of 8 bits provide a digitally controllable output voltage. The thresholds inside the AGC blocks can be digitally controlled by means of on-chip 4-bit D/A converters. All functions of this IC are controlled via a simple two-wire bus.

Figure Block Diagram

SAW1 SAW2

IFIN1 IFIN2 CPIF
16 CPRF
12 RFA1
13 RFA2
14 RFB1
15 RFB2

C1VCO
32 33

B2VCO

B1VCO 35

C2VCO
th1 V AGC

V AGC
x1/x2
4-bit latch
4-bit latch
4-bit latch
4-bit latch
26 IF AGCIN2
27 IF

AGCIN1

WAGC
29 IFOUT
20, 25, 38 VS
10, 11, 17, 30, 31,36, 37 GND
42 OSCI
43 OSCO
5 FREF

Reference counter

Tristate phase detector

Lock detector

Programmable charge pump
Ordering Information

Extended Type Number

Package Information

Package SSO44

Dimensions in mm

Package SSO44

Remarks Tube Taped and reeled
technical drawings according to DIN specifications
24 U2731B

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Literature Requests

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Datasheet ID: U2731B-NFNG1 519467