TS80C31X2-VIB

TS80C31X2-VIB Datasheet

TS80C31X2

Part	Datasheet
TS80C31X2-VIB	TS80C31X2-VIB (pdf)

Related Parts	Information
TS80C31X2-MCE	TS80C31X2-MCE
TS80C31X2-MIE	TS80C31X2-MIE
TS80C31X2-LIE	TS80C31X2-LIE
TS80C31X2-VCE	TS80C31X2-VCE
TS80C31X2-LCE	TS80C31X2-LCE
TS80C31X2-VIE	TS80C31X2-VIE
TS80C31X2-VCC	TS80C31X2-VCC
TS80C31X2-MCC	TS80C31X2-MCC
TS80C31X2-VIC	TS80C31X2-VIC
TS80C31X2-LIC	TS80C31X2-LIC
TS80C31X2-MCB	TS80C31X2-MCB
TS80C31X2-LCC	TS80C31X2-LCC
TS80C31X2-MIB	TS80C31X2-MIB
TS80C31X2-VCB	TS80C31X2-VCB
TS80C31X2-MIC	TS80C31X2-MIC
TS80C31X2-LIB	TS80C31X2-LIB
TS80C31X2-LCB	TS80C31X2-LCB
TS80C31X2-VIA	TS80C31X2-VIA
TS80C31X2-MIA	TS80C31X2-MIA
TS80C31X2-LIA	TS80C31X2-LIA
TS80C31X2-LCA	TS80C31X2-LCA
TS80C31X2-MCA	TS80C31X2-MCA
TS80C31X2-VCA	TS80C31X2-VCA

PDF Datasheet Preview
8-bit CMOS Microcontroller ROMless TS80C31X2 TS80C31X2 is high performance CMOS and ROMless versions of the 80C51 CMOS single chip 8-bit microcontroller. The TS80C31X2 retains all features of the TSC80C31 with 128 bytes of internal RAM, a 5-source, 4 priority level interrupt system, an on-chip oscilator and two timer/ counters. In addition, the TS80C31X2 has a dual data pointer, a more versatile serial channel that facilitates multiprocessor communication EUART and a X2 speed improvement mechanism. The fully static design of the TS80C31X2 allows to reduce system power consumption by bringing the clock frequency down to any value, even DC, without loss of data. The TS80C31X2 has 2 software-selectable modes of reduced activity for further reduction in power consumption. In the idle mode the CPU is frozen while the timers, the serial port and the interrupt system are still operating. In the power-down mode the RAM is saved and all other functions are inoperative. q 80C31 Compatible • 8031 pin and instruction compatible • Four 8-bit I/O ports • Two 16-bit timer/counters • 128 bytes scratchpad RAM q High-Speed Architecture • 40 MHz 5V, 30MHz 3V • X2 Speed Improvement capability 6 clocks/ machine cycle 30 MHz 5V, 20 MHz 3V Equivalent to 60 MHz 5V, 40 MHz 3V q Dual Data Pointer q Asynchronous port reset q Interrupt Structure with • 5 Interrupt sources, • 4 priority level interrupt system q Full duplex Enhanced UART • Framing error detection • Automatic address recognition q Power Control modes • Idle mode • Power-down mode • Power-off Flag q Once mode On-chip Emulation q Power supply 4.5-5.5V, 2.7-5.5V q Temperature ranges Commercial 0 to 70oC and Industrial -40 to 85oC q Packages PDIL40, PLCC44, VQFP44 PQFP F1 footprint TS80C31X2 Block Diagram XTAL1 XTAL2 ALE/ PROG PSEN EA RD 1 WR 1 RAM EUART 128x8 C51 CORE IB-bus Timer 0 INT Timer 1 Ctrl Parallel I/O Ports & Ext. Bus Port 0 Port 1 Port 2 Port 3 P0 P1 P2 P3 INT0 INT1 RESET 1 Alternate function of Port 3 TS80C31X2 SFR Mapping The Special Function Registers SFRs of the TS80C31X2 fall into the following categories: • C51 core registers ACC, B, DPH, DPL, PSW, SP, AUXR1 • I/O port registers P0, P1, P2, P3 • Timer registers TCON, TH0, TH1, TMOD, TL0, TL1 • Serial I/O port registers SADDR, SADEN, SBUF, SCON • Power and clock control registers PCON • Interrupt system registers IE, IP, IPH • Others CKCON Table All SFRs with their address and their reset value Ordering Information TS80C31X2 80C31X2 -M VCC 5V +/- 10% 40 MHz, standard mode 20 MHz, X2 mode -V VCC 5V +/- 10% 40 MHz, standard mode 30 MHz, X2 mode -L VCC to V 30 MHz, standard mode 20 MHz, X2 mode -E Samples Packages A PDIL 40 B PLCC 44 C PQFP F1 mm footprint E VQFP 44 1.4mm Temperature Range C Commercial 0 to 70oC I Industrial -40 to 85oC Conditioning R Tape & Reel D Dry Pack B Tape & Reel and Dry Pack Table Maximum Clock Frequency Code Standard Mode, oscillator frequency Standard Mode, internal frequency X2 Mode, oscillator frequency X2 Mode, internal equivalent frequency Unit MHz TS80C31X2 Table Possible Ordering Entries -MCA -MCB -MCC -MCE -VCA -VCB -VCC -VCE -LCA -LCB -LCC -LCE -MIA -MIB -MIC -MIE -VIA -VIB -VIC -VIE -LIA -LIB -LIC -LIE -EA -EB -EC -EE TS80C31X2 ROMless X q -Ex for samples q Tape and Reel available for B, C and E packages q Dry pack mandatory for E packages

PDF Datasheet Preview

8-bit CMOS Microcontroller ROMless

TS80C31X2

TS80C31X2 is high performance CMOS and ROMless versions of the 80C51 CMOS single chip 8-bit microcontroller.

The TS80C31X2 retains all features of the TSC80C31 with 128 bytes of internal RAM, a 5-source, 4 priority level interrupt system, an on-chip oscilator and two timer/ counters.

In addition, the TS80C31X2 has a dual data pointer, a more versatile serial channel that facilitates multiprocessor communication EUART and a X2 speed improvement mechanism.

The fully static design of the TS80C31X2 allows to reduce system power consumption by bringing the clock frequency down to any value, even DC, without loss of data.

The TS80C31X2 has 2 software-selectable modes of reduced activity for further reduction in power consumption. In the idle mode the CPU is frozen while the timers, the serial port and the interrupt system are still operating. In the power-down mode the RAM is saved and all other functions are inoperative.
q 80C31 Compatible
• 8031 pin and instruction compatible
• Four 8-bit I/O ports
• Two 16-bit timer/counters
• 128 bytes scratchpad RAM
q High-Speed Architecture
• 40 MHz 5V, 30MHz 3V
• X2 Speed Improvement capability 6 clocks/ machine cycle
30 MHz 5V, 20 MHz 3V Equivalent to 60 MHz 5V, 40 MHz 3V q Dual Data Pointer q Asynchronous port reset
q Interrupt Structure with
• 5 Interrupt sources,
• 4 priority level interrupt system
q Full duplex Enhanced UART
• Framing error detection
• Automatic address recognition
q Power Control modes
• Idle mode
• Power-down mode
• Power-off Flag
q Once mode On-chip Emulation q Power supply 4.5-5.5V, 2.7-5.5V q Temperature ranges Commercial 0 to 70oC and

Industrial -40 to 85oC q Packages PDIL40, PLCC44, VQFP44 PQFP F1
footprint

TS80C31X2

Block Diagram

XTAL1 XTAL2

ALE/ PROG PSEN

EA RD 1 WR 1

RAM EUART 128x8

C51 CORE

IB-bus

Timer 0 INT Timer 1 Ctrl

Parallel I/O Ports & Ext. Bus Port 0 Port 1 Port 2 Port 3

P0 P1 P2 P3

INT0 INT1

RESET
1 Alternate function of Port 3

TS80C31X2

SFR Mapping

The Special Function Registers SFRs of the TS80C31X2 fall into the following categories:
• C51 core registers ACC, B, DPH, DPL, PSW, SP, AUXR1
• I/O port registers P0, P1, P2, P3
• Timer registers TCON, TH0, TH1, TMOD, TL0, TL1
• Serial I/O port registers SADDR, SADEN, SBUF, SCON
• Power and clock control registers PCON
• Interrupt system registers IE, IP, IPH
• Others CKCON

Table All SFRs with their address and their reset value
Ordering Information

TS80C31X2
80C31X2
-M VCC 5V +/- 10% 40 MHz, standard mode 20 MHz, X2 mode
-V VCC 5V +/- 10% 40 MHz, standard mode 30 MHz, X2 mode
-L VCC to V 30 MHz, standard mode 20 MHz, X2 mode
-E Samples

Packages A PDIL 40 B PLCC 44 C PQFP F1 mm footprint E VQFP 44 1.4mm

Temperature Range C Commercial 0 to 70oC I Industrial -40 to 85oC

Conditioning R Tape & Reel D Dry Pack B Tape & Reel and

Dry Pack

Table Maximum Clock Frequency

Code

Standard Mode, oscillator frequency

Standard Mode, internal frequency

X2 Mode, oscillator frequency

X2 Mode, internal equivalent frequency

Unit MHz

TS80C31X2
Table Possible Ordering Entries
-MCA -MCB -MCC -MCE -VCA -VCB -VCC -VCE -LCA -LCB -LCC -LCE -MIA -MIB -MIC -MIE -VIA -VIB -VIC -VIE -LIA -LIB -LIC -LIE -EA -EB -EC -EE

TS80C31X2 ROMless X
q -Ex for samples q Tape and Reel available for B, C and E packages q Dry pack mandatory for E packages

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Datasheet ID: TS80C31X2-VIB 519441