ATR7040-PVQG

ATR7040-PVQG Datasheet


ATR7040

Part Datasheet
ATR7040-PVQG ATR7040-PVQG ATR7040-PVQG (pdf)
Related Parts Information
ATR7040-PVPG ATR7040-PVPG ATR7040-PVPG
PDF Datasheet Preview
• Frequency Range 5 GHz to 6 GHz
• Pout 25 dBm at GHz
• Gain Typically 30 dB
• Pin Typically 0 dBm
• VCC 2.7V to 3.8V
• Power Consumption in Power-down Mode Typically < 1 µA
• Package QFN16 3 mm x 3 mm
• Biasing Control Extends Battery Time
• Simple Input and Output Matching
• Only One Single Supply Required
• No High-side Switching Transistor Required

GHz WDCT Power Amplifier

ATR7040

Process

This 5-GHz power amplifier PA is designed using Atmel’s Silicon-Germanium SiGe process and provides high efficiency.

Circuitry

The PA, ATR7040, consists of a three-stage amplifier with a typical output power of 25 dBm. The output stage was implemented using an open-collector structure. Power up, power down, and output level are controlled at bias control pin 6 Vctl .

Figure

Block Diagram

VCC1 7

VCC2 6

ATR7040

RFIN 10

Matching

Matching

Bias control

RFOUT/VCC3 2

RFOUT/VCC3 3

VCTL GND

PADDLE GND
15 VCC_CTL
2 ATR7040

Pin Configuration

Figure Pinning QFN16

NC VCC_CTL GND VCTL

NC RFOUT/VCC3 RFOUT/VCC3
16 15 14 13
2 ATR7040 11
3 GND on the 10 4 PADDLE 9
5678

NC RFIN NC

NC VCC2 VCC1

Table Pin Description

Symbol Function

Not connected 1

RFOUT RF output and supply voltage for output amplifier stage

RFOUT RF output and supply voltage for output amplifier stage

Not connected 1

Not connected 1

VCC2 Supply voltage for second amplifier stage
Ordering Information

Extended Type Number ATR7040-PVPG ATR7040-PVQG

Package QFN16, 3 x 3 QFN16, 3 x 3

Package Information

Package QFN 16 - 3x3 Exposed pad 1.7x1.7
acc. JEDEC OUTLINE No. MO-220 Dimensions in mm

Not indicated tolerances

Drawing-No. Issue 1;

Assembly Chip PAC

Remarks Taped and reeled, MOQ 2000, Pb-free Taped and reeled, MOQ 8000, Pb-free
13 12 9
nom.
technical drawings
according to DIN specifications

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Datasheet ID: ATR7040-PVQG 519313