ATPL100SK-99

ATPL100SK-99 Datasheet


Atmel ATPL100A

Part Datasheet
ATPL100SK-99 ATPL100SK-99 ATPL100SK-99 (pdf)
Related Parts Information
ATPL100DK-99 ATPL100DK-99 ATPL100DK-99
ATPL100AEK ATPL100AEK ATPL100AEK
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Atmel ATPL100A

FSK Power Line Communications SoC

SUMMARY DATASHEET
• Core
• ADD8051C3A enhanced 8051 core
• Speedups up to x5 vs. standard 8051 microcontroller
• 128Kbytes internal SRAM
• In-circuit serial flash programming
• Auto boot-loading program from serial flash
• Media Access Control
• Convolutional and block FEC channel coding, Viterbi decoding
• Hardware CRC error detection and FEC error correction
• By-pass mode to support earlier no-MAC FSK modem software
• Modem
• Power Line Carrier Modem for 50 and 60 Hz mains
• 8 Programmable Carrier Frequencies from 60 to 132.5KHz
• Baud rate Selectable 600 to 4800 bps
• Half Duplex communication
• Receiver Sensitivity Up to 44dBuVrms
• Peripherals
• Three 2-wire UARTs
• Two SPI. SPI to serial flash and External RTC. Buffered SPI to external metering

IC
• Programmable Watchdog
• Quad dimmer in/out
• 24x8/28x4 segments LCD driver
• Up to 20 I/O lines
• Package
• 144-lead LQFP, 16 x 16 mm, pitch mm
• Pb-free and RoHS compliant
• Typical Applications
• Automated Meter Reading AMR & Advanced Meter Management AMM
• Street lighting
• Home Automation
43002A-ATPL-03/12

The ATPL100A is a Power Line Communications System on Chip. It implements a full PLC node using FSK modulations and includes a hardwired Medium Access Controller ADD1210 . It has been developed to reduce the CPU computational load in PLC systems. Thus, the microcontroller is free to be used in the applications tasks.

MAC functional capabilities of ATPL100A performed in ADD1210 Medium Access Controller involve the construction of message packets, adding convolutional or FEC Forward Error Correction codes to bytes and FCS Frame Check Sequence to packets. In reception, the MAC provides frame detection and Viterbi decoding or FCS and FEC correction.

ATPL100A MAC design is versatile and allows users to create a wide range of datagram structures. The MAC can be set in a bypass mode allowing direct connection between the microcontroller and the modem to support old FSK software that doesn’t include the MAC.

ATPL100A PLC modem ADD1310 can use a single power supply of 3.3V and a few external components. It supports several Analog Front End AFE configurations suitable for Automatic Meter Reading AMR or Home Automation. It can replace the traditional analog PLC modem and can use the same software libraries or a simplified version if the hardwired MAC is used.

ATPL100A core ADD8051C3A includes all features of the standard 8051, with an average speed up x5 and some additional features.

The microcontroller includes some specific peripherals as a 4 input / 4 output dimmer for power regulation phase angle control , also being able to generate a PWM Pulse-Width Modulation control.

A flash program loader allows to store the microcontroller program in a standard SPI serial flash memory and to execute it from internal SRAM. In the start-up process the program is uploaded from serial flash to the internal 128Kbytes of SRAM before start execution, after start-up the free space in the serial flash can be used to store application data. ATPL100A includes an encryption engine for code protection. Using a larger flash, several programs can be stored at the same time and the microcontroller can switch from one program to another, this feature could be used to reprogram the SoC using PLC downloading.

Atmel ATPL100A [Summary datasheet]
43002A-ATPL-03/12

Block Diagram

Figure ATPL100A 144-pin Block Diagram

DEBUG D_INIT

RSTA

CLKA CLKB

INT1

Reset Interface

Clock Interface
11.059.200Hz

XDATA SRAM

RESET Clock

DEBUG
8051C3A Core

IDATA
128KB SRAM
Ordering Information
Table Atmel ATPL100A Ordering Codes
Atmel Ordering Code ATPL100A-AZU-Y

Package 144 LQFP

Package Type Pb-Free

Temperature Range Industrial -40ºC to 85º

Atmel Designator

AT=Atmel

Product Family

PL=Power Line Communications

Device Designator

ATPL100A-AZU-Yxx

Customer marking

Shipping Carrier Option

Y = Tray

Package Device Grade or Wafer/Die Thickness

U = Lead free Pb-free Industrial temperature range -40°C to +85°C

Package Option

AZ = 144LQFP

Atmel ATPL100A [Summary datasheet]
43002A-ATPL-03/12

Date 30/03/2012

Comments Initial release

Atmel ATPL100A [Summary datasheet]
43002A-ATPL-03/12

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More datasheets: 1N4001G BK | 1N4002G BK | 1N4006G BK | 202407 BK013 | 202407 RD013 | 4318/17 | ET75DT005 | 106-00351-11 | ATPL100DK-99 | ATPL100AEK


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Datasheet ID: ATPL100SK-99 519270