ATMEGA324P-20PU

ATMEGA324P-20PU Datasheet

32 Programmable I/O Lines 40-pin PDIP, 44-lead TQFP, 44-pad VQFN/QFN/MLF ATmega164P/324P/644P 44-pad DRQFN ATmega164P

Part	Datasheet
ATMEGA324P-20PU	ATMEGA324P-20PU (pdf)

Related Parts	Information
ATMEGA644P-20MUR	ATMEGA644P-20MUR
ATMEGA644P-20AUR	ATMEGA644P-20AUR
ATMEGA324P-20MUR	ATMEGA324P-20MUR
ATMEGA324PV-10MUR	ATMEGA324PV-10MUR
ATMEGA324PV-10PU	ATMEGA324PV-10PU
ATMEGA324PV-10AUR	ATMEGA324PV-10AUR
ATMEGA644P-20PU	ATMEGA644P-20PU
ATMEGA164PV-10PU	ATMEGA164PV-10PU
ATMEGA324PV-10AU	ATMEGA324PV-10AU
ATMEGA644PV-10AU	ATMEGA644PV-10AU
ATMEGA324P-20AUR	ATMEGA324P-20AUR
ATMEGA644P-20MU	ATMEGA644P-20MU
ATMEGA324P-20AU	ATMEGA324P-20AU
ATMEGA644P-20AU	ATMEGA644P-20AU
ATMEGA164PV-10AU	ATMEGA164PV-10AU
ATMEGA644PV-10PU	ATMEGA644PV-10PU
ATMEGA324PV-10MU	ATMEGA324PV-10MU

PDF Datasheet Preview
• High-performance, Low-power 8-bit Microcontroller • Advanced RISC Architecture 131 Powerful Instructions Most Single-clock Cycle Execution 32 x 8 General Purpose Working Registers Fully Static Operation Up to 20 MIPS Throughput at 20 MHz On-chip 2-cycle Multiplier • High Endurance Non-volatile Memory segments 16/32/64K Bytes of In-System Self-programmable Flash program memory 512B/1K/2K Bytes EEPROM 1/2/4K Bytes Internal SRAM Write/Erase Cycles 10,000 Flash/ 100,000 EEPROM Data retention 20 years at 85°C/100 years at 25°C 1 Optional Boot Code Section with Independent Lock Bits In-System Programming by On-chip Boot Program True Read-While-Write Operation Programming Lock for Software Security • JTAG IEEE std. Compliant Interface Boundary-scan Capabilities According to the JTAG Standard Extensive On-chip Debug Support Programming of Flash, EEPROM, Fuses, and Lock Bits through the JTAG Interface • Peripheral Features Two 8-bit Timer/Counters with Separate Prescalers and Compare Modes One 16-bit Timer/Counter with Separate Prescaler, Compare Mode, and Capture Mode Real Time Counter with Separate Oscillator Six PWM Channels 8-channel, 10-bit ADC Differential mode with selectable gain at 1x, 10x or 200x Byte-oriented Two-wire Serial Interface Two Programmable Serial USART Master/Slave SPI Serial Interface Programmable Watchdog Timer with Separate On-chip Oscillator On-chip Analog Comparator Interrupt and Wake-up on Pin Change • Special Microcontroller Features Power-on Reset and Programmable Brown-out Detection Internal Calibrated RC Oscillator External and Internal Interrupt Sources Six Sleep Modes Idle, ADC Noise Reduction, Power-save, Power-down, Standby and Extended Standby • I/O and Packages 32 Programmable I/O Lines 40-pin PDIP, 44-lead TQFP, 44-pad VQFN/QFN/MLF ATmega164P/324P/644P 44-pad DRQFN ATmega164P • Operating Voltages - 5.5V for ATmega164P/324P/644PV - 5.5V for ATmega164P/324P/644P • Speed Grades ATmega164P/324P/644PV 0 - 4MHz - 5.5V, 0 - 10MHz - 5.5V ATmega164P/324P/644P 0 - 10MHz - 5.5V, 0 - 20MHz - 5.5V • Power Consumption at 1 MHz, 1.8V, 25°C for ATmega164P/324P/644PV Active mA Power-down Mode 0.1µA Power-save Mode 0.6µA Including 32 kHz RTC Note See ”Data Retention” on page 8-bit Microcontroller with 16/32/64K Bytes In-System Programmable Flash ATmega164P/V* ATmega324P/V* ATmega644P/V* * Not recommended for new designs. Use ATmega164PA/324PA/644PA ATmega164P/324P/644P Pin Configurations Pinout - PDIP/TQFP/VQFN/QFN/MLF Figure Pinout ATmega164P/324P/644P PDIP PCINT8/XCK0/T0 PB0 PCINT9/CLKO/T1 PB1 PCINT10/INT2/AIN0 PB2 PCINT11/OC0A/AIN1 PB3 PCINT12/OC0B/SS PB4 PCINT13/MOSI PB5 PCINT14/MISO PB6 PCINT15/SCK PB7 RESET VCC GND XTAL2 XTAL1 PCINT24/RXD0 PD0 PCINT25/TXD0 PD1 PCINT26/RXD1/INT0 PD2 PCINT27/TXD1/INT1 PD3 PCINT28/XCK1/OC1B PD4 PCINT29/OC1A PD5 PCINT30/OC2B/ICP PD6 PA0 ADC0/PCINT0 PA1 ADC1/PCINT1 PA2 ADC2/PCINT2 PA3 ADC3/PCINT3 PA4 ADC4/PCINT4 PA5 ADC5/PCINT5 PA6 ADC6/PCINT6 PA7 ADC7/PCINT7 AREF GND AVCC PC7 TOSC2/PCINT23 PC6 TOSC1/PCINT22 PC5 TDI/PCINT21 PC4 TDO/PCINT20 PC3 TMS/PCINT19 PC2 TCK/PCINT18 PC1 SDA/PCINT17 PC0 SCL/PCINT16 PD7 OC2A/PCINT31 TQFP/VQFN/QFN/MLF PB4 SS/OC0B/PCINT12 PB3 AIN1/OC0A/PCINT11 PB2 AIN0/INT2/PCINT10 PB1 T1/CLKO/PCINT9 PB0 XCK0/T0/PCINT8 GND VCC PA0 ADC0/PCINT0 PA1 ADC1/PCINT1 PA2 ADC2/PCINT2 PA3 ADC3/PCINT3 PCINT13/MOSI PB5 PCINT14/MISO PB6 PCINT15/SCK PB7 RESET VCC GND XTAL2 XTAL1 The parts are characterized at frequencies higher than test limits. Parts are not guaranteed to function properly at frequencies higher than the ordering code indicates. The difference between current consumption in Power-down mode with Watchdog Timer enabled and Power-down mode with Watchdog Timer disabled represents the differential current drawn by the Watchdog Timer. ATmega164P Typical Characterization Active Supply Current Figure Active Supply Current vs. Low Frequency - MHz . ICC mA Frequency MHz ATmega164P/324P/644P Figure Active Supply Current vs. Frequency 1 - 20 MHz . ICC mA Frequency MHz Figure Active Supply Current vs. VCC Internal RC Oscillator, 8 MHz . ICC mA 85 °C 25 °C -40 °C VCC V ATmega164P/324P/644P Figure Active Supply Current vs. VCC Internal RC Oscillator, 1 MHz . ICC mA 85°C 25°C -40°C VCC V Figure Active Supply Current vs. VCC Internal RC Oscillator, 128 kHz . I CC mA 0,25 0,15 0,05 VCC V ATmega164P/324P/644P Idle Supply Current Figure Idle Supply Current vs.Low Frequency - MHz . ICC mA Frequency MHz Figure Idle Supply Current vs. Frequency 1 - 20 MHz . ICC mA Frequency MHz ATmega164P/324P/644P Figure Idle Supply Current vs. VCC Internal RC Oscillator, 8 MHz . 85 °C Ordering Information ATmega164P Speed MHz 3 10 20 Power Supply - 5.5V - 5.5V Ordering Code ATmega164PV-10AU 2 ATmega164PV-10PU 2 ATmega164PV-10MU 2 ATmega164P-20AU 2 ATmega164P-20PU 2 ATmega164P-20MU 2 Package 1 44A 40P6 44M1 44A 40P6 44M1 Operational Range Industrial -40oC to 85oC This device can also be supplied in wafer form. Please contact your local Atmel sales office for detailed ordering information and minimum quantities. Pb-free packaging, complies to the European Directive for Restriction of Hazardous Substances RoHS directive . Also Halide free and fully Green. For Speed vs. VCC see ”Speed Grades” on page 44A 40P6 44M1 Package Type 44-lead, Thin mm Plastic Gull Wing Quad Flat Package TQFP 40-pin, Wide, Plastic Dual Inline Package PDIP 44-pad, 7 x 7 x mm body, lead pitch mm, Thermally Enhanced Plastic Very Thin Quad Flat No-Lead VQFN ATmega164P/324P/644P ATmega324P Speed MHz 3 10 20 Power Supply - 5.5V - 5.5V Ordering Code ATmega324PV-10AU 2 ATmega324PV-10PU 2 ATmega324PV-10MU 2 ATmega324P-20AU 2 ATmega324P-20PU 2 ATmega324P-20MU 2 Package 1 44A 40P6 44M1 44A 40P6 44M1 Operational Range Industrial -40oC to 85oC This device can also be supplied in wafer form. Please contact your local Atmel sales office for detailed ordering information and minimum quantities. Pb-free packaging, complies to the European Directive for Restriction of Hazardous Substances RoHS directive . Also Halide free and fully Green. For Speed vs. VCC see ”Speed Grades” on page 44A 40P6 44M1 Package Type 44-lead, Thin mm Plastic Gull Wing Quad Flat Package TQFP 40-pin, Wide, Plastic Dual Inline Package PDIP 44-pad, 7 x 7 x mm Body, lead pitch mm, Thermally Enhanced Plastic Very Thin Quad Flat No-Lead VQFN ATmega164P/324P/644P ATmega644P Speed MHz 3 10 20 Power Supply - 5.5V - 5.5V Ordering Code ATmega644PV-10AU 2 ATmega644PV-10PU 2 ATmega644PV-10MU 2 ATmega644P-20AU 2 ATmega644P-20PU 2 ATmega644P-20MU 2 Package 1 44A 40P6 44M1 44A 40P6 44M1 Operational Range Industrial -40oC to 85oC This device can also be supplied in wafer form. Please contact your local Atmel sales office for detailed ordering information and minimum quantities. Pb-free packaging, complies to the European Directive for Restriction of Hazardous Substances RoHS directive . Also Halide free and fully Green. For Speed vs. VCC see ”Speed Grades” on page 44A 40P6 44M1 Package Type 44-lead, Thin mm Plastic Gull Wing Quad Flat Package TQFP 40-pin, Wide, Plastic Dual Inline Package PDIP 44-pad, 7 x 7 x mm body, lead pitch mm, Thermally Enhanced Plastic Very Thin Quad Flat No-Lead VQFN Packaging Information ATmega164P/324P/644P PIN 1 e PIN 1 IDENTIFIER B E1 E A1 A2 L This package conforms to JEDEC reference MS-026, Variation ACB. Dimensions D1 and E1 do not include mold protrusion. Allowable protrusion is mm per side. Dimensions D1 and E1 are maximum plastic body size dimensions including mold mismatch. Lead coplanarity is mm maximum. COMMON DIMENSIONS Unit of Measure = mm SYMBOL MIN NOM MAX NOTE Note 2 Note 2 2325 Orchard Parkway R San Jose, CA 95131 44A, 44-lead, 10 x 10 mm Body Size, mm Body Thickness, mm Lead Pitch, Thin Profile Plastic Quad Flat Package TQFP 40P6 ATmega164P/324P/644P D PIN 1 SEATING PLANE 0º ~ 15º REF This package conforms to JEDEC reference MS-011, Variation AC. Dimensions D and E1 do not include mold Flash or Protrusion. Mold Flash or Protrusion shall not exceed mm COMMON DIMENSIONS Unit of Measure = mm SYMBOL MIN NOM MAX NOTE Note 2 Note 2 TITLE 2325 Orchard Parkway 40P6, 40-lead mm Wide Plastic Dual R San Jose, CA 95131 Inline Package PDIP 09/28/01 40P6 44M1 ATmega164P/324P/644P Marked Pin# 1 ID TOP VIEW Pin #1 Corner SEATING PLANE A1 A3 A Updated ”Features” on page Removed VFBGA - pinout from ”Pin Configurations” on page Updated ”System Control and Reset” on page Updated Input Hysteresis Unit V in the “Typical Characteristics”. Updated ”Ordering Information” on page Removed 44MC and 49C2 packages. Updated ”Packaging Information” on page Updated ”Features” on page 1 by inserting a table note Merged Sections and in one section ”About” on page Updated the front page by removing “Preliminary”. Updated the ”DC Characteristics” on page 325 by removing VIL3/VIH3 and VOL3/VOH3 and the table note Updated the table note1 of the Table 25-6 on page Updated ”Typical Characteristics” on page 338 Updated ”Features” on page 1, ”Pin Configurations” on page 2 and ”Ordering Information” on page 420 according to the updated 44M1 package drawing. Updated VOL in the table of ”DC Characteristics” on page Updated tRST and tBOD unites in the table of ”System and Reset Characteristics” on page Updated typical values for ATmega324P and ATmega644P in the tables of ”DC Char- ATmega164P/324P/644P Updated ATmega644P ”Errata” on page Added 49-ball VFBGA pinout for ATmega164P/324P in ”” on page Added 49-ball VFBGA 49C2 to ”Packaging Information” on page Updated description in ”AVCC” on page Updated ”Stack Pointer” on page Updated Data Memory Map addresses, Figure 5-2 on page Updated description of use of external capacitors in ”Low Frequency Crystal Oscillator” on page Updated typo in”Alternate Functions of Port C” on page Updated bit description in ”TWSR TWI Status Register” on page Updated typo in ”Programming via the JTAG Interface” on page Updated conditions for VOL in the table of ”DC Characteristics” on page Updated ”External Clock Drive” on page Updated conditions for VINT2 in Table 25-11 Single Ended channels in ”ADC Charac- teristics” on page Updated Minimum Reference Voltage in Table 25-12 Differential channels in ”ADC Characteristics” on page Updated bit field typos in ”Register Summary” on page Added 49-ball VFBGA pinout for ATmega164P/324P in ”” on page Added 49-ball VFBGA 49C2 to ”Packaging Information” on page Added 44-pad DRQFN pinout for ATmega164P in ”Pinout - DRQFN” on page Added 49-ball VFBGA pinout for ATmega164P/324P in ”” on page Added note to ”Address Match Unit” on page Updated ATmega164P ”Ordering Information” on page Added 44-lead QFN 44MC to ”Packaging Information” on page Added 49-ball VFBGA 49C2 to ”Packaging Information” on page Updated ”Features” on page 1 Added ”Data Retention” on page Updated ”SPH and SPL Stack Pointer High and Stack pointer Low” on page LCD reference removed from table note in ”Sleep Modes” on page Updated code example in ”Bit 0 IVCE Interrupt Vector Change Enable” on page ATmega164P/324P/644P Removed reference to External Memory Interface in ”Alternate Functions of Port A” on page Updated ”Data Reception The USART Receiver” on page Updated ”ADCSRB ADC Control and Status Register B” on page Updated overview in ”ADC - Analog-to-digital Converter” on page Added ”ATmega644P Typical Characteristic” on page Updated Figure 26-31 on page 354, Figure on page 355,Figure 26-33 on page 355 Updated notes in Table 6-3 on page 32.Table 6-9 on page 35, Table 6-10 on page 36, and Table 6-12 on page Updated Table 11-7 on page 84, Table 11-8 on page 84, Table 11-10 on page 86, Table 11-11 on page 87, Table 11-14 on page 90, Table 25-1 on page 327,Table 25-2 on page 327,Table 27-5 on page 331, Table 25-9 on page 332, and Table 25-12 on page 336 Updated ”ATmega324P DC Characteristics” on page 327 and ”ATmega644P DC Characteristics” on page Updated Table 25-7 on page 331 and Table 6-14 on page Updated ”Watchdog Timer Configuration” on page Updated ”GTCCR General Timer/Counter Control Register” on page Updated ”EECR The EEPROM Control Register” on page Updated ”Pinout ATmega164P/324P/644P” on page Updated ”Power-down Mode” on page Updated note in Table 10-1 on page Updated Table 22-1 on page Updated ”Boot Size Configuration 1 ” on page Updated VOL limits in ”DC Characteristics” on page Updated note 3 and 4 in ”DC Characteristics” on page Added note to ”ATmega164P DC Characteristics” on page Added note to ”ATmega324P DC Characteristics” on page Updated Figure 26-13 on page 345 and Figure 26-60 on page Updated ”DC Characteristics” on page ATmega164P/324P/644P Updated ”DC Characteristics” on page ATmega164P/324P/644P Table of Contents Features 1 Pin Configurations 2 Pinout - PDIP/TQFP/VQFN/QFN/MLF Pinout - DRQFN 2 Overview 4 Block Diagram Comparison Between ATmega164P, ATmega324P and ATmega644P Pin Descriptions 3 About 8 Resources About Code Examples Data Retention 4 AVR CPU Core 9 Overview ALU Arithmetic Logic Unit Status Register General Purpose Register File Stack Pointer Instruction Execution Timing Reset and Interrupt Handling 5 AVR Memories 18 Overview In-System Reprogrammable Flash Program Memory SRAM Data Memory EEPROM Data Memory I/O Memory Register Description 6 System Clock and Clock Options 29 Clock Systems and their Distribution Clock Sources Low Power Crystal Oscillator Full Swing Crystal Oscillator ATmega164P/324P/644P Low Frequency Crystal Oscillator Calibrated Internal RC Oscillator 128 kHz Internal Oscillator External Clock Timer/Counter Oscillator Clock Output Buffer System Clock Prescaler Register Description 7 Power Management and Sleep Modes 42 Overview Sleep Modes BOD Disable Idle Mode ADC Noise Reduction Mode Power-down Mode Power-save Mode Standby Mode Extended Standby Mode Power Reduction Register Minimizing Power Consumption Register Description 8 System Control and Reset 50 Resetting the AVR Reset Sources Power-on Reset External Reset Brown-out Detection Watchdog Reset Internal Voltage Reference Watchdog Timer Register Description 9 Interrupts 61 Overview Interrupt Vectors in ATmega164P/324P/644P Register Description ATmega164P/324P/644P 10 External Interrupts 67 Overview Register Description 11 I/O-Ports 72 Overview Ports as General Digital I/O Alternate Port Functions Register Description 12 8-bit Timer/Counter0 with PWM 93 27 Register Summary 413 28 Instruction Set Summary 417 29 Ordering Information 420 ATmega164P ATmega324P ATmega644P 30 Packaging Information 423 44A 40P6 44M1 31 Errata 426 ATmega164P ATmega324P ATmega644P Table of i Headquarters Atmel Corporation 2325 Orchard Parkway San Jose, CA 95131 USA Tel 1 408 441-0311 Fax 1 408 487-2600 International Atmel Asia Unit 1-5 & 16, 19/F BEA Tower, Millennium City 5 418 Kwun Tong Road Kwun Tong, Kowloon Hong Kong Tel 852 2245-6100 Fax 852 2722-1369 Atmel Europe Le Krebs 8, Rue Jean-Pierre Timbaud BP 309 78054 Saint-Quentin-enYvelines Cedex France Tel 33 1-30-60-70-00 Fax 33 1-30-60-71-11 Atmel Japan 9F, Tonetsu Shinkawa Bldg. 1-24-8 Shinkawa Chuo-ku, Tokyo 104-0033 Japan Tel 81 3-3523-3551 Fax 81 3-3523-7581 Product Contact Web Site Literature Requests Technical Support Enter Product Line E-mail Sales Contact Disclaimer The information in this document is provided in connection with Atmel products. No license, express or implied, by estoppel or otherwise, to any intellectual property right is granted by this document or in connection with the sale of Atmel products. EXCEPT AS SET FORTH IN ATMEL’S TERMS AND CONDITIONS OF SALE LOCATED ON ATMEL’S WEB SITE, ATMEL ASSUMES NO LIABILITY WHATSOEVER AND DISCLAIMS ANY EXPRESS, IMPLIED OR STATUTORY WARRANTY RELATING TO ITS PRODUCTS INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTY OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, CONSEQUENTIAL, PUNITIVE, SPECIAL OR INCIDENTAL DAMAGES INCLUDING, WITHOUT LIMITATION, DAMAGES FOR LOSS OF PROFITS, BUSINESS INTERRUPTION, OR LOSS OF INFORMATION ARISING OUT OF THE USE OR INABILITY TO USE THIS DOCUMENT, EVEN IF ATMEL HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. 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PDF Datasheet Preview

• High-performance, Low-power 8-bit Microcontroller
• Advanced RISC Architecture
131 Powerful Instructions Most Single-clock Cycle Execution 32 x 8 General Purpose Working Registers Fully Static Operation Up to 20 MIPS Throughput at 20 MHz On-chip 2-cycle Multiplier
• High Endurance Non-volatile Memory segments
16/32/64K Bytes of In-System Self-programmable Flash program memory 512B/1K/2K Bytes EEPROM 1/2/4K Bytes Internal SRAM

Write/Erase Cycles 10,000 Flash/ 100,000 EEPROM Data retention 20 years at 85°C/100 years at 25°C 1 Optional Boot Code Section with Independent Lock Bits

In-System Programming by On-chip Boot Program True Read-While-Write Operation Programming Lock for Software Security
• JTAG IEEE std. Compliant Interface

Boundary-scan Capabilities According to the JTAG Standard Extensive On-chip Debug Support Programming of Flash, EEPROM, Fuses, and Lock Bits through the JTAG Interface
• Peripheral Features

Two 8-bit Timer/Counters with Separate Prescalers and Compare Modes One 16-bit Timer/Counter with Separate Prescaler, Compare Mode, and Capture Mode Real Time Counter with Separate Oscillator Six PWM Channels 8-channel, 10-bit ADC

Differential mode with selectable gain at 1x, 10x or 200x Byte-oriented Two-wire Serial Interface Two Programmable Serial USART Master/Slave SPI Serial Interface Programmable Watchdog Timer with Separate On-chip Oscillator On-chip Analog Comparator Interrupt and Wake-up on Pin Change
• Special Microcontroller Features

Power-on Reset and Programmable Brown-out Detection Internal Calibrated RC Oscillator External and Internal Interrupt Sources Six Sleep Modes Idle, ADC Noise Reduction, Power-save, Power-down, Standby and

Extended Standby
• I/O and Packages
32 Programmable I/O Lines 40-pin PDIP, 44-lead TQFP, 44-pad VQFN/QFN/MLF ATmega164P/324P/644P 44-pad DRQFN ATmega164P
• Operating Voltages
- 5.5V for ATmega164P/324P/644PV - 5.5V for ATmega164P/324P/644P
• Speed Grades

ATmega164P/324P/644PV 0 - 4MHz - 5.5V, 0 - 10MHz - 5.5V ATmega164P/324P/644P 0 - 10MHz - 5.5V, 0 - 20MHz - 5.5V
• Power Consumption at 1 MHz, 1.8V, 25°C for ATmega164P/324P/644PV

Active mA Power-down Mode 0.1µA Power-save Mode 0.6µA Including 32 kHz RTC

Note See ”Data Retention” on page
8-bit Microcontroller with 16/32/64K Bytes In-System Programmable Flash

ATmega164P/V* ATmega324P/V* ATmega644P/V*
* Not recommended for new designs.

Use ATmega164PA/324PA/644PA

ATmega164P/324P/644P

Pin Configurations

Pinout - PDIP/TQFP/VQFN/QFN/MLF

Figure Pinout ATmega164P/324P/644P

PDIP

PCINT8/XCK0/T0 PB0 PCINT9/CLKO/T1 PB1 PCINT10/INT2/AIN0 PB2 PCINT11/OC0A/AIN1 PB3 PCINT12/OC0B/SS PB4

PCINT13/MOSI PB5 PCINT14/MISO PB6

PCINT15/SCK PB7 RESET VCC GND XTAL2 XTAL1

PCINT24/RXD0 PD0 PCINT25/TXD0 PD1 PCINT26/RXD1/INT0 PD2 PCINT27/TXD1/INT1 PD3 PCINT28/XCK1/OC1B PD4 PCINT29/OC1A PD5 PCINT30/OC2B/ICP PD6

PA0 ADC0/PCINT0 PA1 ADC1/PCINT1 PA2 ADC2/PCINT2 PA3 ADC3/PCINT3 PA4 ADC4/PCINT4 PA5 ADC5/PCINT5 PA6 ADC6/PCINT6 PA7 ADC7/PCINT7 AREF GND AVCC PC7 TOSC2/PCINT23 PC6 TOSC1/PCINT22 PC5 TDI/PCINT21 PC4 TDO/PCINT20 PC3 TMS/PCINT19 PC2 TCK/PCINT18 PC1 SDA/PCINT17 PC0 SCL/PCINT16 PD7 OC2A/PCINT31

TQFP/VQFN/QFN/MLF

PB4 SS/OC0B/PCINT12 PB3 AIN1/OC0A/PCINT11 PB2 AIN0/INT2/PCINT10 PB1 T1/CLKO/PCINT9 PB0 XCK0/T0/PCINT8 GND VCC PA0 ADC0/PCINT0 PA1 ADC1/PCINT1 PA2 ADC2/PCINT2 PA3 ADC3/PCINT3

PCINT13/MOSI PB5 PCINT14/MISO PB6

PCINT15/SCK PB7 RESET VCC GND XTAL2 XTAL1
The parts are characterized at frequencies higher than test limits. Parts are not guaranteed to function properly at frequencies higher than the ordering code indicates.

The difference between current consumption in Power-down mode with Watchdog Timer enabled and Power-down mode with Watchdog Timer disabled represents the differential current drawn by the Watchdog Timer.

ATmega164P Typical Characterization

Active Supply Current

Figure Active Supply Current vs. Low Frequency - MHz .

ICC mA

Frequency MHz

ATmega164P/324P/644P

Figure Active Supply Current vs. Frequency 1 - 20 MHz .

ICC mA

Frequency MHz

Figure Active Supply Current vs. VCC Internal RC Oscillator, 8 MHz .

ICC mA
85 °C
25 °C
-40 °C

VCC V

ATmega164P/324P/644P

Figure Active Supply Current vs. VCC Internal RC Oscillator, 1 MHz .

ICC mA
85°C
25°C
-40°C

VCC V

Figure Active Supply Current vs. VCC Internal RC Oscillator, 128 kHz .

I CC mA
0,25
0,15
0,05

VCC V

ATmega164P/324P/644P

Idle Supply Current

Figure Idle Supply Current vs.Low Frequency - MHz .

ICC mA

Frequency MHz

Figure Idle Supply Current vs. Frequency 1 - 20 MHz .

ICC mA

Frequency MHz

ATmega164P/324P/644P

Figure Idle Supply Current vs. VCC Internal RC Oscillator, 8 MHz .
85 °C
Ordering Information

ATmega164P

Speed MHz 3 10 20

Power Supply - 5.5V - 5.5V
Ordering Code

ATmega164PV-10AU 2 ATmega164PV-10PU 2 ATmega164PV-10MU 2

ATmega164P-20AU 2 ATmega164P-20PU 2 ATmega164P-20MU 2

Package 1 44A 40P6 44M1 44A 40P6 44M1

Operational Range

Industrial -40oC to 85oC
This device can also be supplied in wafer form. Please contact your local Atmel sales office for detailed ordering information and minimum quantities.

Pb-free packaging, complies to the European Directive for Restriction of Hazardous Substances RoHS directive . Also Halide free and fully Green.

For Speed vs. VCC see ”Speed Grades” on page
44A 40P6 44M1

Package Type 44-lead, Thin mm Plastic Gull Wing Quad Flat Package TQFP 40-pin, Wide, Plastic Dual Inline Package PDIP 44-pad, 7 x 7 x mm body, lead pitch mm, Thermally Enhanced Plastic Very Thin Quad Flat No-Lead VQFN

ATmega164P/324P/644P

ATmega324P

Speed MHz 3 10 20

Power Supply - 5.5V - 5.5V
Ordering Code

ATmega324PV-10AU 2 ATmega324PV-10PU 2 ATmega324PV-10MU 2

ATmega324P-20AU 2 ATmega324P-20PU 2 ATmega324P-20MU 2

Package 1 44A 40P6 44M1
44A 40P6 44M1

Operational Range

Industrial -40oC to 85oC
This device can also be supplied in wafer form. Please contact your local Atmel sales office for detailed ordering information and minimum quantities.

Pb-free packaging, complies to the European Directive for Restriction of Hazardous Substances RoHS directive . Also Halide free and fully Green.

For Speed vs. VCC see ”Speed Grades” on page
44A 40P6 44M1

Package Type 44-lead, Thin mm Plastic Gull Wing Quad Flat Package TQFP 40-pin, Wide, Plastic Dual Inline Package PDIP 44-pad, 7 x 7 x mm Body, lead pitch mm, Thermally Enhanced Plastic Very Thin Quad Flat No-Lead VQFN

ATmega164P/324P/644P

ATmega644P

Speed MHz 3 10 20

Power Supply - 5.5V - 5.5V
Ordering Code

ATmega644PV-10AU 2 ATmega644PV-10PU 2 ATmega644PV-10MU 2

ATmega644P-20AU 2 ATmega644P-20PU 2 ATmega644P-20MU 2

Package 1 44A 40P6 44M1
44A 40P6 44M1

Operational Range

Industrial -40oC to 85oC
This device can also be supplied in wafer form. Please contact your local Atmel sales office for detailed ordering information and minimum quantities.

Pb-free packaging, complies to the European Directive for Restriction of Hazardous Substances RoHS directive . Also Halide free and fully Green.

For Speed vs. VCC see ”Speed Grades” on page
44A 40P6 44M1

Package Type 44-lead, Thin mm Plastic Gull Wing Quad Flat Package TQFP 40-pin, Wide, Plastic Dual Inline Package PDIP 44-pad, 7 x 7 x mm body, lead pitch mm, Thermally Enhanced Plastic Very Thin Quad Flat No-Lead VQFN

Packaging Information

ATmega164P/324P/644P

PIN 1 e

PIN 1 IDENTIFIER

B E1 E

A1 A2 L

This package conforms to JEDEC reference MS-026, Variation ACB. Dimensions D1 and E1 do not include mold protrusion. Allowable
protrusion is mm per side. Dimensions D1 and E1 are maximum plastic body size dimensions including mold mismatch. Lead coplanarity is mm maximum.

COMMON DIMENSIONS Unit of Measure = mm

SYMBOL MIN

NOM MAX

NOTE

Note 2 Note 2
2325 Orchard Parkway R San Jose, CA 95131
44A, 44-lead, 10 x 10 mm Body Size, mm Body Thickness, mm Lead Pitch, Thin Profile Plastic Quad Flat Package TQFP
40P6

ATmega164P/324P/644P

D PIN 1

SEATING PLANE
0º ~ 15º REF

This package conforms to JEDEC reference MS-011, Variation AC. Dimensions D and E1 do not include mold Flash or Protrusion.

Mold Flash or Protrusion shall not exceed mm

COMMON DIMENSIONS Unit of Measure = mm

SYMBOL MIN NOM MAX NOTE

Note 2

Note 2

TITLE 2325 Orchard Parkway 40P6, 40-lead mm Wide Plastic Dual R San Jose, CA 95131 Inline Package PDIP
09/28/01
40P6
44M1

ATmega164P/324P/644P

Marked Pin# 1 ID

TOP VIEW

Pin #1 Corner

SEATING PLANE

A1 A3 A
Updated ”Features” on page Removed VFBGA - pinout from ”Pin Configurations” on page Updated ”System Control and Reset” on page Updated Input Hysteresis Unit V in the “Typical Characteristics”. Updated ”Ordering Information” on page Removed 44MC and 49C2 packages. Updated ”Packaging Information” on page

Updated ”Features” on page 1 by inserting a table note Merged Sections and in one section ”About” on page Updated the front page by removing “Preliminary”. Updated the ”DC Characteristics” on page 325 by removing VIL3/VIH3 and VOL3/VOH3 and
the table note Updated the table note1 of the Table 25-6 on page Updated ”Typical Characteristics” on page 338
Updated ”Features” on page 1, ”Pin Configurations” on page 2 and ”Ordering Information” on page 420 according to the updated 44M1 package drawing.

Updated VOL in the table of ”DC Characteristics” on page Updated tRST and tBOD unites in the table of ”System and Reset Characteristics” on
page Updated typical values for ATmega324P and ATmega644P in the tables of ”DC Char-

ATmega164P/324P/644P

Updated ATmega644P ”Errata” on page Added 49-ball VFBGA pinout for ATmega164P/324P in ”” on page Added 49-ball VFBGA 49C2 to ”Packaging Information” on page

Updated description in ”AVCC” on page Updated ”Stack Pointer” on page Updated Data Memory Map addresses, Figure 5-2 on page Updated description of use of external capacitors in ”Low Frequency Crystal Oscillator”
on page Updated typo in”Alternate Functions of Port C” on page Updated bit description in ”TWSR TWI Status Register” on page Updated typo in ”Programming via the JTAG Interface” on page Updated conditions for VOL in the table of ”DC Characteristics” on page Updated ”External Clock Drive” on page Updated conditions for VINT2 in Table 25-11 Single Ended channels in ”ADC Charac-
teristics” on page Updated Minimum Reference Voltage in Table 25-12 Differential channels in ”ADC

Characteristics” on page Updated bit field typos in ”Register Summary” on page Added 49-ball VFBGA pinout for ATmega164P/324P in ”” on page Added 49-ball VFBGA 49C2 to ”Packaging Information” on page
Added 44-pad DRQFN pinout for ATmega164P in ”Pinout - DRQFN” on page Added 49-ball VFBGA pinout for ATmega164P/324P in ”” on page Added note to ”Address Match Unit” on page Updated ATmega164P ”Ordering Information” on page Added 44-lead QFN 44MC to ”Packaging Information” on page Added 49-ball VFBGA 49C2 to ”Packaging Information” on page

Updated ”Features” on page 1 Added ”Data Retention” on page Updated ”SPH and SPL Stack Pointer High and Stack pointer Low” on page LCD reference removed from table note in ”Sleep Modes” on page Updated code example in ”Bit 0 IVCE Interrupt Vector Change Enable” on page

ATmega164P/324P/644P

Removed reference to External Memory Interface in ”Alternate Functions of Port A” on page

Updated ”Data Reception The USART Receiver” on page Updated ”ADCSRB ADC Control and Status Register B” on page Updated overview in ”ADC - Analog-to-digital Converter” on page Added ”ATmega644P Typical Characteristic” on page Updated Figure 26-31 on page 354, Figure on page 355,Figure 26-33 on page 355 Updated notes in Table 6-3 on page 32.Table 6-9 on page 35, Table 6-10 on page 36,
and Table 6-12 on page Updated Table 11-7 on page 84, Table 11-8 on page 84, Table 11-10 on page 86,

Table 11-11 on page 87, Table 11-14 on page 90, Table 25-1 on page 327,Table 25-2 on page 327,Table 27-5 on page 331, Table 25-9 on page 332, and Table 25-12 on page 336 Updated ”ATmega324P DC Characteristics” on page 327 and ”ATmega644P DC Characteristics” on page Updated Table 25-7 on page 331 and Table 6-14 on page

Updated ”Watchdog Timer Configuration” on page

Updated ”GTCCR General Timer/Counter Control Register” on page Updated ”EECR The EEPROM Control Register” on page

Updated ”Pinout ATmega164P/324P/644P” on page Updated ”Power-down Mode” on page Updated note in Table 10-1 on page Updated Table 22-1 on page Updated ”Boot Size Configuration 1 ” on page Updated VOL limits in ”DC Characteristics” on page Updated note 3 and 4 in ”DC Characteristics” on page Added note to ”ATmega164P DC Characteristics” on page Added note to ”ATmega324P DC Characteristics” on page Updated Figure 26-13 on page 345 and Figure 26-60 on page

Updated ”DC Characteristics” on page

ATmega164P/324P/644P

Updated ”DC Characteristics” on page

ATmega164P/324P/644P

Table of Contents

Features 1 Pin Configurations 2

Pinout - PDIP/TQFP/VQFN/QFN/MLF Pinout - DRQFN
2 Overview 4

Block Diagram Comparison Between ATmega164P, ATmega324P and ATmega644P Pin Descriptions
3 About 8

Resources About Code Examples Data Retention
4 AVR CPU Core 9

Overview ALU Arithmetic Logic Unit Status Register General Purpose Register File Stack Pointer Instruction Execution Timing Reset and Interrupt Handling
5 AVR Memories 18

Overview In-System Reprogrammable Flash Program Memory SRAM Data Memory EEPROM Data Memory I/O Memory Register Description
6 System Clock and Clock Options 29

Clock Systems and their Distribution Clock Sources Low Power Crystal Oscillator Full Swing Crystal Oscillator

ATmega164P/324P/644P

Low Frequency Crystal Oscillator Calibrated Internal RC Oscillator 128 kHz Internal Oscillator External Clock Timer/Counter Oscillator Clock Output Buffer System Clock Prescaler Register Description
7 Power Management and Sleep Modes 42

Overview Sleep Modes BOD Disable Idle Mode ADC Noise Reduction Mode Power-down Mode Power-save Mode Standby Mode Extended Standby Mode Power Reduction Register Minimizing Power Consumption Register Description
8 System Control and Reset 50

Resetting the AVR Reset Sources Power-on Reset External Reset Brown-out Detection Watchdog Reset Internal Voltage Reference Watchdog Timer Register Description
9 Interrupts 61

Overview Interrupt Vectors in ATmega164P/324P/644P Register Description

ATmega164P/324P/644P
10 External Interrupts 67

Overview Register Description
11 I/O-Ports 72

Overview Ports as General Digital I/O Alternate Port Functions Register Description
12 8-bit Timer/Counter0 with PWM 93
27 Register Summary 413 28 Instruction Set Summary 417 29 Ordering Information 420

ATmega164P ATmega324P ATmega644P
30 Packaging Information 423
44A 40P6 44M1
31 Errata 426

ATmega164P ATmega324P ATmega644P

Table of i

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Datasheet ID: ATMEGA324P-20PU 519261