AT28C64B-15SC

AT28C64B-15SC Datasheet

The AT28C64B is a high-performance electrically-erasable and programmable read only memory EEPROM . Its 64K of memory is organized as 8,192 words by 8 bits. Manufactured with Atmel’s advanced nonvolatile CMOS technology, the device offers

Part	Datasheet
AT28C64B-15SC	AT28C64B-15SC (pdf)

Related Parts	Information
AT28C64B-15PC	AT28C64B-15PC
AT28C64B-15JI	AT28C64B-15JI
AT28C64B-15SI	AT28C64B-15SI
AT28C64B-15TC	AT28C64B-15TC
AT28C64B-15JC	AT28C64B-15JC
AT28C64B-15PI	AT28C64B-15PI
AT28C64B-15TI	AT28C64B-15TI

PDF Datasheet Preview
• Fast Read Access Time 150 ns • Automatic Page Write Operation Internal Address and Data Latches for 64 Bytes • Fast Write Cycle Times Page Write Cycle Time 10 ms Maximum Standard 2 ms Maximum Option 1 to 64-byte Page Write Operation • Low Power Dissipation 40 mA Active Current 100 µA CMOS Standby Current • Hardware and Software Data Protection • DATA Polling and Toggle Bit for End of Write Detection • High Reliability CMOS Technology Endurance 100,000 Cycles Data Retention 10 Years • Single 5 V ±10% Supply • CMOS and TTL Compatible Inputs and Outputs • JEDEC Approved Byte-wide Pinout • Commercial and Industrial Temperature Ranges The AT28C64B is a high-performance electrically-erasable and programmable read only memory EEPROM . Its 64K of memory is organized as 8,192 words by 8 bits. Manufactured with Atmel’s advanced nonvolatile CMOS technology, the device offers 64K 8K x 8 Parallel EEPROM with Page Write and Software Data Protection AT28C64B Pin Configurations Pin Name A0 - A12 Function Addresses CE OE WE I/O0 - I/O7 NC DC Chip Enable Output Enable Write Enable Data Inputs/Outputs No Connect Don’t Connect PLCC Top View 4 A7 3 A12 2 NC 1 DC 32 VCC 31 WE 30 NC A6 5 A5 6 A4 7 A3 8 A2 9 A1 10 A0 11 NC 12 I/O0 13 29 A8 28 A9 27 A11 26 NC 25 OE 24 A10 23 CE 22 I/O7 21 I/O6 I/O1 14 I/O2 15 GND 16 DC 17 I/O3 18 I/O4 19 I/O5 20 Note PLCC package pins 1 and 17 are DON’T CONNECT. OE 1 A11 2 A9 3 A8 4 NC 5 WE 6 VCC 7 NC 8 A12 9 A7 10 A6 11 A5 12 A4 13 A3 14 PDIP, SOIC Top View NC 1 A12 2 A7 3 A6 4 A5 5 A4 6 A3 7 A2 8 A1 9 A0 10 I/O0 11 I/O1 12 I/O2 13 GND 14 28 VCC 27 WE 26 NC 25 A8 24 A9 23 A11 22 OE 21 A10 20 CE 19 I/O7 18 I/O6 17 I/O5 16 I/O4 15 I/O3 TSOP Top View 28 A10 27 CE 26 I/O7 25 I/O6 24 I/O5 23 I/O4 22 I/O3 21 GND 20 I/O2 19 I/O1 18 I/O0 17 A0 16 A1 15 A2 Block Diagram access times to 150 ns with power dissipation of just 220 mW. When the device is deselected, the CMOS standby current is less than 100 µA. The AT28C64B is accessed like a Static RAM for the read or write cycle without the need for external components. The device contains a 64-byte page register to allow writing of up to 64 bytes simultaneously. During a write cycle, the addresses and 1 to 64 bytes of data are internally latched, freeing the address and data bus for other operations. Following the initiation of a write cycle, the device will automatically write the latched data using an internal control timer. The end of a write cycle can be detected by DATA POLLING of I/O7. Once the end of a write cycle has been detected, a new access for a read or write can begin. Atmel’s AT28C64B has additional features to ensure high quality and manufacturability. The device utilizes internal error correction for extended endurance and improved data retention characteristics. An optional software data protection mechanism is available to guard against inadvertent writes. The device also includes an extra 64 bytes of EEPROM for device identification or tracking. VCC GND OE WE CE ADDRESS INPUTS OE, CE and WE LOGIC Y DECODER X DECODER DATA INPUTS/OUTPUTS I/O0 - I/O7 DATA LATCH INPUT/OUTPUT BUFFERS Y-GATING CELL MATRIX Parameter Write Cycle Time Write Cycle Time option available contact Atmel sales office for ordering part number Address Setup Time Address Hold Time Data Setup Time Data Hold Time Write Pulse Width Byte Load Cycle Time Write Pulse Width High Units Page Mode Write Waveforms 1 2 CE WE A0 -A12 DATA tAS tAH VALID ADD VALID DATA tWP tDH tWPH tBLC tWC Notes A6 through A12 must specify the same page address during each high to low transition of WE or CE . OE must be high only when WE and CE are both low. 8 AT28C64B Chip Erase Waveforms AT28C64B tS = tH = 1 µs min. tW = 10 ms min. VH = V Software Data Protection Algorithms Software Data Protection Enable Algorithm 1 LOAD DATA AA TO ADDRESS 1555 LOAD DATA 55 TO ADDRESS 0AAA LOAD DATA A0 TO ADDRESS 1555 WRITES ENABLED 2 LOAD DATA XX TO ANY ADDRESS 4 LOAD LAST BYTE TO LAST ADDRESS ENTER DATA PROTECT STATE Note: Notes for software program code: Data Format I/O7 - I/O0 Hex Address Format A12 - A0 Hex . Write Protect state will be activated at end of write even if no other data is loaded. Write Protect state will be deactivated at end of write period even if no other data is loaded. 1 to 64 bytes of data are loaded. Software Data Protection Disable Algorithm 1 LOAD DATA AA TO ADDRESS 1555 LOAD DATA 55 TO ADDRESS 0AAA LOAD DATA 80 TO ADDRESS 1555 Ordering Information 1 tACC ICC mA Active Standby Ordering Code AT28C64B-15JC AT28C64B-15PC AT28C64B-15SC AT28C64B-15TC AT28C64B-15JI AT28C64B-15PI AT28C64B-15SI AT28C64B-15TI AT28C64B-20JC AT28C64B-20PC AT28C64B-20SC AT28C64B-20TC AT28C64B-20JI AT28C64B-20PI AT28C64B-20SI AT28C64B-20TI AT28C64B-25JC AT28C64B-25PC AT28C64B-25SC AT28C64B-25TC AT28C64B-25JI AT28C64B-25PI AT28C64B-25SI AT28C64B-25TI Note See “Valid Part Numbers” on page Package 32J 28P6 28S 28T 32J 28P6 28S 28T 32J 28P6 28S 28T 32J 28P6 28S 28T 32J 28P6 28S 28T 32J 28P6 28S 28T Valid Part Numbers The following table lists standard Atmel products that can be ordered. Device Numbers Speed Package and Temperature Combinations AT28C64B JC, JI, PC, PI, SC, SI, TC, TI AT28C64B JC, JI, PC, PI, SC, SI, TC, TI AT28C64B JC, JI, PC, PI, SC, SI, TC, TI AT28C64B Die Products Reference Section Parallel EEPROM Die Products AT28C64B Operation Range Commercial 0°C to 70°C Industrial -40°C to 85°C Commercial 0°C to 70°C Industrial -40°C to 85°C Commercial 0°C to 70°C Industrial -40°C to 85°C 32J 28P6 28S 28T W Package Type 32-lead, Plastic J-leaded Chip Carrier PLCC 28-lead, Wide, Plastic Dual Inline Package PDIP 28-lead, Wide, Plastic Gull Wing Small Outline SOIC 28-lead, Plastic Thin Small Outline Package TSOP Die 16 AT28C64B Packaging Information 32J PLCC

PDF Datasheet Preview

• Fast Read Access Time 150 ns
• Automatic Page Write Operation

Internal Address and Data Latches for 64 Bytes
• Fast Write Cycle Times

Page Write Cycle Time 10 ms Maximum Standard 2 ms Maximum Option
1 to 64-byte Page Write Operation
• Low Power Dissipation
40 mA Active Current 100 µA CMOS Standby Current
• Hardware and Software Data Protection
• DATA Polling and Toggle Bit for End of Write Detection
• High Reliability CMOS Technology Endurance 100,000 Cycles Data Retention 10 Years
• Single 5 V ±10% Supply
• CMOS and TTL Compatible Inputs and Outputs
• JEDEC Approved Byte-wide Pinout
• Commercial and Industrial Temperature Ranges

The AT28C64B is a high-performance electrically-erasable and programmable read only memory EEPROM . Its 64K of memory is organized as 8,192 words by 8 bits. Manufactured with Atmel’s advanced nonvolatile CMOS technology, the device offers
64K 8K x 8 Parallel EEPROM with Page Write and Software Data Protection

AT28C64B

Pin Configurations

Pin Name A0 - A12

Function Addresses

CE OE WE I/O0 - I/O7 NC DC

Chip Enable Output Enable Write Enable Data Inputs/Outputs No Connect Don’t Connect

PLCC Top View
4 A7 3 A12 2 NC 1 DC 32 VCC 31 WE 30 NC

A6 5 A5 6 A4 7 A3 8 A2 9 A1 10 A0 11 NC 12 I/O0 13
29 A8 28 A9 27 A11 26 NC 25 OE 24 A10 23 CE 22 I/O7 21 I/O6

I/O1 14 I/O2 15 GND 16 DC 17 I/O3 18 I/O4 19 I/O5 20

Note PLCC package pins 1 and 17 are DON’T CONNECT.

OE 1 A11 2

A9 3 A8 4 NC 5 WE 6 VCC 7 NC 8 A12 9 A7 10 A6 11 A5 12 A4 13 A3 14

PDIP, SOIC Top View

NC 1 A12 2

A7 3 A6 4 A5 5 A4 6 A3 7 A2 8 A1 9 A0 10 I/O0 11 I/O1 12 I/O2 13 GND 14
28 VCC 27 WE 26 NC 25 A8 24 A9 23 A11 22 OE 21 A10 20 CE 19 I/O7 18 I/O6 17 I/O5 16 I/O4 15 I/O3

TSOP Top View
28 A10 27 CE 26 I/O7 25 I/O6 24 I/O5 23 I/O4 22 I/O3 21 GND 20 I/O2 19 I/O1 18 I/O0 17 A0 16 A1 15 A2

Block Diagram
access times to 150 ns with power dissipation of just 220 mW. When the device is deselected, the CMOS standby current is less than 100 µA.

The AT28C64B is accessed like a Static RAM for the read or write cycle without the need for external components. The device contains a 64-byte page register to allow writing of up to 64 bytes simultaneously. During a write cycle, the addresses and 1 to 64 bytes of data are internally latched, freeing the address and data bus for other operations. Following the initiation of a write cycle, the device will automatically write the latched data using an internal control timer. The end of a write cycle can be detected by DATA POLLING of I/O7. Once the end of a write cycle has been detected, a new access for a read or write can begin.

Atmel’s AT28C64B has additional features to ensure high quality and manufacturability. The device utilizes internal error correction for extended endurance and improved data retention characteristics. An optional software data protection mechanism is available to guard against inadvertent writes. The device also includes an extra 64 bytes of EEPROM for device identification or tracking.

VCC GND

OE WE CE

ADDRESS INPUTS

OE, CE and WE LOGIC

Y DECODER

X DECODER

DATA INPUTS/OUTPUTS I/O0 - I/O7

DATA LATCH INPUT/OUTPUT

BUFFERS Y-GATING

CELL MATRIX
Parameter Write Cycle Time Write Cycle Time option available contact Atmel sales office for ordering part number Address Setup Time Address Hold Time Data Setup Time Data Hold Time Write Pulse Width Byte Load Cycle Time Write Pulse Width High

Units

Page Mode Write Waveforms 1 2

CE WE A0 -A12 DATA
tAS tAH

VALID ADD

VALID DATA
tWP tDH
tWPH
tBLC tWC

Notes A6 through A12 must specify the same page address during each high to low transition of WE or CE . OE must be high only when WE and CE are both low.
8 AT28C64B

Chip Erase Waveforms

AT28C64B
tS = tH = 1 µs min. tW = 10 ms min. VH = V

Software Data Protection Algorithms

Software Data Protection Enable Algorithm 1

LOAD DATA AA TO

ADDRESS 1555

LOAD DATA 55 TO

ADDRESS 0AAA

LOAD DATA A0 TO

ADDRESS 1555

WRITES ENABLED 2

LOAD DATA XX TO

ANY ADDRESS 4

LOAD LAST BYTE TO

LAST ADDRESS

ENTER DATA PROTECT STATE

Note:

Notes for software program code:

Data Format I/O7 - I/O0 Hex Address Format A12 - A0 Hex .

Write Protect state will be activated at end of write even if no other data is loaded. Write Protect state will be deactivated at end of write period even if no other data is
loaded. 1 to 64 bytes of data are loaded.

Software Data Protection Disable Algorithm 1

LOAD DATA AA TO

ADDRESS 1555

LOAD DATA 55 TO

ADDRESS 0AAA

LOAD DATA 80 TO

ADDRESS 1555
Ordering Information 1
tACC

ICC mA

Active

Standby
Ordering Code

AT28C64B-15JC AT28C64B-15PC AT28C64B-15SC AT28C64B-15TC

AT28C64B-15JI AT28C64B-15PI AT28C64B-15SI AT28C64B-15TI

AT28C64B-20JC AT28C64B-20PC AT28C64B-20SC AT28C64B-20TC

AT28C64B-20JI AT28C64B-20PI AT28C64B-20SI AT28C64B-20TI

AT28C64B-25JC AT28C64B-25PC AT28C64B-25SC AT28C64B-25TC

AT28C64B-25JI AT28C64B-25PI AT28C64B-25SI AT28C64B-25TI

Note See “Valid Part Numbers” on page

Package
32J 28P6 28S 28T
32J 28P6 28S 28T
32J 28P6 28S 28T
32J 28P6 28S 28T
32J 28P6 28S 28T
32J 28P6 28S 28T

Valid Part Numbers

The following table lists standard Atmel products that can be ordered.

Device Numbers

Speed

Package and Temperature Combinations

AT28C64B

JC, JI, PC, PI, SC, SI, TC, TI

AT28C64B

JC, JI, PC, PI, SC, SI, TC, TI

AT28C64B

JC, JI, PC, PI, SC, SI, TC, TI

AT28C64B

Die Products

Reference Section Parallel EEPROM Die Products

AT28C64B

Operation Range Commercial 0°C to 70°C

Industrial -40°C to 85°C

Commercial 0°C to 70°C

Industrial -40°C to 85°C

Commercial 0°C to 70°C

Industrial -40°C to 85°C
32J 28P6 28S 28T W

Package Type 32-lead, Plastic J-leaded Chip Carrier PLCC 28-lead, Wide, Plastic Dual Inline Package PDIP 28-lead, Wide, Plastic Gull Wing Small Outline SOIC 28-lead, Plastic Thin Small Outline Package TSOP Die
16 AT28C64B

Packaging Information
32J PLCC

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Datasheet ID: AT28C64B-15SC 518970