AT27C040-15TC

AT27C040-15TC Datasheet

The AT27C040 chip is a low-power, high-performance, 4,194,304-bit one-time programmable read-only memory OTP EPROM organized as 512K by 8 bits. The AT27C040 requires only one 5V power supply in normal read mode operation. Any byte can be accessed in less than 70 ns, eliminating the need for speed reducing WAIT states on high-performance microprocessor systems.

Part	Datasheet
AT27C040-15TC	AT27C040-15TC (pdf)

Related Parts	Information
AT27C040-70TC	AT27C040-70TC
AT27C040-70TI	AT27C040-70TI
AT27C040-90JI	AT27C040-90JI
AT27C040-90PI	AT27C040-90PI
AT27C040-70PI	AT27C040-70PI
AT27C040-90TI	AT27C040-90TI
AT27C040-90TC	AT27C040-90TC
AT27C040-12PI	AT27C040-12PI
AT27C040-70JI	AT27C040-70JI
AT27C040-15TI	AT27C040-15TI
AT27C040-12JC	AT27C040-12JC
AT27C040-12PC	AT27C040-12PC
AT27C040-12TC	AT27C040-12TC
AT27C040-12TI	AT27C040-12TI
AT27C040-15JC	AT27C040-15JC
AT27C040-15JI	AT27C040-15JI
AT27C040-15PC	AT27C040-15PC
AT27C040-15PI	AT27C040-15PI
AT27C040-12JI	AT27C040-12JI
AT27C040-70TU	AT27C040-70TU
AT27C040-90TU	AT27C040-90TU
AT27C040-90JC	AT27C040-90JC
AT27C040-70PC	AT27C040-70PC
AT27C040-70JC	AT27C040-70JC
AT27C040-90PC	AT27C040-90PC

PDF Datasheet Preview
• Fast Read Access Time 70 ns • Low Power CMOS Operation 100 µA Max Standby 30 mA Max Active at 5 MHz • JEDEC Standard Packages 32-lead, 600-mil PDIP 32-lead PLCC 32-lead TSOP • 5V ± 10% Supply • High Reliability CMOS Technology 2000V ESD Protection 200 mA Latchup Immunity • Rapid Programming Algorithm 100 µs/Byte Typical • CMOS and TTL Compatible Inputs and Outputs • Integrated Product Identification Code • Commercial and Industrial Temperature Ranges The AT27C040 chip is a low-power, high-performance, 4,194,304-bit one-time programmable read-only memory OTP EPROM organized as 512K by 8 bits. The AT27C040 requires only one 5V power supply in normal read mode operation. Any byte can be accessed in less than 70 ns, eliminating the need for speed reducing WAIT states on high-performance microprocessor systems. Pin Configurations Pin Name Function A0 - A18 Addresses O0 - O7 CE Outputs Chip Enable Output Enable PDIP Top View VPP 1 A16 2 A15 3 A12 4 A7 5 A6 6 A5 7 A4 8 A3 9 A2 10 A1 11 A0 12 O0 13 O1 14 O2 15 GND 16 32 VCC 31 A18 30 A17 29 A14 28 A13 27 A8 26 A9 25 A11 24 OE 23 A10 22 CE 21 07 20 06 19 05 18 04 17 03 TSOP Top View A11 1 A9 2 A8 3 A13 4 A14 5 A17 6 A18 7 VCC 8 VPP 9 A16 10 A15 11 A12 12 A7 13 A6 14 A5 15 A4 16 32 OE 31 A10 30 CE 29 07 28 06 27 05 26 04 25 03 24 GND 23 02 22 01 21 O0 20 A0 19 A1 18 A2 17 A3 PLCC Top View 4 A12 3 A15 2 A16 1 VPP 32 VCC 31 A18 30 A17 A7 5 A6 6 A5 7 A4 8 A3 9 A2 10 A1 11 A0 12 O0 13 29 A14 28 A13 27 A8 26 A9 25 A11 24 OE 23 A10 22 CE 21 07 4-Megabit 512K x 8 OTP EPROM AT27C040 01 14 02 15 GND 16 03 17 04 18 05 19 06 20 Switching Considerations Block Diagram Atmel’s scaled CMOS technology provides low active power consumption, and fast programming. Power consumption is typically 8 mA in active mode and less than 10 µA in standby mode. The AT27C040 is available in a choice of industry standard JEDEC-approved one-time programmable OTP plastic PDIP, PLCC and TSOP packages. The device features two-line control CE, OE to eliminate bus contention in high-speed systems. Atmel’s AT27C040 has additional features to ensure high quality and efficient production use. The Rapid Programming Algorithm reduces the time required to program the part and guarantees reliable programming. Programming time is typically only 100 µs/byte. The Integrated Product Identification Code electronically identifies the device and manufacturer. This feature is used by industry standard programming equipment to select the proper programming algorithms and voltages. Switching between active and standby conditions via the Chip Enable pin may produce transient voltage excursions. Unless accommodated by the system design, these transients may exceed datasheet limits, resulting in device non-conformance. At a minimum, a µF high frequency, low inherent inductance, ceramic capacitor should be utilized for each device. This capacitor should be connected between the VCC and Ground terminals of the device, as close to the device as possible. Additionally, to stabilize the supply voltage level on printed circuit boards with large EPROM arrays, a µF bulk electrolytic capacitor should be utilized, again connected between the VCC and Ground terminals. This capacitor should be positioned as close as possible to the point where the power supply is connected to the array. 2 AT27C040 AT27C040 Operating Modes Mode/Pin Outputs Read DOUT Output Disable Ordering Information tACC ns 70 ICC mA Active Standby Ordering Code AT27C040-70JC AT27C040-70PC AT27C040-70TC AT27C040-70JI AT27C040-70PI AT27C040-70TI AT27C040-90JC AT27C040-90PC AT27C040-90TC AT27C040-90JI AT27C040-90PI AT27C040-90TI AT27C040-12JC AT27C040-12PC AT27C040-12TC AT27C040-12JI AT27C040-12PI AT27C040-12TI AT27C040-15JC AT27C040-15PC AT27C040-15TC AT27C040-15JI AT27C040-15PI AT27C040-15TI Package 32J 32P6 32T 32J 32P6 32T 32J 32P6 32T 32J 32P6 32T 32J 32P6 32T 32J 32P6 32T 32J 32P6 32T 32J 32P6 32T AT27C040 Operation Range Commercial 0° C to 70° C Industrial -40° C to 85° C Commercial 0° C to 70° C Industrial -40° C to 85° C Commercial 0° C to 70° C Industrial -40° C to 85° C Commercial 0° C to 70° C Industrial -40° C to 85° C 32J 32P6 32T Package Type 32-lead, Plastic J-leaded Chip Carrier PLCC 32-lead, Wide, Plastic Dual Inline Package PDIP 32-lead, Plastic Thin Small Outline Package TSOP Package Information 32J PLCC PIN NO. 1 IDENTIFIER e D1 D B1 E2 A2 A1 A 0.51 0.020 MAX 3X COMMON DIMENSIONS Unit of Measure = mm This package conforms to JEDEC reference MS-016, Variation AE. Dimensions D1 and E1 do not include mold protrusion. Allowable protrusion is mm per side. Dimension D1 and E1 include mold mismatch and are measured at the extreme material condition at the upper or lower parting line. Lead coplanarity is mm maximum. SYMBOL MIN NOM MAX NOTE Note 2

PDF Datasheet Preview

• Fast Read Access Time 70 ns
• Low Power CMOS Operation
100 µA Max Standby 30 mA Max Active at 5 MHz
• JEDEC Standard Packages 32-lead, 600-mil PDIP 32-lead PLCC 32-lead TSOP
• 5V ± 10% Supply
• High Reliability CMOS Technology 2000V ESD Protection 200 mA Latchup Immunity
• Rapid Programming Algorithm 100 µs/Byte Typical
• CMOS and TTL Compatible Inputs and Outputs
• Integrated Product Identification Code
• Commercial and Industrial Temperature Ranges

The AT27C040 chip is a low-power, high-performance, 4,194,304-bit one-time programmable read-only memory OTP EPROM organized as 512K by 8 bits. The AT27C040 requires only one 5V power supply in normal read mode operation. Any byte can be accessed in less than 70 ns, eliminating the need for speed reducing WAIT states on high-performance microprocessor systems.

Pin Configurations

Pin Name

Function

A0 - A18

Addresses

O0 - O7 CE

Outputs Chip Enable

Output Enable

PDIP Top View

VPP 1 A16 2 A15 3 A12 4

A7 5 A6 6 A5 7 A4 8 A3 9 A2 10 A1 11 A0 12 O0 13 O1 14 O2 15 GND 16
32 VCC 31 A18 30 A17 29 A14 28 A13 27 A8 26 A9 25 A11 24 OE 23 A10 22 CE 21 07 20 06 19 05 18 04 17 03

TSOP Top View

A11 1 A9 2 A8 3

A13 4 A14 5 A17 6 A18 7 VCC 8 VPP 9 A16 10 A15 11 A12 12

A7 13 A6 14 A5 15 A4 16
32 OE 31 A10 30 CE 29 07 28 06 27 05 26 04 25 03 24 GND 23 02 22 01 21 O0 20 A0 19 A1 18 A2 17 A3

PLCC Top View
4 A12 3 A15 2 A16 1 VPP 32 VCC 31 A18 30 A17

A7 5 A6 6 A5 7 A4 8 A3 9 A2 10 A1 11 A0 12 O0 13
29 A14 28 A13 27 A8 26 A9 25 A11 24 OE 23 A10 22 CE 21 07
4-Megabit 512K x 8 OTP EPROM

AT27C040
01 14 02 15 GND 16 03 17 04 18 05 19 06 20

Switching Considerations

Block Diagram

Atmel’s scaled CMOS technology provides low active power consumption, and fast programming. Power consumption is typically 8 mA in active mode and less than 10 µA in standby mode.

The AT27C040 is available in a choice of industry standard JEDEC-approved one-time programmable OTP plastic PDIP, PLCC and TSOP packages. The device features two-line control CE, OE to eliminate bus contention in high-speed systems.

Atmel’s AT27C040 has additional features to ensure high quality and efficient production use. The Rapid Programming Algorithm reduces the time required to program the part and guarantees reliable programming. Programming time is typically only 100 µs/byte. The Integrated Product Identification Code electronically identifies the device and manufacturer. This feature is used by industry standard programming equipment to select the proper programming algorithms and voltages.

Switching between active and standby conditions via the Chip Enable pin may produce transient voltage excursions. Unless accommodated by the system design, these transients may exceed datasheet limits, resulting in device non-conformance. At a minimum, a µF high frequency, low inherent inductance, ceramic capacitor should be utilized for each device. This capacitor should be connected between the VCC and Ground terminals of the device, as close to the device as possible. Additionally, to stabilize the supply voltage level on printed circuit boards with large EPROM arrays, a µF bulk electrolytic capacitor should be utilized, again connected between the VCC and Ground terminals. This capacitor should be positioned as close as possible to the point where the power supply is connected to the array.
2 AT27C040

AT27C040

Operating Modes

Mode/Pin

Outputs

Read

DOUT

Output Disable
Ordering Information
tACC ns 70

ICC mA

Active

Standby
Ordering Code

AT27C040-70JC AT27C040-70PC AT27C040-70TC

AT27C040-70JI AT27C040-70PI AT27C040-70TI

AT27C040-90JC AT27C040-90PC AT27C040-90TC

AT27C040-90JI AT27C040-90PI AT27C040-90TI

AT27C040-12JC AT27C040-12PC AT27C040-12TC

AT27C040-12JI AT27C040-12PI AT27C040-12TI

AT27C040-15JC AT27C040-15PC AT27C040-15TC

AT27C040-15JI AT27C040-15PI AT27C040-15TI

Package
32J 32P6 32T
32J 32P6 32T
32J 32P6 32T
32J 32P6 32T
32J 32P6 32T
32J 32P6 32T
32J 32P6 32T
32J 32P6 32T

AT27C040

Operation Range Commercial 0° C to 70° C

Industrial -40° C to 85° C

Commercial 0° C to 70° C

Industrial -40° C to 85° C

Commercial 0° C to 70° C

Industrial -40° C to 85° C

Commercial 0° C to 70° C

Industrial -40° C to 85° C
32J 32P6 32T

Package Type 32-lead, Plastic J-leaded Chip Carrier PLCC 32-lead, Wide, Plastic Dual Inline Package PDIP 32-lead, Plastic Thin Small Outline Package TSOP

Package Information
32J PLCC

PIN NO. 1 IDENTIFIER
e D1 D

B1 E2

A2 A1 A
0.51 0.020 MAX 3X

COMMON DIMENSIONS Unit of Measure = mm

This package conforms to JEDEC reference MS-016, Variation AE. Dimensions D1 and E1 do not include mold protrusion.

Allowable protrusion is mm per side. Dimension D1 and E1 include mold mismatch and are measured at the extreme material condition at the upper or lower parting line. Lead coplanarity is mm maximum.

SYMBOL MIN NOM MAX NOTE

Note 2

Notice: we do not provide any warranties that information, datasheets, application notes, circuit diagrams, or software stored on this website are up-to-date or error free. The archived AT27C040-15TC Datasheet file may be downloaded here without warranties.

Datasheet ID: AT27C040-15TC 518936