AT24C256W-10SI-2.7

AT24C256W-10SI-2.7 Datasheet

The AT24C128/256 provides 131,072/262,144 bits of serial electrically erasable and programmable read only memory EEPROM organized as 16,384/32,768 words of 8 bits each. The device’s cascadable feature allows up to 4 devices to share a common 2-wire bus. The device is optimized for use in many industrial and commercial applications where low power and low voltage operation are essential. The devices are available in space-saving 8-lead JEDEC PDIP, 8-lead JEDEC SOIC, 8-lead EIAJ SOIC, 8-lead MAP 24C128 , 8-lead TSSOP and 8-ball dBGA2 packages. In addition, the entire family is available in 2.7V 2.7V to 5.5V and 1.8V 1.8V to 3.6V versions.

Part	Datasheet
AT24C256W-10SI-2.7	AT24C256W-10SI-2.7 (pdf)

Related Parts	Information
AT24C256N-10SI-1.8	AT24C256N-10SI-1.8
AT24C256N-10SI-2.7	AT24C256N-10SI-2.7
AT24C256W-10SI-1.8	AT24C256W-10SI-1.8
AT24C256-10PI-1.8	AT24C256-10PI-1.8
AT24C256N-10SI-2.7-T	AT24C256N-10SI-2.7-T
AT24C256W-10SI-2.7-T	AT24C256W-10SI-2.7-T
AT24C256-10TI-2.7	AT24C256-10TI-2.7
AT24C128Y1-10YI-2.7	AT24C128Y1-10YI-2.7
AT24C256-10TI-1.8	AT24C256-10TI-1.8
AT24C128Y1-10YI-1.8	AT24C128Y1-10YI-1.8
AT24C256-10PI-2.7	AT24C256-10PI-2.7

PDF Datasheet Preview
• Low-voltage and Standard-voltage Operation VCC = 2.7V to 5.5V VCC = 1.8V to 3.6V • Internally Organized 16,384 x 8 and 32,768 x 8 • 2-wire Serial Interface • Schmitt Trigger, Filtered Inputs for Noise Suppression • Bidirectional Data Transfer Protocol • 1 MHz 5V , 400 kHz 2.7V, 2.5V and 100 kHz 1.8V Compatibility • Write Protect Pin for Hardware and Software Data Protection • 64-byte Page Write Mode Partial Page Writes Allowed • Self-timed Write Cycle 5 ms Max • High Reliability Endurance One Million Write Cycles Data Retention 40 Years • Extended Temperature and Lead-free/Halogen-free Devices Available • 8-lead JEDEC PDIP, 8-lead JEDEC and EIAJ SOIC, 8-lead MAP, 8-lead TSSOP and 8-ball dBGA2TM Packages The AT24C128/256 provides 131,072/262,144 bits of serial electrically erasable and programmable read only memory EEPROM organized as 16,384/32,768 words of 8 bits each. The device’s cascadable feature allows up to 4 devices to share a common 2-wire bus. The device is optimized for use in many industrial and commercial applications where low power and low voltage operation are essential. The devices are available in space-saving 8-lead JEDEC PDIP, 8-lead JEDEC SOIC, 8-lead EIAJ SOIC, 8-lead MAP 24C128 , 8-lead TSSOP and 8-ball dBGA2 packages. In addition, the entire family is available in 2.7V 2.7V to 5.5V and 1.8V 1.8V to 3.6V versions. 2-wire Serial EEPROMs 128K 16,384 x 8 256K 32,768 x 8 AT24C128 AT24C256 Pin Configurations Pin Name A0 - A1 SDA SCL WP NC GND Function Address Inputs Serial Data Serial Clock Input Write Protect No Connect Ground 8-lead PDIP A0 1 A1 2 NC 3 GND 4 8 VCC 7 WP 6 SCL 5 SDA 8-lead SOIC A0 1 A1 2 NC 3 GND 4 8 VCC 7 WP 6 SCL 5 SDA 8-ball dBGA2 VCC 8 WP 7 SCL 6 SDA 5 1 A0 2 A1 3 NC 4 GND Bottom View 8-lead TSSOP A0 1 A1 2 NC 3 GND 4 8 VCC 7 WP 6 SCL 5 SDA 8-lead MAP VCC 8 WP 7 SCL 6 SDA 5 1 A0 2 A1 3 NC 4 GND Bottom View Absolute Maximum Ratings* Operating -55°C to +125°C Storage Temperature -65°C to +150°C Voltage on Any Pin with Respect to Ground to +7.0V Maximum Operating Voltage 6.25V DC Output mA Block Diagram *NOTICE: Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. 2 AT24C128/256 AT24C128/256 Pin Description Memory Organization SERIAL CLOCK SCL The SCL input is used to positive edge clock data into each EEPROM device and negative edge clock data out of each device. SERIAL DATA SDA The SDA pin is bidirectional for serial data transfer. This pin is opendrain driven and may be wire-ORed with any number of other open-drain or open collector devices. DEVICE/ADDRESSES A1, A0 The A1 and A0 pins are device address inputs that are hardwired or left not connected for hardware compatibility with other AT24CXX devices. When the pins are hardwired, as many as four 128K/256K devices may be addressed on a single bus system device addressing is discussed in detail under the Device Addressing section . If the pins are left floating, the A1 and A0 pins will be internally pulled down to GND if the capacitive coupling to the circuit board VCC plane is <3 pF. If coupling is >3 pF, Atmel recommends connecting the address pins to GND. WRITE PROTECT WP The write protect input, when connected to GND, allows normal write operations. When WP is connected high to VCC, all write operations to the memory are inhibited. If the pin is left floating, the WP pin will be internally pulled down to GND if the capacitive coupling to the circuit board VCC plane is <3 pF. If coupling is >3 pF, Atmel recommends connecting the pin to GND. AT24C128/256, 128K/256K SERIAL EEPROM The 128K/256K is internally organized as 256/512 pages of 64-bytes each. Random word addressing requires a 14/15-bit data word address. AT24C128 Ordering Information Ordering Code Package Operation Range AT24C128-10PI-2.7 AT24C128N-10SI-2.7 AT24C128W-10SI-2.7 AT24C128U2-10UI-2.7 AT24C128Y1-10YI-2.7 AT24C128-10TI-2.7 8P3 8S1 8S2 8U2-1 8Y1 8A2 Industrial Temperature -40°C to 85°C AT24C128-10PI-1.8 AT24C128N-10SI-1.8 AT24C128W-10SI-1.8 AT24C128U2-10UI-1.8 AT24C128Y1-10YI-1.8 8P3 8S1 8S2 8U2-1 8Y1 Industrial Temperature -40°C to 85°C AT24C128-10TI-1.8 AT24C128N-10SE-2.7 High Grade/ Extended Temperature 8S1 -40°C to 125°C AT24C128N-10SU-2.7 AT24C128N-10SU-1.8 AT24C128-10TU-2.7 AT24C128-10TU-1.8 Lead-free/Halogen-free/ Industrial Temperature -40°C to 85°C Note For 2.7V devices used in the 4.5V to 5.5V range, please refer to performance values in the AC and DC characteristics tables. 8P3 8S1 8S2 8U2-1 8Y1 8A2 Package Type 8-lead, Wide, Plastic Dual Inline Package PDIP 8-lead, Wide, Plastic Gull Wing Small Outline Package JEDEC SOIC 8-lead, Wide, Plastic Gull Wing Small Outline Package EIAJ SOIC 8-ball, die Ball Grid Array Package dBGA2 8-lead, mm x mm Body, Dual Footprint, Non-leaded, Miniature Array Package MAP 8-lead, Wide, Thin Shrink Small Outline Package TSSOP Options Low-voltage 2.7V to 5.5V Low-voltage 1.8V to 3.6V AT24C256 Ordering Information Ordering Code Package Operation Range AT24C256-10PI-2.7 AT24C256N-10SI-2.7 AT24C256W-10SI-2.7 AT24C256U2-10UI-2.7 AT24C256-10TI-2.7 8P3 8S1 8S2 8U2-1 8A2 Industrial Temperature -40°C to 85°C AT24C256-10PI-1.8 AT24C256N-10SI-1.8 AT24C256W-10SI-1.8 AT24C256U2-10UI-1.8 AT24C256-10TI-1.8 8P3 8S1 8S2 8U2-1 8A2 Industrial Temperature -40°C to 85°C AT24C256N-10SE-2.7 High Grade/ Extended Temperature 8S1 -40°C to 125°C AT24C256N-10SU-2.7 AT24C256N-10SU-1.8 AT24C256-10TU-2.7 AT24C256-10TU-1.8 8S1 Lead-free/Halogen-free/ 8S1 Industrial Temperature 8A2 -40°C to 85°C Note For 2.7V devices used in the 4.5V to 5.5V range, please refer to performance values in the AC and DC characteristics tables. 8P3 8S1 8S2 8U2-1 8A2 Package Type 8-lead, Wide, Plastic Dual Inline Package PDIP 8-lead, Wide, Plastic Gull Wing Small Outline Package JEDEC SOIC 8-lead, Wide, Plastic Gull Wing Small Outline Package EIAJ SOIC 8-ball, die Ball Grid Array Package dBGA2 8-lead, Wide, Thin Shrink Small Outline Package TSSOP Options Low-voltage 2.7V to 5.5V Low-voltage 1.8V to 3.6V 14 AT24C128/256 Packaging Information 8P3 PDIP AT24C128/256 Top View End View 4 PLCS Side View COMMON DIMENSIONS Unit of Measure = inches SYMBOL A A2 b b2 b3 c D D1 E E1 e eA L MIN NOM MAX NOTE 2 This drawing is for general information only refer to JEDEC Drawing MS-001, Variation BA for additional information. Dimensions A and L are measured with the package seated in JEDEC seating plane Gauge GS-3. D, D1 and E1 dimensions do not include mold Flash or protrusions. Mold Flash or protrusions shall not exceed inch. E and eA measured with the leads constrained to be perpendicular to datum. Pointed or rounded lead tips are preferred to ease insertion. b2 and b3 maximum dimensions do not include Dambar protrusions. Dambar protrusions shall not exceed mm . 01/09/02 2325 Orchard Parkway R San Jose, CA 95131 TITLE 8P3, 8-lead, Wide Body, Plastic Dual In-line Package PDIP 8S1 JEDEC SOIC Top View Side View End View COMMON DIMENSIONS Unit of Measure = mm

PDF Datasheet Preview

• Low-voltage and Standard-voltage Operation VCC = 2.7V to 5.5V VCC = 1.8V to 3.6V
• Internally Organized 16,384 x 8 and 32,768 x 8
• 2-wire Serial Interface
• Schmitt Trigger, Filtered Inputs for Noise Suppression
• Bidirectional Data Transfer Protocol
• 1 MHz 5V , 400 kHz 2.7V, 2.5V and 100 kHz 1.8V Compatibility
• Write Protect Pin for Hardware and Software Data Protection
• 64-byte Page Write Mode Partial Page Writes Allowed
• Self-timed Write Cycle 5 ms Max
• High Reliability

Endurance One Million Write Cycles Data Retention 40 Years
• Extended Temperature and Lead-free/Halogen-free Devices Available
• 8-lead JEDEC PDIP, 8-lead JEDEC and EIAJ SOIC, 8-lead MAP, 8-lead TSSOP and 8-ball dBGA2TM Packages

The AT24C128/256 provides 131,072/262,144 bits of serial electrically erasable and programmable read only memory EEPROM organized as 16,384/32,768 words of 8 bits each. The device’s cascadable feature allows up to 4 devices to share a common 2-wire bus. The device is optimized for use in many industrial and commercial applications where low power and low voltage operation are essential. The devices are available in space-saving 8-lead JEDEC PDIP, 8-lead JEDEC SOIC, 8-lead EIAJ SOIC, 8-lead MAP 24C128 , 8-lead TSSOP and 8-ball dBGA2 packages. In addition, the entire family is available in 2.7V 2.7V to 5.5V and 1.8V 1.8V to 3.6V versions.
2-wire Serial EEPROMs
128K 16,384 x 8 256K 32,768 x 8

AT24C128 AT24C256

Pin Configurations

Pin Name A0 - A1 SDA SCL WP NC GND

Function Address Inputs Serial Data Serial Clock Input Write Protect No Connect Ground
8-lead PDIP

A0 1 A1 2 NC 3 GND 4
8 VCC 7 WP 6 SCL 5 SDA
8-lead SOIC

A0 1 A1 2 NC 3 GND 4
8 VCC 7 WP 6 SCL 5 SDA
8-ball dBGA2

VCC 8 WP 7 SCL 6 SDA 5
1 A0 2 A1 3 NC 4 GND

Bottom View
8-lead TSSOP

A0 1 A1 2 NC 3 GND 4
8 VCC 7 WP 6 SCL 5 SDA
8-lead MAP

VCC 8 WP 7 SCL 6 SDA 5
1 A0 2 A1 3 NC 4 GND

Bottom View

Absolute Maximum Ratings*

Operating -55°C to +125°C Storage Temperature -65°C to +150°C Voltage on Any Pin with Respect to Ground to +7.0V Maximum Operating Voltage 6.25V DC Output mA

Block Diagram
*NOTICE:

Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.
2 AT24C128/256

AT24C128/256

Pin Description

Memory Organization

SERIAL CLOCK SCL The SCL input is used to positive edge clock data into each EEPROM device and negative edge clock data out of each device.

SERIAL DATA SDA The SDA pin is bidirectional for serial data transfer. This pin is opendrain driven and may be wire-ORed with any number of other open-drain or open collector devices.

DEVICE/ADDRESSES A1, A0 The A1 and A0 pins are device address inputs that are hardwired or left not connected for hardware compatibility with other AT24CXX devices. When the pins are hardwired, as many as four 128K/256K devices may be addressed on a single bus system device addressing is discussed in detail under the Device Addressing section . If the pins are left floating, the A1 and A0 pins will be internally pulled down to GND if the capacitive coupling to the circuit board VCC plane is <3 pF. If coupling is >3 pF, Atmel recommends connecting the address pins to GND.

WRITE PROTECT WP The write protect input, when connected to GND, allows normal write operations. When WP is connected high to VCC, all write operations to the memory are inhibited. If the pin is left floating, the WP pin will be internally pulled down to GND if the capacitive coupling to the circuit board VCC plane is <3 pF. If coupling is >3 pF, Atmel recommends connecting the pin to GND.

AT24C128/256, 128K/256K SERIAL EEPROM The 128K/256K is internally organized as 256/512 pages of 64-bytes each. Random word addressing requires a 14/15-bit data word address.
AT24C128 Ordering Information
Ordering Code

Package

Operation Range

AT24C128-10PI-2.7 AT24C128N-10SI-2.7 AT24C128W-10SI-2.7 AT24C128U2-10UI-2.7 AT24C128Y1-10YI-2.7 AT24C128-10TI-2.7
8P3 8S1 8S2 8U2-1 8Y1 8A2

Industrial Temperature -40°C to 85°C

AT24C128-10PI-1.8 AT24C128N-10SI-1.8 AT24C128W-10SI-1.8 AT24C128U2-10UI-1.8 AT24C128Y1-10YI-1.8
8P3 8S1 8S2 8U2-1 8Y1

Industrial Temperature -40°C to 85°C

AT24C128-10TI-1.8

AT24C128N-10SE-2.7

High Grade/ Extended Temperature 8S1
-40°C to 125°C

AT24C128N-10SU-2.7 AT24C128N-10SU-1.8 AT24C128-10TU-2.7 AT24C128-10TU-1.8

Lead-free/Halogen-free/ Industrial Temperature
-40°C to 85°C

Note For 2.7V devices used in the 4.5V to 5.5V range, please refer to performance values in the AC and DC characteristics tables.
8P3 8S1 8S2 8U2-1 8Y1 8A2

Package Type 8-lead, Wide, Plastic Dual Inline Package PDIP 8-lead, Wide, Plastic Gull Wing Small Outline Package JEDEC SOIC 8-lead, Wide, Plastic Gull Wing Small Outline Package EIAJ SOIC 8-ball, die Ball Grid Array Package dBGA2 8-lead, mm x mm Body, Dual Footprint, Non-leaded, Miniature Array Package MAP 8-lead, Wide, Thin Shrink Small Outline Package TSSOP

Options Low-voltage 2.7V to 5.5V Low-voltage 1.8V to 3.6V
AT24C256 Ordering Information
Ordering Code

Package

Operation Range

AT24C256-10PI-2.7 AT24C256N-10SI-2.7 AT24C256W-10SI-2.7 AT24C256U2-10UI-2.7 AT24C256-10TI-2.7
8P3 8S1 8S2 8U2-1 8A2

Industrial Temperature -40°C to 85°C

AT24C256-10PI-1.8 AT24C256N-10SI-1.8 AT24C256W-10SI-1.8 AT24C256U2-10UI-1.8 AT24C256-10TI-1.8
8P3 8S1 8S2 8U2-1 8A2

Industrial Temperature -40°C to 85°C

AT24C256N-10SE-2.7

High Grade/ Extended Temperature 8S1
-40°C to 125°C

AT24C256N-10SU-2.7 AT24C256N-10SU-1.8 AT24C256-10TU-2.7 AT24C256-10TU-1.8
8S1 Lead-free/Halogen-free/
8S1 Industrial Temperature
8A2 -40°C to 85°C

Note For 2.7V devices used in the 4.5V to 5.5V range, please refer to performance values in the AC and DC characteristics tables.
8P3 8S1 8S2 8U2-1 8A2

Package Type 8-lead, Wide, Plastic Dual Inline Package PDIP 8-lead, Wide, Plastic Gull Wing Small Outline Package JEDEC SOIC 8-lead, Wide, Plastic Gull Wing Small Outline Package EIAJ SOIC 8-ball, die Ball Grid Array Package dBGA2 8-lead, Wide, Thin Shrink Small Outline Package TSSOP

Options Low-voltage 2.7V to 5.5V Low-voltage 1.8V to 3.6V
14 AT24C128/256

Packaging Information
8P3 PDIP

AT24C128/256

Top View

End View
4 PLCS

Side View

COMMON DIMENSIONS Unit of Measure = inches

SYMBOL A A2 b b2 b3 c D D1 E E1 e eA L

MIN NOM MAX

NOTE 2

This drawing is for general information only refer to JEDEC Drawing MS-001, Variation BA for additional information. Dimensions A and L are measured with the package seated in JEDEC seating plane Gauge GS-3. D, D1 and E1 dimensions do not include mold Flash or protrusions. Mold Flash or protrusions shall not exceed inch. E and eA measured with the leads constrained to be perpendicular to datum. Pointed or rounded lead tips are preferred to ease insertion. b2 and b3 maximum dimensions do not include Dambar protrusions. Dambar protrusions shall not exceed mm .
01/09/02
2325 Orchard Parkway R San Jose, CA 95131

TITLE 8P3, 8-lead, Wide Body, Plastic Dual In-line Package PDIP
8S1 JEDEC SOIC

Top View

Side View

End View

COMMON DIMENSIONS Unit of Measure = mm

Notice: we do not provide any warranties that information, datasheets, application notes, circuit diagrams, or software stored on this website are up-to-date or error free. The archived AT24C256W-10SI-2.7 Datasheet file may be downloaded here without warranties.

Datasheet ID: AT24C256W-10SI-2.7 518881