AT49BV160D AT49BV160DT
Part | Datasheet |
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AT49BV160DT-70TU (pdf) |
Related Parts | Information |
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AT49BV160DT-70CU-T |
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AT49BV160D-70TU-T |
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AT49BV160DT-70TU-T |
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AT49BV160D-70TU |
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AT49BV160DT-70CU |
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• Single Voltage Read/Write Operation 2.65V to 3.6V • Access Time 70 ns • Sector Erase Architecture Thirty-one 32K Word 64K Bytes Sectors with Individual Write Lockout Eight 4K Word 8K Bytes Sectors with Individual Write Lockout • Fast Word Program Time 10 µs • Fast Sector Erase Time 100 ms • Suspend/Resume Feature for Erase and Program Supports Reading and Programming from Any Sector by Suspending Erase of a Different Sector Supports Reading Any Word by Suspending Programming of Any Other Word • Low-power Operation 10 mA Active 15 µA Standby • VPP Pin for Write Protection and Accelerated Program Operation • WP Pin for Sector Protection • RESET Input for Device Initialization • Flexible Sector Protection • TSOP and CBGA Package Options • Top or Bottom Boot Block Configuration Available • 128-bit Protection Register • Minimum 100,000 Erase Cycles • Common Flash Interface CFI • Green Pb/Halide-free Packaging 16-megabit 1M x 16 3-volt Only Flash Memory AT49BV160D AT49BV160DT The AT49BV160D T is a 2.7-volt 16-megabit Flash memory organized as 1,048,576 words of 16 bits each. The memory is divided into 39 sectors for erase operations. The device is offered in a 48-lead TSOP and a 46-ball CBGA package. The device has CE and OE control signals to avoid any bus contention. This device can be read or reprogrammed using a single power supply, making it ideally suited for in-system programming. The device powers on in the read mode. Command sequences are used to place the device in other operation modes such as program and erase. The device has the capability to protect the data in any sector see “Flexible Sector Protection” on page To increase the flexibility of the device, it contains an Erase Suspend and Program Suspend feature. This feature will put the erase or program on hold for any amount of time and let the user read data from or program data to any of the remaining sectors within the memory. The VPP pin provides data protection. When the VPP input is below 0.4V, the program and erase functions are inhibited. When VPP is at 1.65V or above, normal program and erase operations can be performed. With VPP at 10.0V, the program Dual-word Program Command operation is accelerated. Pin Configurations Pin Name A0 - A19 CE OE WE RESET VPP I/O0 - I/O15 NC VCCQ WP TSOP Top View Type 1 CBGA Top View Ball Down Function Addresses Chip Enable Output Enable Write Enable Reset Write Protection Data Inputs/Outputs No Connect Output Power Supply Write Protect A15 1 A14 2 A13 3 A12 4 A11 5 A10 6 A9 7 A8 8 NC 9 NC 10 WE 11 RESET 12 VPP 13 WP 14 A19 15 A18 16 A17 17 A7 18 A6 19 A5 20 A4 21 A3 22 A2 23 A1 24 48 A16 47 VCCQ 46 GND 45 I/O15 44 I/O7 43 I/O14 42 I/O6 41 I/O13 40 I/O5 39 I/O12 38 I/O4 37 VCC 36 I/O11 35 I/O3 34 I/O10 33 I/O2 32 I/O9 31 I/O1 30 I/O8 29 I/O0 28 OE 27 GND 26 CE 25 A0 1 2 3 4 5 6 78 A13 A11 A8 VPP WP A19 A7 A4 A14 A10 WE RST A18 A17 A5 A2 A15 A12 A9 A6 A3 A1 A16 I/O14 I/O5 I/O11 I/O2 I/O8 CE A0 VCCQ I/O15 I/O6 I/O12 I/O3 I/O9 I/O0 GND GND I/O7 I/O13 I/O4 VCC I/O10 I/O1 OE 2 AT49BV160D T Block Diagram I/O0 - I/O15 AT49BV160D T OUTPUT BUFFER INPUT BUFFER A0 - A19 INPUT BUFFER ADDRESS LATCH Y-DECODER X-DECODER IDENTIFIER REGISTER STATUS REGISTER DATA COMPARATOR Y-GATING MAIN MEMORY OUTPUT MULTIPLEXER Ordering Information Green Package Pb/Halide-free tACC ICC mA Active Standby Ordering Code AT49BV160D-70TU AT49BV160DT-70CU AT49BV160DT-70TU Package 46C3 48T Operation Range Industrial -40° to 85° C 46C3 48T Package Type 46-ball, Plastic Chip-Size Ball Grid Array Package CBGA 48-lead, Plastic Thin Small Outline Package TSOP 26 AT49BV160D T Packaging Information 46C3 CBGA E A1 BALL ID AT49BV160D T TOP VIEW A B C D E F 8 7 6 5 4 3 21 b BOTTOM VIEW SIDE VIEW A1 BALL CORNER REF COMMON DIMENSIONS Unit of Measure = mm SYMBOL E E1 D D1 A A1 e b NOM TYP BSC TYP NOTE TITLE 2325 Orchard Parkway 46C3, 46-ball 8 x 6 Array ,0.75 mm Pitch, x mm R San Jose, CA 95131 Chip-scale Ball Grid Array Package CBGA 7/2/03 46C3 48T TSOP PIN 1 0º ~ 8º c Pin 1 Identifier SEATING PLANE GAGE PLANE This package conforms to JEDEC reference MO-142, Variation DD. Dimensions D1 and E do not include mold protrusion. Allowable protrusion on E is mm per side and on D1 is mm per side. Lead coplanarity is mm maximum. COMMON DIMENSIONS Unit of Measure = mm SYMBOL A A1 A2 D D1 E L L1 b c e MIN NOM MAX BASIC BASIC |
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