AT49BV8011-11CI

AT49BV8011-11CI Datasheet

The AT49BV/LV8011 T is a to 3.3-volt 8-megabit Flash memory organized as 524,288 words of 16 bits each or 1,048,576 bytes of 8 bits each. The x16 data appears on I/O0 - I/O15 the x8 data appears on I/O0 - I/O7. The memory is divided into 22 sectors for erase operations. The device is offered in 48-pin TSOP and 48-ball CBGA packages. The device has CE, and OE control signals to avoid any bus

Part	Datasheet
AT49BV8011-11CI	AT49BV8011-11CI (pdf)

PDF Datasheet Preview
• Single Supply for Read and Write 2.7V to 3.3V BV , 3.0V to 3.3V LV • Access Time 90 ns • Sector Erase Architecture Fourteen 32K Word 64K Byte Sectors with Individual Write Lockout Two 16K Word 32K Byte Sectors with Individual Write Lockout Two 8K Word 16K Byte Sectors with Individual Write Lockout Four 4K Word 8K Byte Sectors with Individual Write Lockout • Fast Word Program Time 20 µs • Fast Sector Erase Time 200 ms • Dual Plane Organization, Permitting Concurrent Read while Program/Erase Memory Plane A Four 4K Word, Two 8K Word and Two 16K Word Sectors Memory Plane B Fourteen 32K Word Sectors • Erase Suspend Capability Supports Reading/Programming Data from Any Sector by Suspending Erase of Any Different Sector • Low-power Operation 25 mA Active 10 µA Standby • Data Polling, Toggle Bit, Ready/Busy for End of Program Detection • Optional VPP Pin for Fast Programming • RESET Input for Device Initialization • Sector Program Unlock Command • TSOP and CBGA Package Options • Top or Bottom Boot Block Configuration Available The AT49BV/LV8011 T is a to 3.3-volt 8-megabit Flash memory organized as 524,288 words of 16 bits each or 1,048,576 bytes of 8 bits each. The x16 data appears on I/O0 - I/O15 the x8 data appears on I/O0 - I/O7. The memory is divided into 22 sectors for erase operations. The device is offered in 48-pin TSOP and 48-ball CBGA packages. The device has CE, and OE control signals to avoid any bus Pin Configurations continued Pin Name A0 - A18 CE OE WE RESET RDY/BUSY I/O0 - I/O14 I/O15 A-1 BYTE NC VCCQ Function Addresses Chip Enable Output Enable Write Enable Reset READY/BUSY Output Optional Power Supply for Faster Program/Erase Operations Data Inputs/Outputs I/O15 Data Input/Output, Word Mode A-1 LSB Address Input, Byte Mode Selects Byte or Word Mode No Connect Output Power Supply 8-megabit 512K x 16/1M x 8 3-volt Only Flash Memory AT49BV8011 AT49BV8011T AT49LV8011 AT49LV8011T TSOP Top View Type 1 A15 1 A14 2 A13 3 A12 4 A11 5 A10 6 A9 7 A8 8 NC 9 NC 10 WE 11 RESET 12 VPP 13 NC 14 RDY/BUSY 15 A18 16 A17 17 A7 18 A6 19 A5 20 A4 21 A3 22 A2 23 A1 24 48 A16 47 BYTE 46 GND 45 I/O15/A-1 44 I/O7 43 I/O14 42 I/O6 41 I/O13 40 I/O5 39 I/O12 38 I/O4 37 VCC 36 I/O11 35 I/O3 34 I/O10 33 I/O2 32 I/O9 31 I/O1 30 I/O8 29 I/O0 28 OE 27 GND 26 CE 25 A0 CBGA Top View 123456 A3 A7 RDY/BUSY WE A9 A13 A4 A17 NC RESET A8 A12 A2 A6 A18 VPP A10 A14 A1 A5 NC A11 A15 A0 I/O0 I/O2 I/O5 I/O7 A16 CE I/O8 I/O10 I/O12 I/O14 BYTE OE I/O9 I/O11 VCC I/O13 I/O15 /A-1 VSS I/O1 I/O3 I/O4 I/O6 VSS contention. This device can be read or reprogrammed using a single 2.7V power supply, making it ideally suited for in-system programming. The device powers on in the read mode. Command sequences are used to place the device in other operation modes such as Program and Erase. The device has the capability to protect the data in any sector. Once the data protection for a given sector is enabled, the data in that sector cannot be changed using input levels between ground and VCC. The device is segmented into two memory planes. Reads from memory plane B may be performed even while program or erase functions are being executed in memory plane A and vice versa. This operation allows improved system performance by not requiring the system to wait for a program or erase operation to complete before a read is performed. To further increase the flexibility of the device, it contains an Erase Suspend feature. This feature will put the Erase on hold for any amount of time and let the user read data from or program data to any of the remaining sectors within the same memory plane. There is no reason to suspend the erase operation if the data to be read is in the other memory plane. The end of a program or an Erase cycle is detected by the Ready/Busy pin, Data polling, or by the toggle bit. A VPP pin is provided to improve program/erase times. This pin can be tied to VCC. To take advantage of faster programming and erasing, the pin should supply to volts during program and erase operations. A 6-byte command bypass unlock sequence to remove the requirement of entering the 3-byte program sequence is offered to further improve programming time. After entering the 6-byte code, only single pulses on the write control lines are required for writing into the device. This mode single-pulse byte/word program is exited by powering down the device, or by pulsing the RESET pin low for a minimum of 50 ns and then bringing it back to VCC. Erase and Erase Suspend/Resume commands will not work while in this mode if entered they will result in data being programmed into the device. It is not recommended that the 6-byte code reside in the software of the final product but only exist in external programming code. The BYTE pin controls whether the device data I/O pins operate in the byte or word configuration. If the BYTE pin is set at logic “1”, the device is in word configuration, I/O0 - I/O15 are active and controlled by CE and OE. If the BYTE pin is set at logic “0”, the device is in byte configuration, and only data I/O pins I/O0 - I/O7 are active and controlled by CE and OE. The data I/O pins I/O8 - I/O14 are tri-stated, and the I/O15 pin is used as an input for the LSB A-1 address function. AT49BV/LV8011 T Block Diagram I/O0 - I/O15/A-1 AT49BV/LV8011 T OUTPUT BUFFER INPUT BUFFER A0 - A18 AT49BV/LV8011 T Ordering Information tACC ICC mA Active Standby Ordering Code AT49LV8011-90CC AT49LV8011-90TC AT49LV8011-90CI AT49LV8011-90TI AT49BV8011-12CC AT49BV8011-12TC AT49BV8011-12CI AT49BV8011-12TI AT49LV8011T-90CC AT49LV8011T-90TC AT49LV8011T-90CI AT49LV8011T-90TI AT49BV8011T-12CC AT49BV8011T-12TC AT49BV8011T-12CI AT49BV8011T-12TI Package 48C3 48T 48C3 48T 48C3 48T 48C3 48T 48C3 48T 48C3 48T 48C3 48T 48C3 48T Operation Range Commercial 0° to 70°C Industrial -40° to 85°C Commercial 0° to 70°C Industrial -40° to 85°C Commercial 0° to 70°C Industrial -40° to 85°C Commercial 0° to 70°C Industrial -40° to 85°C 48C3 48T Package Type 48-ball, Plastic Chip-size Ball Grid Array Package CBGA 48-lead, Thin Small Outline Package TSOP AT49BV/LV8011 T Packaging Information 48C3, 48-ball, Plastic Chip-size Ball Grid Array Package CBGA Dimensions in Millimeters and Inches * 65 4 3 21 A B C D E F G H BSC NON-ACCUMULATIVE DIA BALL TYP Controlling dimension millimeters 48T, 48-lead, Plastic Thin Small Outline Package TSOP Dimensions in Millimeters and Inches JEDEC OUTLINE MO-142 DD *Controlling dimension millimeters AT49BV/LV8011 T Atmel Headquarters Corporate Headquarters 2325 Orchard Parkway San Jose, CA 95131 TEL 408 441-0311 FAX 408 487-2600 Europe Atmel U.K., Ltd. Coliseum Business Centre Riverside Way Camberley, Surrey GU15 3YL England TEL 44 1276-686-677 FAX 44 1276-686-697 Asia Atmel Asia, Ltd. Room 1219 Chinachem Golden Plaza 77 Mody Road Tsimhatsui East Kowloon Hong Kong TEL 852 2721-9778 FAX 852 2722-1369 Japan Atmel Japan K.K. 9F, Tonetsu Shinkawa Bldg. 1-24-8 Shinkawa Chuo-ku, Tokyo 104-0033 Japan TEL 81 3-3523-3551 FAX 81 3-3523-7581 Atmel Operations Atmel Colorado Springs 1150 E. Cheyenne Mtn. Blvd. Colorado Springs, CO 80906 TEL 719 576-3300 FAX 719 540-1759 Atmel Rousset Zone Industrielle 13106 Rousset Cedex France TEL 33 4-4253-6000 FAX 33 4-4253-6001 Fax-on-Demand North America 1- 800 292-8635 International 1- 408 441-0732 e-mail Web Site BBS 1- 408 436-4309 Atmel Corporation Atmel Corporation makes no warranty for the use of its products, other than those expressly contained in the Company’s standard warranty which is detailed in Atmel’s Terms and Conditions located on the Company’s web site. The Company assumes no responsibility for any errors which may appear in this document, reserves the right to change devices or specifications detailed herein at any time without notice, and does not make any commitment to update the information contained herein. No licenses to patents or other intellectual property of Atmel are granted by the Company in connection with the sale of Atmel products, expressly or by implication. Atmel’s products are not authorized for use as critical components in life support devices or systems. Marks bearing and/or are registered trademarks and trademarks of Atmel Corporation. Terms and product names in this document may be trademarks of others. Printed on recycled paper.

PDF Datasheet Preview

• Single Supply for Read and Write 2.7V to 3.3V BV , 3.0V to 3.3V LV
• Access Time 90 ns
• Sector Erase Architecture

Fourteen 32K Word 64K Byte Sectors with Individual Write Lockout Two 16K Word 32K Byte Sectors with Individual Write Lockout Two 8K Word 16K Byte Sectors with Individual Write Lockout Four 4K Word 8K Byte Sectors with Individual Write Lockout
• Fast Word Program Time 20 µs
• Fast Sector Erase Time 200 ms
• Dual Plane Organization, Permitting Concurrent Read while Program/Erase Memory Plane A Four 4K Word, Two 8K Word and Two 16K Word Sectors Memory Plane B Fourteen 32K Word Sectors
• Erase Suspend Capability Supports Reading/Programming Data from Any Sector by Suspending Erase of Any Different Sector
• Low-power Operation 25 mA Active 10 µA Standby
• Data Polling, Toggle Bit, Ready/Busy for End of Program Detection
• Optional VPP Pin for Fast Programming
• RESET Input for Device Initialization
• Sector Program Unlock Command
• TSOP and CBGA Package Options
• Top or Bottom Boot Block Configuration Available

The AT49BV/LV8011 T is a to 3.3-volt 8-megabit Flash memory organized as 524,288 words of 16 bits each or 1,048,576 bytes of 8 bits each. The x16 data appears on I/O0 - I/O15 the x8 data appears on I/O0 - I/O7. The memory is divided into 22 sectors for erase operations. The device is offered in 48-pin TSOP and 48-ball CBGA packages. The device has CE, and OE control signals to avoid any bus

Pin Configurations
continued

Pin Name

A0 - A18 CE OE WE RESET RDY/BUSY

I/O0 - I/O14

I/O15 A-1

BYTE NC VCCQ

Function

Addresses Chip Enable Output Enable Write Enable Reset READY/BUSY Output Optional Power Supply for Faster Program/Erase Operations Data Inputs/Outputs I/O15 Data Input/Output, Word Mode A-1 LSB Address Input, Byte Mode Selects Byte or Word Mode No Connect Output Power Supply
8-megabit 512K x 16/1M x 8 3-volt Only Flash Memory AT49BV8011 AT49BV8011T AT49LV8011 AT49LV8011T

TSOP Top View Type 1

A15 1 A14 2 A13 3 A12 4 A11 5 A10 6

A9 7 A8 8 NC 9 NC 10 WE 11 RESET 12 VPP 13 NC 14 RDY/BUSY 15 A18 16 A17 17 A7 18 A6 19 A5 20 A4 21 A3 22 A2 23 A1 24
48 A16 47 BYTE 46 GND 45 I/O15/A-1 44 I/O7 43 I/O14 42 I/O6 41 I/O13 40 I/O5 39 I/O12 38 I/O4 37 VCC 36 I/O11 35 I/O3 34 I/O10 33 I/O2 32 I/O9 31 I/O1 30 I/O8 29 I/O0 28 OE 27 GND 26 CE 25 A0

CBGA Top View
123456

A3 A7 RDY/BUSY WE A9 A13

A4 A17 NC RESET A8 A12

A2 A6 A18 VPP A10 A14

A1 A5 NC A11 A15

A0 I/O0 I/O2 I/O5 I/O7 A16

CE I/O8 I/O10 I/O12 I/O14 BYTE

OE I/O9 I/O11 VCC I/O13 I/O15 /A-1

VSS I/O1 I/O3 I/O4 I/O6 VSS
contention. This device can be read or reprogrammed using a single 2.7V power supply, making it ideally suited for in-system programming.

The device powers on in the read mode. Command sequences are used to place the device in other operation modes such as Program and Erase. The device has the capability to protect the data in any sector. Once the data protection for a given sector is enabled, the data in that sector cannot be changed using input levels between ground and VCC.

The device is segmented into two memory planes. Reads from memory plane B may be performed even while program or erase functions are being executed in memory plane A and vice versa. This operation allows improved system performance by not requiring the system to wait for a program or erase operation to complete before a read is performed. To further increase the flexibility of the device, it contains an Erase Suspend feature. This feature will put the Erase on hold for any amount of time and let the user read data from or program data to any of the remaining sectors within the same memory plane. There is no reason to suspend the erase operation if the data to be read is in the other memory plane. The end of a program or an Erase cycle is detected by the Ready/Busy pin, Data polling, or by the toggle bit.

A VPP pin is provided to improve program/erase times. This pin can be tied to VCC. To take advantage of faster programming and erasing, the pin should supply to volts during program and erase operations.

A 6-byte command bypass unlock sequence to remove the requirement of entering the 3-byte program sequence is offered to further improve programming time. After entering the 6-byte code, only single pulses on the write control lines are required for writing into the device. This mode single-pulse byte/word program is exited by powering down the device, or by pulsing the RESET pin low for a minimum of 50 ns and then bringing it back to VCC. Erase and Erase Suspend/Resume commands will not work while in this mode if entered they will result in data being programmed into the device. It is not recommended that the 6-byte code reside in the software of the final product but only exist in external programming code.

The BYTE pin controls whether the device data I/O pins operate in the byte or word configuration. If the BYTE pin is set at logic “1”, the device is in word configuration, I/O0 - I/O15 are active and controlled by CE and OE.

If the BYTE pin is set at logic “0”, the device is in byte configuration, and only data I/O pins I/O0 - I/O7 are active and controlled by CE and OE. The data I/O pins I/O8 - I/O14 are tri-stated, and the I/O15 pin is used as an input for the LSB A-1 address function.

AT49BV/LV8011 T

Block Diagram

I/O0 - I/O15/A-1

AT49BV/LV8011 T

OUTPUT BUFFER

INPUT BUFFER

A0 - A18
AT49BV/LV8011 T Ordering Information
tACC

ICC mA

Active

Standby
Ordering Code AT49LV8011-90CC AT49LV8011-90TC AT49LV8011-90CI AT49LV8011-90TI AT49BV8011-12CC AT49BV8011-12TC AT49BV8011-12CI AT49BV8011-12TI AT49LV8011T-90CC AT49LV8011T-90TC AT49LV8011T-90CI AT49LV8011T-90TI AT49BV8011T-12CC AT49BV8011T-12TC AT49BV8011T-12CI AT49BV8011T-12TI

Package 48C3 48T 48C3 48T 48C3 48T 48C3 48T 48C3 48T 48C3 48T 48C3 48T 48C3 48T

Operation Range Commercial 0° to 70°C Industrial -40° to 85°C Commercial 0° to 70°C Industrial -40° to 85°C Commercial 0° to 70°C Industrial -40° to 85°C Commercial 0° to 70°C Industrial -40° to 85°C
48C3 48T

Package Type 48-ball, Plastic Chip-size Ball Grid Array Package CBGA 48-lead, Thin Small Outline Package TSOP

AT49BV/LV8011 T

Packaging Information
48C3, 48-ball, Plastic Chip-size Ball Grid Array Package CBGA Dimensions in Millimeters and Inches *
65 4 3 21

A B C D E F G H

BSC NON-ACCUMULATIVE

DIA BALL TYP
*Controlling dimension millimeters
48T, 48-lead, Plastic Thin Small Outline Package TSOP Dimensions in Millimeters and Inches *

JEDEC OUTLINE MO-142 DD
*Controlling dimension millimeters

AT49BV/LV8011 T

Atmel Headquarters

Corporate Headquarters 2325 Orchard Parkway San Jose, CA 95131 TEL 408 441-0311 FAX 408 487-2600

Europe Atmel U.K., Ltd. Coliseum Business Centre Riverside Way Camberley, Surrey GU15 3YL England TEL 44 1276-686-677 FAX 44 1276-686-697

Asia Atmel Asia, Ltd. Room 1219 Chinachem Golden Plaza 77 Mody Road Tsimhatsui East Kowloon Hong Kong TEL 852 2721-9778 FAX 852 2722-1369

Japan Atmel Japan K.K. 9F, Tonetsu Shinkawa Bldg. 1-24-8 Shinkawa Chuo-ku, Tokyo 104-0033 Japan TEL 81 3-3523-3551 FAX 81 3-3523-7581

Atmel Operations

Atmel Colorado Springs 1150 E. Cheyenne Mtn. Blvd. Colorado Springs, CO 80906 TEL 719 576-3300 FAX 719 540-1759

Atmel Rousset Zone Industrielle 13106 Rousset Cedex France TEL 33 4-4253-6000 FAX 33 4-4253-6001

Fax-on-Demand North America 1- 800 292-8635 International 1- 408 441-0732
e-mail

Web Site

BBS 1- 408 436-4309

Atmel Corporation Atmel Corporation makes no warranty for the use of its products, other than those expressly contained in the Company’s standard warranty which is detailed in Atmel’s Terms and Conditions located on the Company’s web site. The Company assumes no responsibility for any errors which may appear in this document, reserves the right to change devices or specifications detailed herein at any time without notice, and does not make any commitment to update the information contained herein. No licenses to patents or other intellectual property of Atmel are granted by the Company in connection with the sale of Atmel products, expressly or by implication. Atmel’s products are not authorized for use as critical components in life support devices or systems.

Marks bearing and/or are registered trademarks and trademarks of Atmel Corporation. Terms and product names in this document may be trademarks of others.

Printed on recycled paper.

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Datasheet ID: AT49BV8011-11CI 518650