STDP4320BA
STDP4320BA Datasheet
STDP4320 DisplayPort 1.2a splitter
| Part | Datasheet |
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STDP4320BA |
STDP4320BA (pdf) |
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| STDP4320 DisplayPort 1.2a splitter Datasheet MegaChips’ Proprietary Information MegaChips reserves the right to make any change herein at any time without prior notice. MegaChips does not assume any responsibility or liability arising out of application or use of any product or service described herein except as explicitly agreed upon. MegaChips’ Proprietary Information Page 1 of 39 STDP4320 • dual mode receiver DP 1.2a compliant Link rate HBR2/HBR/RBR SST or MST up to eight streams 1, 2, or 4 lanes AUX CH 1 Mbps HPD out HDMI/DVI operation Gbps link rate Functions as eDP and MyDP receiver • DisplayPort dual mode transmitters Two transmitter ports DP 1.2a compliant Link rate HBR2/HBR/RBR SST or MST up to eight streams 1, 2, or 4 lanes AUX CH 1 Mbps HPD in HDMI/DVI operation Gbps link rate with external level translator Functions as eDP transmitter • SPDIF audio output Two SPDIF port pins 192 kHz/24 bits Compressed/LPCM • Conversion from DP SST to TMDS format and vice versa • HDCP repeater with embedded keys • AUX to I2C bridge for EDID/MCCS pass through Maps on DDC ports • Device configuration options SPI Flash I2C host interface • Deep color support RGB/YCC 4:4:4 16-bit color YCC 4:2:2 16-bit color • Spread spectrum on DisplayPort interface for EMI reduction • Bandwidth Video resolution up to 4K2K 60 Hz Audio Ch up to 192 kHz sample rate • Low power operation Standby 30 mW • Package 172 LFBGA 12 x 12 mm • Power supply voltages V I/O V core • Audio-video router for PC/notebooks, docking stations, hub, 4K2K TVs, daisy chain monitors, digital signage I2C SLAVE DP1.2 / HDMI INPUT HDMI DDC IN OCM DP++ RX HDCP GPIO / MFP AUDIO PROC VIDEO PROC CLOCK GEN DP++ TX DP++ TX I2C MASTER 27MHz DP1.2 / HDMI OUTPUT DP1.2 / HDMI OUTPUT SPDIF OUT HDMI DDC OUT C4320-DAT-01p MegaChips’ Proprietary Information Page 2 of 39 Contents STDP4320 Description 7 Application overview 9 Feature attributes 10 Input interface 10 Output interface Supported video timings Supported audio timings Control channel interfaces HDCP support 12 Ordering information 37 C4320-DAT-01p MegaChips’ Proprietary Information Page 4 of 39 List of Tables STDP4320 Table C4320-DAT-01p MegaChips’ Proprietary Information Page 5 of 39 List of Figures STDP4320 Figure STDP4320 in video hub application 9 STDP4320 in 4K2K TV application 9 STDP4320 BGA diagram 13 Package drawing 25 Package dimensions. 26 Marking template 27 HDMI and DVI receiver AC characteristics 33 I2C timing 35 SPI input timing. 36 SPI output timing 36 C4320-DAT-01p MegaChips’ Proprietary Information Page 6 of 39 STDP4320 The STDP4320 is a high-speed DisplayPort dual mode splitter IC targeted for audio-video demultiplexing and routing in applications such as notebooks, docking stations, video hub, 4K2K TVs, daisy chainable monitors, digital signage, etc. It consists of one dual mode input port and two dual mode output ports configurable as either DisplayPort or HDMI/DVI. STDP4320 is a VESA DP Standard Ver. 1.2a compliant device that supports advanced features such as MST, HBR2, 3D formats and GTC assist. Designs based on STDP4320 have the flexibility to offer either DP or HDMI/DVI connectors on its end product to interface with legacy and new generation video sources and sinks. In addition, STDP4320based products with a DisplayPort output connector are DP++ compliant and work with any HDMI or single link DVI sink through a passive level translator dongle . The STDP4320 uses MegaChips’ latest generation DisplayPort dual mode receiver and transmitter technology that supports both DisplayPort and TMDS signal formats. This device receives MST format up to eight audio-video streams, which can be further routed on either of the two outputs in any combination of eight streams depending on the capability of downstream sinks. This device can also replicate the incoming video streams on both output ports simultaneously, thus allowing cloning on two downstream sinks. For example, a 4K2K 60 Hz video input is replicated on two output ports simultaneously. The DisplayPort receiver and transmitters support HBR2 speed, a data rate of Gbps per lane with a total bandwidth of Gbps link rate. In HDMI mode, this device supports link rates up to Gbps corresponding to a pixel rate of 300 MHz, adequate for supporting video resolution up to FHD 120 Hz with all 3D formats. The device is also capable of delivering deep color video up to 16-bits per color. The STDP4320 allows audio transport from the source to the desired audio rendering devices over the video output port or through an SPDIF port. The STDP4320 supports RGB and YCbCr colorimetric formats with color depth of 16, 12, 10, and 8 bits. The STDP4320 features the HDCP content protection scheme with embedded keys for secure transmission of protected audio-video content. It also operates as an HDCP repeater for the downstream sinks. The DDC ports in the STDP4320 allow the upstream source to access EDID and transfer MCCS commands to downstream sinks when the physical ports are either HDMI or DVI type. If both the upstream source and downstream sinks are DP type, I2C transactions take place over the AUX CH. If one of them is a DP type and the other is either a HDMI or DVI type, STDP4320 converts the I2C over AUX message protocol to I2C commands and sends it on the DDC port. C4320-DAT-01p MegaChips’ Proprietary Information Page 7 of 39 STDP4320 The device has an on-chip microcontroller with SPI, UART, and I2C interface. The STDP4320 uses an external SPI Flash ROM for storing device configuration firmware. It has an I2C slave port for external host communication. Other system interface signals include general-purpose IO for source, sink communication, detection, monitoring, etc. When the downstream sink is disconnected, STDP4320 automatically turns off the inactive port for power saving purposes. C4320-DAT-01p MegaChips’ Proprietary Information Page 8 of 39 Application overview Figure STDP4320 in video hub application DP1.2 STDP 43 2 0 DP1.2 DP1.2 SPI Flash Crystal Figure STDP4320 in 4K2K TV application STDP4320 C4320-DAT-01p MegaChips’ Proprietary Information Ordering information STDP4320-BA Table Order codes Description 172 LFBGA 12 x 12 mm STDP4320 C4320-DAT-01p MegaChips’ Proprietary Information Strictly Confidential Page 37 of 39 Date 02-Mar-2016 Initial release. STDP4320 C4320-DAT-01p MegaChips’ Proprietary Information Page 38 of 39 STDP4320 Notice Semiconductor products may possibly experience breakdown or malfunction. Adequate care should be taken with respect to the safety design of equipment in order to prevent the occurrence of human injury, fire or social loss in the event of breakdown or malfunction of semiconductor products The overview of operations and illustration of applications described in this document indicate the conceptual method of use of the semiconductor product and do not guarantee operability in equipment in which the product is actually used. The names of companies and trademarks stated in this document are registered trademarks of the relevant companies. MegaChips Co. provides no guarantees nor grants any implementation rights with respect to industrial property rights, intellectual property rights and other such rights belonging to third parties or/and MegaChips Co. in the use of products and of technical information including information on the overview of operations and the circuit diagrams that are described in this document. The product described in this document may possibly be considered goods or technology regulated by the Foreign Currency and Foreign Trade Control Law. In the event such law applies, export license will be required under said law when exporting the product. This regulation shall be valid in Japan domestic. In the event the intention is to use the product described in this document in applications that require an extremely high standard of reliability such as nuclear systems, aerospace equipment or medical equipment for life support, please contact the sales department of MegaChips Co. in advance. All information contained in this document is subject to change without notice. Copyright 2016 MegaChips Corporation All rights reserved MegaChips Corporation Head Quarters 1-1-1 Miyahara, Yodogawa-ku Osaka 532-0003, Japan TEL +81-6-6399-2884 MegaChips Corporation Tokyo Office 17-6 Ichiban-cho, Chiyoda-ku, Tokyo 102-0082, Japan TEL +81-3-3512-5080 MegaChips Corporation Makuhari Office 1-3 Nakase Mihama-ku Chiba 261-8501, Japan TEL +81-43-296-7414 MegaChips Corporation San Jose Office 2033 Gateway Place, Suite 400, San Jose, CA 95110 U.S.A. TEL +1-408-570-0555 MegaChips Corporation India Branch 17th Floor, Concorde Block UB City, Vittal Mallya Road, Bangalore 560-001, India TEL +91-80-4041-3999 MegaChips Corporation Taiwan Branch RM. B 2F, Worldwide House, No.129, Min Sheng E. Rd., Sec. 3, Taipei 105, Taiwan TEL +886-2-2547-1297 MegaChips Corporation Tainan Office RM. 2, 8F, No.24, Da Qiao 2 Rd., Yong Kang Dist., Tainan 710, Taiwan TEL +886-6-302-2898 MegaChips Corporation Zhunan Office No.118, Chung-Hua Rd., Chu-Nan, Miao-Li 350, Taiwan TEL +886-37-666-156 MegaChips Corporation Shenzhen Office Room 6307, Office Tower, Shun Hing Square, 5002 Shen Nan Dong Road, Luohu District, Shenzhen 518000, P. R. China TEL +86-755-3664-6990 C4320-DAT-01p MegaChips’ Proprietary Information Page 39 of 39 |
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