KL5BPLC250WMP

KL5BPLC250WMP Datasheet

KL5BPLC250WMP Datasheet Rev.

Part	Datasheet
KL5BPLC250WMP	KL5BPLC250WMP (pdf)

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*-***-** KL5BPLC250WMP Multi-Hop Powerline Networking IC Datasheet MegaChips Corporation’ Proprietary This information shall not be shared or distributed outside the company and will be exchanged based on the signed proprietary information exchange agreement. MegaChips Corporation reserves the right to make any change herein at any time without prior notice. MegaChips Corporation does not assume any responsibility or liability arising out of application or use of any product or service described herein except as explicitly agreed upon. Proprietary Date 2015/10/01 2015/12/20 2016/03/01 -****-** Description First draft Modified Table-17 Absolute Maximum Ratings. Add internal Pull-up/down Pin description Modify ICE mode GPIO behavior Proprietary -****-** Table of Contents 1 Product overview 4 Function Overview 4 Block Diagram 5 Pin Assignments 6 Pin 7 3 Operating Conditions 15 Absolute Maximum Ratings 15 Recommended Operating Conditions 15 4 BaseBand 16 Block Diagram 16 List of 17 Microcontroller and Peripherals 17 PLC-PHY 17 PLC-MAC Processing Function 17 SPI FLASH Interface Function 17 SDRAM Interface 17 Ethernet PHY Interface 17 Clock and Reset Control 17 Example System 18 Normal Mode 18 ICE Mode 19 Electrical Characteristics 20 5 Analog Front-End AFE Part 21 General Description 21 Power Supply 22 Proprietary -****-** Digital Interface Specifications 23 6 24 7 Ordering Information 25 Proprietary -****-** 1 Product overview Function Overview The KL5BPLC250WMP is a Broad Band Power Line Communication SoC with multi-hop capability. Multi-hop systems can communicate over the long distances that are required for many industrial and commercial applications. The KL5BPLC250WMP enables the creation of small form factor devices that consume very low power while providing high performance. The KL5BPLC250WMP supports 1024 nodes on a single power line and advanced routing algorithms to continuously find the optimum paths as line conditions change. The KL5BPLC250WMP incorporates a 32-bit RISC processor and provides a single-chip implementation of high-performance wavelet conversion OFDM functionality, MAC processing functionality with high-quality QoS support, and PLC/Ethernet bridge functionality. QoS functionality can be used to guarantee a fixed communication speed for a variety of communications ranging from data transmission and reception to video streaming and IP telephony. The KL5BPLC250WMP also has highly integrated analog front-end chip so that no other analog front-end IC for PLC is necessary. An on-chip PLL multiplier and synthesizer provide all the required clock signals from a single crystal or clock source. Following are the features of KL5BPLC250WMP. Low power consumption 0.4W for full operation mode High noise immunity and high quality of service QoS over both AC and DC power lines Support multi-hop system up to 1024 nodes High data rate 10Mbps UDP/10hops SoC with integrated Analog Front End AFE and Baseband bridge function Single chip solution for Multi-hop application. Proprietary Block Diagram Figure- 1 shows a block diagram of the KL5BPLC250WMP. -****-** NRESET SYSCLK 31.25MHz Clock & Reset PL L GPIO UART TIMER DMAC INTC BaseBand ARM946E-S I-Cache PL C-PH Y SPI FLASH Controller PL C-MAC SDRAM Controller Ether MAC Serial FL ASH SDRAM Ether-PHY 2x Digital Interpolation Digital Interface TX DAC 160MSPS RX ADC PGA LPF IAMP Register Controller IOUTP IOUTN RXP RXN KL5BPLC250WMP Figure- 1 KL5BPLC250WMP Block Diagram Proprietary 2 Pins Pin Assignments -****-** Figure- 2 Pin Assignment 7 Ordering Information Part Number KL5BPLC250WMP -****-**** Notice - Semiconductor products may possibly experience breakdown or malfunction. Adequate care should be taken with respect to the safety design of equipment in order to prevent the occurrence of human injury, fire or social loss in the event of breakdown or malfunction of semiconductor products - The overview of operations and illustration of applications described in this document indicate the conceptual method of use of the semiconductor product and do not guarantee operability in equipment in which the product is actually used. - The names of companies and trademarks stated in this document are registered trademarks of the relevant companies. - MegaChips Corporation provides no guarantees nor grants any implementation rights with respect to industrial property rights, intellectual property rights and other such rights belonging to third parties or/and MegaChips Corporation in the use of products and of technical information including information on the overview of operations and the circuit diagrams that are described in this document. - The product described in this document may possibly be considered goods or technology regulated by the Foreign Currency and Foreign Trade Control Law. In the event such law applies, export license will be required under said law when exporting the product. This regulation shall be valid in Japan domestic. - In the event the intention is to use the product described in this document in applications that require an extremely high standard of reliability such as nuclear systems, aerospace equipment or medical equipment for life support, please contact the sales department of MegaChips Corporation in advance. - All information contained in this document is subject to change without notice. Proprietary

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KL5BPLC250WMP Multi-Hop Powerline

Networking IC Datasheet

MegaChips Corporation’ Proprietary

This information shall not be shared or distributed outside the company and will be exchanged based on the signed proprietary information exchange agreement. MegaChips Corporation reserves the right to make any change herein at any time without prior notice. MegaChips Corporation does not assume any responsibility or liability arising out of application or use of any product or service described herein except as explicitly agreed upon. Proprietary

Date 2015/10/01 2015/12/20 2016/03/01
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Description First draft Modified Table-17 Absolute Maximum Ratings. Add internal Pull-up/down Pin description Modify ICE mode GPIO behavior

Proprietary
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Table of Contents
1 Product overview 4 Function Overview 4 Block Diagram 5

Pin Assignments 6

Pin 7
3 Operating Conditions 15 Absolute Maximum Ratings 15 Recommended Operating Conditions 15
4 BaseBand 16

Block Diagram 16

List of 17

Microcontroller and Peripherals 17 PLC-PHY 17 PLC-MAC Processing Function 17 SPI FLASH Interface Function 17 SDRAM Interface 17 Ethernet PHY Interface 17 Clock and Reset Control 17

Example System 18

Normal Mode 18 ICE Mode 19

Electrical Characteristics 20
5 Analog Front-End AFE Part 21

General Description 21

Power Supply 22

Proprietary
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Digital Interface Specifications 23
6 24 7 Ordering Information 25

Proprietary
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1 Product overview

Function Overview

The KL5BPLC250WMP is a Broad Band Power Line Communication SoC with multi-hop capability. Multi-hop systems can communicate over the long distances that are required for many industrial and commercial applications. The KL5BPLC250WMP enables the creation of small form factor devices that consume very low power while providing high performance. The KL5BPLC250WMP supports 1024 nodes on a single power line and advanced routing algorithms to continuously find the optimum paths as line conditions change. The KL5BPLC250WMP incorporates a 32-bit RISC processor and provides a single-chip implementation of high-performance wavelet conversion OFDM functionality, MAC processing functionality with high-quality QoS support, and PLC/Ethernet bridge functionality. QoS functionality can be used to guarantee a fixed communication speed for a variety of communications ranging from data transmission and reception to video streaming and IP telephony. The KL5BPLC250WMP also has highly integrated analog front-end chip so that no other analog front-end IC for PLC is necessary. An on-chip PLL multiplier and synthesizer provide all the required clock signals from a single crystal or clock source.

Following are the features of KL5BPLC250WMP. Low power consumption 0.4W for full operation mode High noise immunity and high quality of service QoS over both AC and DC power lines Support multi-hop system up to 1024 nodes High data rate 10Mbps UDP/10hops SoC with integrated Analog Front End AFE and Baseband bridge function Single chip solution for Multi-hop application.

Proprietary

Block Diagram

Figure- 1 shows a block diagram of the KL5BPLC250WMP.
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NRESET

SYSCLK 31.25MHz

Clock & Reset PL L

GPIO UART TIMER DMAC INTC

BaseBand

ARM946E-S I-Cache

PL C-PH Y

SPI FLASH Controller

PL C-MAC

SDRAM Controller

Ether MAC

Serial FL ASH

SDRAM Ether-PHY
2x Digital

Interpolation

Digital Interface

TX DAC 160MSPS

RX ADC

PGA LPF

IAMP

Register Controller

IOUTP IOUTN

RXP RXN

KL5BPLC250WMP

Figure- 1 KL5BPLC250WMP Block Diagram

Proprietary
2 Pins

Pin Assignments
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Figure- 2 Pin Assignment
7 Ordering Information

Part Number KL5BPLC250WMP
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Notice
- Semiconductor products may possibly experience breakdown or malfunction. Adequate care should be taken with respect to the safety
design of equipment in order to prevent the occurrence of human injury, fire or social loss in the event of breakdown or malfunction of semiconductor products
- The overview of operations and illustration of applications described in this document indicate the conceptual method of use of the
semiconductor product and do not guarantee operability in equipment in which the product is actually used.
- The names of companies and trademarks stated in this document are registered trademarks of the relevant companies. - MegaChips Corporation provides no guarantees nor grants any implementation rights with respect to industrial property rights,
intellectual property rights and other such rights belonging to third parties or/and MegaChips Corporation in the use of products and of technical information including information on the overview of operations and the circuit diagrams that are described in this document.
- The product described in this document may possibly be considered goods or technology regulated by the Foreign Currency and

Foreign Trade Control Law. In the event such law applies, export license will be required under said law when exporting the product. This regulation shall be valid in Japan domestic.
- In the event the intention is to use the product described in this document in applications that require an extremely high standard of
reliability such as nuclear systems, aerospace equipment or medical equipment for life support, please contact the sales department of MegaChips Corporation in advance.
- All information contained in this document is subject to change without notice.

Proprietary

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Datasheet ID: KL5BPLC250WMP 647755