ZA9L0022NW1LSGA021

ZA9L0022NW1LSGA021 Datasheet


ZA9L0

Part Datasheet
ZA9L0022NW1LSGA021 ZA9L0022NW1LSGA021 ZA9L0022NW1LSGA021 (pdf)
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ABRIDGED DATA SHEET

Zatara High-Performance, Secure, 32-Bit ARM Microcontroller

ZA9L0

The ZA9L0 is a highly integrated system-onchip SoC microcontroller based on the ARM922T 32-bit/16-bit core and tailored to the specific requirements of point-of-sale POS terminal design and meet the strict security requirements of the Payment Card Industry PCI Security Standards Council specification. Running at 180MHz, the ZA9L0 is one of the fastest high-security microcontrollers available. The ZA9L0 provides a rich set of features on a single chip that reduces the manufacturing cost and time-to-market for secure transaction products such as POS terminals, vending machines, and security panels. The Zatara ZA9L0 includes the essential security features required of a POS terminal. It also provides seamless interfaces to LCD displays and keypads, and includes a wide array of peripherals such as an ADC, DMAs, UARTs, GPIOs, and timers that add flexibility to control and differentiate the system design.

System security is enhanced by a number of physical and logical protection mechanisms including environmental sensors temperature, voltage, and frequency , true hardware random-number generator RNG , realtime clock RTC , and 4KB of secure nonvolatile SRAM storage with fast erase capability upon tampering. On power-up, application code is first cryptographically verified for authenticity to ensure that attackers cannot insert their own application code.

The ZA9L0 provides extensive communication support with three UARTs, two independent SPI ports, and ample GPIO pins to implement any communication interface. The ZA9L0 also has a targeted set of peripherals to support PIN pad applications, including an LCD interface, multiple timers with PWM, watchdog, and a 6-channel, 10-bit ADC.

Healthcare Reader

PIN Pads

Metering
32-Bit ARM922T CPU Core 8KB/8KB I/D-Caches MMU Supporting and

Embedded CE Operating Systems
180MHz Performance

JTAG Embedded ICE Support

Zatara is a registered trademark of Maxim Integrated Products, Inc. ARM922T is a trademark of ARM Limited. SPI is a trademark of Motorola, Inc. Linux is a registered trademark of Linus Torvalds. Windows is a registered trademark of Microsoft Corp.
64KB Embedded Zero-Wait-State SRAM

Vectored Interrupt Controller

External Bus Interface Dual External Bus Architecture Primary and Secondary 24-Bit Address, 16-Bit Data Synchronous Flash SDRAM in 16MB to 512MB Configurations

Power Management Unit 14MHz to 40MHz Oscillator and Phase-Locked Loop PLL -Generated System Clocks 32.768kHz Oscillator for RTC Clock Disable on a Peripheral-by-Peripheral Basis Three Modes Active, Idle, and Battery Backup

Real-Time Clock

Watchdog Timer WDT

Two Dedicated SPI Interfaces

Nine Timer/Counters

Three UARTs 1 x 8-Wire Interface 2 x 4-Wire Interface

POS Security Features for PCI Compliance Voltage and Temperature Sensors for Tamper Switches and Wire Mesh Clock Frequency and Glitch Protection Battery-Backed Secure Memory with Active Zeroization

Embedded Boot ROM
32-Bit Unique ID Number

NIST 800-22-Compliant Random-Number Generator

FIPS 180-2-Compliant SHA-1 Hash Generator

Display Controller Interface

Up to 76 General-Purpose Input/Output GPIO Pins
10-Bit ADC, 6-Channel, 45ksps

Eight Independent DMA Channels

Voltage Dual 1.8V and 3.3V Supplies
3.3V I/O Pins with 5V Tolerant I/O for UART and SPI
256-Pin BGA 1.0mm Ball Pitch Package
Ordering Information

PART

TEMP RANGE PIN-PACKAGE JTAG

ZA9L0xxxx+ -40°C to +85°C
256 LFBGA

Note The secure boot ROM in the device uses customerunique keys to verify the application image, so there is a unique part number per customer. Contact the factory for more information and to obtain samples for application development. +Denotes a lead Pb -free/RoHS-compliant package.

Maxim Integrated Products 1
For pricing, delivery, and ordering information, please contact Maxim Direct at 1-888-629-4642, or visit Maxim’s website at

ZA9L0

ABRIDGED DATA SHEET

Zatara High-Performance, Secure, 32-Bit ARM Microcontroller

Functional Diagram

APB PIN MUXING

TAMPER CIRCUITS

SECURITY CONTROLLER

SECURE RAM RTC

JTAG

ARM922T
8KB I-CACHE 8KB D-CACHE

INTC APB BRIDGE

DMAC SECURE BOOT ROM
64KB SRAM

RESET PMU WATCHDOG RNG SHA-1 HASH

GPIO LCD INTERFACE

SPI x2 UART x3 TIMER/PWM COUNTERS x9 RESERVED

RESERVED 10-BIT ADC 6 CHANNELS RESERVED

EXTERNAL BUS INTERFACE

SDRAM CONTROL

PRIMARY SECONDARY

EXTERNAL MEMORY CONTROL

Note to readers This document is an abridged version of the full data sheet. To request the full data sheet, go to and click on Request Full Data Sheet.
More datasheets: SRF 55V02S Y2/0 | SRF 55V02S MFCC1 | SRF 55V02S Y1/0 | SRF 55V02S MCC2 | ZA9L004BNW1LSGA307 | ZA9L0010NW1LSGA201 | ZA9L0020NW1LSGA300 | ZA9L0071NW1LSGA314 | ZA9L0075NW1LSGA303 | ZA9L00D0NW1LSGA399


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Datasheet ID: ZA9L0022NW1LSGA021 647500