MAX9633
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MAX9633ATA+ (pdf) |
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EVALUATION KIT AVAILABLE MAX9633 Dual 36V Op Amp for 18-Bit SAR ADC Front-End The MAX9633 is a low-noise, low-distortion operational amplifier that is optimized to drive ADCs for use in applications from DC to a few MHz. The MAX9633 features low noise at 1kHz and at 100Hz and low distortion 130dB at 10kHz , making it suitable for industrial, medical, and test applications. The exceptionally fast settling-time and low input offset voltage makes the IC an excellent solution to drive highresolution 12-bit to 18-bit SAR ADCs. The IC operates from a wide supply voltage range up to 36V with only 3.5mA of quiescent current per amplifier. The IC is offered in an 8-pin, 3mm x 3mm TDFN package for operation over the -40NC to +125NC temperature range. ADC Drivers Data Acquisition and Instrumentation Power Grid Systems Motor Control Test and Measurement Equipments Imaging Systems High-Performance Audio Circuitry Benefits and Features S High-Resolution ADC Driver 27MHz Gain Bandwidth 750ns Settling Time to 16-Bit Accuracy THD of 130dB at 10kHz Low Input Voltage Offset 200µV max Ultra-Low Input Voltage Noise Low Input Offset Temperature Drift 0.9µV/°C max Unity Gain Stable S Support a Wide Range of Industrial Applications 4.5V to 36V Wide Supply Range S Improved Reliability ±5kV ESD Protection HBM S Saves Board Space 8-Pin TDFN and SO Packages Ordering Information PART TEMP RANGE PINPACKAGE MAX9633ASA+ -40NC to +125NC 8 SO-EP* MAX9633ATA+ -40NC to +125NC 8 TDFN-EP* +Denotes a lead Pb -free/RoHS-compliant package. *EP = Exposed pad. TOP MARK Typical Application Circuit ANTI-ALIAS FILTER MAX9633 +15V 1MI -15V R2 R1 -3dB AT 8MHz RI = 20I C = 1nF 12 TO 18-BIT SAR ADC EXAMPLE MAX1320 14-BIT ADC For pricing, delivery, and ordering information, please contact Maxim Direct at 1-888-629-4642, or visit Maxim’s website at MAX9633 Dual 36V Op Amp for 18-Bit SAR ADC Front-End ABSOLUTE MAXIMUM RATINGS Supply Voltage VCC to +40V All Other - 0.3V to VCC + 0.3V Short-Circuit Duration of OUTA, OUTB.................................. 10s Continuous Input Current any pins ................................ ±20mA Continuous Power Dissipation TA = +70NC SO derate 24.4mW/NC above +70NC Multilayer TDFN derate 24.4mW/NC above +70NC Multilayer Operating Temperature Range......................... -40NC to +125NC Junction Storage Temperature Range............................. -65NC to +150NC Soldering Temperature PACKAGE THERMAL CHARACTERISTICS Note 1 SO-EP Junction-to-Ambient Thermal Resistance qJA ...........41°C/W Junction-to-Case Thermal Resistance qJC ..................7°C/W TDFN-EP Junction-to-Ambient Thermal Resistance qJA ...........42°C/W Junction-to-Case Thermal Resistance qJC ..................8°C/W Note 1 Package thermal resistances were obtained using the method described in JEDEC specification JESD51-7, using a four-layer board. For detailed information on package thermal considerations, refer to Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. ELECTRICAL CHARACTERISTICS VCC = +15V, VEE = -15V, VCM = 0V, RL = 10kI to VGND = 0V, TA = TMIN to TMAX, unless otherwise noted. Typical values are at TA = +25NC. Note 2 PARAMETER POWER SUPPLY CONDITIONS MIN TYP MAX UNITS Supply Voltage Range VCC - VEE Guaranteed by PSRR TA = +25NC Supply Current Per amplifier -40NC P TA P +85NC -40NC P TA P +125NC Power-Supply Rejection Ratio PSRR +4.5V P VCC - VEE TA = +25NC P +36V -40NC P TA P +125NC 112 110 DC SPECIFICATIONS Input Offset Voltage TA = +25NC -40NC P TA P +125NC Q70 Q200 FV Q290 Input Offset Voltage Drift Note 3 DVOS -40NC P TA P +125NC FV/NC Input Bias Current Input Offset Current Input Voltage Range VEE + 0.45V P VCM P VCC - 1.8V VEE P VCM P VCC - 1.8V |
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