MAX109
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MAX109EHF-D (pdf) |
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MAX109 EVAALVUAAILTAIOBNLEKIT 8-Bit, 2.2Gsps ADC with Track/Hold Amplifier and 1:4 Demultiplexed LVDS Outputs The MAX109, 2.2Gsps, 8-bit, analog-to-digital converter ADC enables the accurate digitizing of analog signals with frequencies up to 2.5GHz. Fabricated on an advanced SiGe process, the MAX109 integrates a highperformance track/hold T/H amplifier, a quantizer, and a 1:4 demultiplexer on a single monolithic die. The MAX109 also features adjustable offset, full-scale voltage via REFIN , and sampling instance allowing multiple ADCs to be interleaved in time. The innovative design of the internal T/H amplifier, which has a wide 2.8GHz full-power bandwidth, enables a flat-frequency response through the second Nyquist region. This results in excellent ENOB performance of bits. A fully differential comparator design and decoding circuitry reduce out-of-sequence code errors thermometer bubbles or sparkle codes and provide excellent metastability performance 1014 clock cycles . This design guarantees no missing codes. The analog input is designed for both differential and single-ended use with a 500mVP-P input-voltage range. The output data is in standard LVDS format, and is demultiplexed by an internal 1:4 demultiplexer. The LVDS outputs operate from a supply-voltage range of 3V to 3.6V for compatibility with single 3V-reference systems. Control inputs are provided for interleaving additional MAX109 devices to increase the effective system-sampling rate. The MAX109 is offered in a 256-pin Super Ball-Grid Array SBGA package and is specified over the extended industrial temperature range -40°C to +85°C . Radar Warning Receivers RWR Light Detection and Ranging LIDAR Digital RF/IF Signal Processing Electronic Warfare EW Systems High-Speed Data-Acquisition Systems Digital Oscilloscopes High-Energy Physics Instrumentation ATE Systems Ultra-High-Speed, 8-Bit, 2.2Gsps ADC 2.8GHz Full-Power Analog Input Bandwidth Excellent Signal-to-Noise Performance 44.6dB SNR at fIN = 300MHz 44dB SNR at fIN = 1600MHz Superior Dynamic Range at High-IF 61.7dBc SFDR at fIN = 300MHz 50.3dBc SFDR at fIN = 1600MHz -60dBc IM3 at fIN1 = 1590MHz and fIN2 = 1610MHz 500mVP-P Differential Analog Inputs 6.8W Typical Power Including the Demultiplexer Adjustable Range for Offset, Full-Scale, and Sampling Instance 50Ω Differential Analog Inputs 1:4 Demultiplexed LVDS Outputs Interfaces Directly to Common FPGAs with DDR and QDR Modes Ordering Information PART MAX109EHF-D = Dry pack. TEMP RANGE -40°C to +85°C PIN-PACKAGE 256 SBGA Pin Configuration TOP VIEW 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 A MAX109 256-PIN SBGA PACKAGE 256-PIN SUPER BALL-GRID ARRAY Maxim Integrated Products 1 For pricing, delivery, and ordering information, please contact Maxim Direct at 1-888-629-4642, or visit Maxim’s website at MAX109 PORTA PORTB PORTC PORTD DOR DCO 8-Bit, 2.2Gsps ADC with Track/Hold Amplifier and 1:4 Demultiplexed LVDS Outputs A[0:7] B[0:7] C[0:7] D[0:7] RSTOUT DEMUX CLOCK DRIVER DEMUX RESET OUTPUT REFERENCE AMPLIFIER 8-BIT ADC CORE DEMUX CLOCK GENERATOR QDR DDR DELAYED RESET LOGIC CLOCK DRIVER RESET PIPELINE REFIN REFOUT BANDGAP REFERENCE T/H AMPLIFIER 50Ω 50Ω QUANTIZER CLOCK DRIVER RESET INPUT DUAL LATCH RSTINN RSTINP INPUT CLOCK BUFFER 50Ω 50Ω GNDI TEMPERATURE MONITOR TEMPMON VOSADJ INP INN Figure Functional Diagram of the MAX109 SAMPADJ CLKP CLKCOM CLKN 8-Bit, 2.2Gsps ADC with Track/Hold Amplifier and 1:4 Demultiplexed LVDS Outputs MAX109 ABSOLUTE MAXIMUM RATINGS VCCA to GNDA -0.3V to +6V VCCD to GNDD -0.3V to +6V VCCI to GNDI -0.3V to +6V VCCO to GNDO -0.3V to +3.9V VEE to GNDI -6V to +0.3V Between Grounds GNDA, GNDI, GNDO, GNDD, GNDR -0.3V to +0.3V VCCA to VCCD -0.3V to +0.3V VCCA to VCCI -0.3V to +0.3V Differential Voltage between INP and INN ±1V INP, INN to GNDI ±1V Differential Voltage between CLKP and CLKN..................... ±3V CLKP, CLKN, CLKCOM to GNDI -3V to +1V Digital LVDS Outputs to GNDO -0.3V to VCCO - 0.3V REFIN, REFOUT to GNDR ........................-0.3V to VCCI + 0.3V REFOUT Current to +5mA |
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