MX25U3235EM2I-10G

MX25U3235EM2I-10G Datasheet

MX25U3235E

Part	Datasheet
MX25U3235EM2I-10G	MX25U3235EM2I-10G (pdf)

Related Parts	Information
MX25U3235EZNI-10G	MX25U3235EZNI-10G

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MX25U3235E MX25U3235E DATASHEET P/N PM1472 MX25U3235E Contents 6 GENERAL 8 Table Additional Feature 9 PIN CONFIGURATIONS 10 PIN 10 BLOCK 11 DATA 12 Table Protected Area 13 Table 4K-bit Secured OTP 13 Memory 14 Table Memory 14 DEVICE 16 Figure Serial Modes 16 Quad Peripheral Interface QPI Read 17 Figure Enable QPI Sequence Command 17 Figure Reset QPI Mode Command 18 Figure Fast QPI Read Mode FASTRDQ Command EBH 18 COMMAND 19 Table Command 19 Write Enable 21 Write Disable 21 Read Identification 21 Read Status Register 21 Figure Program/ Erase flow with read array 22 Figure Program/ Erase flow without read array data read P_FAIL/E_FAIL 23 Figure WRSR 24 Table Status 25 Write Status Register 26 Table Protection 26 Read Data Bytes 27 Read Data Bytes at Higher Speed 27 2 x I/O Read Mode 28 4 x I/O Read Mode 28 Burst 29 Table Wrap Around Definition 29 Figure SPI 29 Figure QPI 29 P/N PM1472 MX25U3235E Performance Enhance 30 Performance Enhance Mode Reset 30 Sector Erase 30 Block Erase 31 Block Erase 31 Chip Erase 31 Page Program 32 4 x I/O Page Program 32 Deep Power-down 33 Release from Deep Power-down RDP , Read Electronic Signature 33 Read Electronic Manufacturer ID & Device ID 34 QPI ID Read 34 Table ID Definitions 34 Enter Secured OTP 35 Exit Secured OTP 35 Read Security Register 35 Table Security Register 36 Write Security Register 36 Write Protection Selection 37 Figure BP and SRWD if 37 Figure The individual block lock mode is effective after setting 38 Figure WPSEL 39 Single Block Lock/Unlock Protection 40 Figure Block Lock 40 Figure Block Unlock 41 Read Block Lock Status 42 Gang Block Lock/Unlock 42 Program/Erase 42 Erase 43 Program 43 44 No Operation 44 Software Reset-Enable RSTEN and Reset 44 Reset Quad I/O 44 Read SFDP Mode 45 Figure Read Serial Flash Discoverable Parameter RDSFDP 45 Table Signature and Parameter Identification Data 46 Table Parameter Table 0 JEDEC Flash Parameter 47 Table Parameter Table 1 Macronix Flash Parameter 49 POWER-ON 51 P/N PM1472 MX25U3235E ELECTRICAL 52 Absolute Maximum 52 Figure Maximum Negative Overshoot 52 Figure Maximum Positive Overshoot 52 Figure Input Test Waveforms and Measurement 53 Figure Output 53 Table DC 54 Table AC 55 Timing 56 Figure Serial Input 56 Figure Output 56 Figure WP# Setup Timing and Hold Timing during WRSR when 57 Figure Write Enable WREN Sequence Command 06 SPI 57 Figure Write Enable WREN Sequence Command 06 QPI 57 Figure Write Disable WRDI Sequence Command 04 SPI 58 Figure Write Disable WRDI Sequence Command 04 QPI 58 Figure Read Identification RDID Sequence Command 9F SPI mode 58 Figure Read Status Register RDSR Sequence Command 05 SPI 59 Figure Read Status Register RDSR Sequence Command 05 QPI 59 Figure Write Status Register WRSR Sequence Command 01 SPI 59 Figure Write Status Register WRSR Sequence Command 01 QPI 60 Figure Read Data Bytes READ Sequence Command 03 SPI Mode only 33MHz ............................. 60 Figure Read at Higher Speed FAST_READ Sequence Command 0B SPI Mode 104MHz .............. 61 Figure Read at Higher Speed FAST_READ Sequence Command 0B QPI Mode 84MHz ................ 61 Figure 2 x I/O Read Mode Sequence Command BB SPI Mode only 62 Figure 4 x I/O Read Mode Sequence Command EB SPI Mode 62 Figure 4 x I/O Read enhance performance Mode Sequence Command EB SPI Mode 104MHz ......... 63 Figure 4 x I/O Read enhance performance Mode Sequence Command EB QPI Mode 104MHz ........ 64 Figure Page Program PP Sequence Command 02 SPI 64 Figure Page Program PP Sequence Command 02 QPI 65 Figure 4 x I/O Page Program 4PP Sequence Command 38 SPI Mode 65 Figure Sector Erase SE Sequence Command 20 SPI 66 Figure Sector Erase SE Sequence Command 20 QPI 66 Figure Block Erase 32KB BE32K Sequence Command 52 SPI 66 Figure Block Erase 32KB BE32K Sequence Command 52 QPI 66 Figure Block Erase BE Sequence Command D8 SPI 67 Figure Block Erase BE Sequence Command D8 QPI 67 Figure Chip Erase CE Sequence Command 60 or C7 SPI 67 Figure Chip Erase CE Sequence Command 60 or C7 QPI 67 P/N PM1472 MX25U3235E P/N PM1472 MX25U3235E 32M-BIT [x 1/x 2/x 4] 1.8V CMOS SERIAL MULTI I/O FLASH MEMORY GENERAL • Serial Peripheral Interface compatible -- Mode 0 and Mode 3 • 32,554,432 x 1 bit structure or 16,777,216 x 2 bits two I/O read mode structure or 8,388,608 x 4 bits four I/O read mode structure • Equal Sectors with 4K byte each, or Equal Blocks with 32K byte each or Equal Blocks with 64K byte each - Any Block can be erased individually • Single Power Supply Operation - to volt for read, erase, and program operations • Latch-up protected to 100mA from -1V to Vcc +1V • Low Vcc write inhibit is from 1.0V to 1.4V PERFORMANCE • High Performance - Fast read for SPI mode - 1 I/O 104MHz with 8 dummy cycles - 2 I/O 84MHz with 4 dummy cycles, equivalent to 168MHz - 4 I/O 104MHz with 6 dummy cycles, equivalent to 416MHz - Fast read for QPI mode - 4 I/O 84MHz with 4 dummy cycles, equivalent to 336MHz - 4 I/O 104MHz with 6 dummy cycles, equivalent to 416MHz - Fast program time 1.2ms typ. and 3ms max. /page 256-byte per page - Byte program time 10us typical - 8/16/32/64 byte Wrap-Around Burst Read Mode - Fast erase time 45ms typ. /sector 4K-byte per sector 250ms typ. /block 32K-byte per block 500ms typ. / block 64K-byte per block 18s typ. /chip • Low Power Consumption - Low active read current 20mA max. at 104MHz, 15mA max. at 84MHz - Low active erase/programming current 20mA typ. - Standby current 25uA typ. • Deep Power Down 2uA typ. • Typical 100,000 erase/program cycles • 20 years data retention SOFTWARE FEATURES • Input Data Format - 1-byte Command code • Advanced Security Features - Block lock protection The BP0-BP3 status bit defines the size of the area to be software protection against program and erase instructions - Additional 4k-bit secured OTP for unique identifier • Auto Erase and Auto Program Algorithm - Automatically erases and verifies data at selected sector or block P/N PM1472 MX25U3235E - Automatically programs and verifies data at selected page by an internal algorithm that automatically times the program pulse widths Any page to be programed should have page in the erased state first • Status Register Feature • Command Reset • Program/Erase Suspend • Electronic Identification - JEDEC 1-byte manufacturer ID and 2-byte device ID - RES command for 1-byte Device ID - REMS command for 1-byte manufacturer ID and 1-byte device ID • Support Serial Flash Discoverable Parameters SFDP mode HARDWARE FEATURES • SCLK Input - Serial clock input • SI/SIO0 - Serial Data Input or Serial Data Input/Output for 2 x I/O read mode and 4 x I/O read mode • SO/SIO1 - Serial Data Output or Serial Data Input/Output for 2 x I/O read mode and 4 x I/O read mode • WP#/SIO2 - Hardware write protection or serial data Input/Output for 4 x I/O read mode • NC/SIO3 - NC pin or Serial input & Output for 4 x I/O read mode • PACKAGE - 8-pin SOP 200mil - 8-land WSON 6x5mm - All devices are RoHS Compliant and Halogen-free P/N PM1472 MX25U3235E The MX25U3235E are 32,554,432 bit serial Flash memory, which is configured as 4,194,304 x 8 internally. When it is in two or four I/O read mode, the structure becomes 16,777,216 bits x 2 or 8,388,608 bits x MX25U3235E feature a serial peripheral interface and software protocol allowing operation on a simple 3-wire bus while it is in single I/O mode. The three bus signals are a clock input SCLK , a serial data input SI , and a serial data output SO . Serial access to the device is enabled by CS# input. When it is in two I/O read mode, the SI pin and SO pin become SIO0 pin and SIO1 pin for address/dummy bits input and data output. When it is in four I/O read mode, the SI pin, SO pin and WP# pin become SIO0 pin, SIO1 pin, SIO2 pin and SIO3 pin for address/dummy bits input and data output. The MX25U3235E Serial Multi I/O provides sequential read operation on whole chip. After program/erase command is issued, auto program/ erase algorithms which program/ erase and verify the specified page or sector/block locations will be executed. Program command is executed on byte basis, or page 256 bytes basis, or word basis for erase command is executed on sector 4K-byte , block 32K-byte , or block 64K-byte , or whole chip basis. To provide user with ease of interface, a status register is included to indicate the status of the chip. The status read command can be issued to detect completion status of a program or erase operation via WIP bit. Advanced security features enhance the protection and security functions, please see security features section for more details. When the device is not in operation and CS# is high, it is put in standby mode and typically draws 30uA DC current. The MX25U3235E utilizes Macronix's proprietary memory cell, which reliably stores memory contents even after 100,000 program and erase cycles. P/N PM1472 MX25U3235E Table Additional Feature Comparison ORDERING INFORMATION Clock MHz MX25U3235EM2I-10G MX25U3235EZNI-10G MX25U3235E Temperature -40°C~85°C -40°C~85°C Package 8-SOP 200mil 8-WSON 6x5mm Remark P/N PM1472 MX25U3235E PART NAME DESCRIPTION MX 25 U 3235E M2 I OPTION G RoHS Compliant and Halogen-free SPEED 10 104MHz TEMPERATURE RANGE I Industrial -40°C to 85°C PACKAGE M2 200mil 8-SOP ZN 8-WSON DENSITY & MODE 3235E 32Mb TYPE U 1.8V DEVICE 25 Serial Flash P/N PM1472 PACKAGE INFORMATION MX25U3235E P/N PM1472 MX25U3235E P/N PM1472 MX25U3235E Added MXSMIOTM logo and 4 I/O 104MHz specifications Page P6 Date JUL/24/2009 Take out 8WSON and 200mil 8-SOP package outline Added software reset Corrected supporting instructions Modified dummy cycle numbers from 2 to 4 Added QPI, Write suspend/resume commands Added QPI operations in the command descriptions AC/DC modifications Write suspend features modify P6,38,39,45 Updated SPI & QPI commands & descriptions Added Read SFDP RDSFDP Mode P7,17,20, FEB/10/2012 P46~55,60 Modified Program/Erase Suspend/Resume latency P43~44,80 NOV/07/2012 Modified content and descriptions P18,23~25,33 P43~44,64,76 Modified tCLQX value in AC Characteristics Table DEC/12/2012 Modified Data Retention value P6,79 MAY/03/2013 Modified tCH, tCL and its value in AC Characteristics Table Modified Features Page to sync with AC Characteristics Table P6 Correct Symbol in Reset Sequence QPI mode Figure Removed MX25U1635E Updated parameters for DC/AC Characteristics P6,54,55 NOV/11/2013 Updated Erase and Programming Performance P6,79 Modified VCC to Ground Potential P/N PM1472 MX25U3235E Except for customized products which has been expressly identified in the applicable agreement, Macronix's products are designed, developed, and/or manufactured for ordinary business, industrial, personal, and/or household applications only, and not for use in any applications which may, directly or indirectly, cause death, personal injury, or severe property damages. In the event Macronix products are used in contradicted to their target usage above, the buyer shall take any and all actions to ensure said Macronix's product qualified for its actual use in accordance with the applicable laws and regulations and Macronix as well as it’s suppliers and/or distributors shall be released from any and all liability arisen therefrom. Copyright Macronix International Co., Ltd. All rights reserved, including the trademarks and tradename thereof, such as Macronix, MXIC, MXIC Logo, MX Logo, Integrated Solutions Provider, NBit, Nbit, NBiit, Macronix NBit, eLiteFlash, HybridNVM, HybridFlash, XtraROM, Phines, KH Logo, BE-SONOS, KSMC, Kingtech, MXSMIO, Macronix vEE, Macronix MAP, Rich io, Rich Book, Rich TV, and FitCAM. The names and brands of third party referred thereto if any are for identification purposes only. For the contact and order information, please visit Macronix’s Web site at: MACRONIX INTERNATIONAL CO., LTD. reserves the right to change product and specifications without notice. 86

PDF Datasheet Preview

MX25U3235E

MX25U3235E DATASHEET

P/N PM1472

MX25U3235E

Contents
6 GENERAL 8

Table Additional Feature 9 PIN CONFIGURATIONS 10 PIN 10 BLOCK 11 DATA 12

Table Protected Area 13 Table 4K-bit Secured OTP 13 Memory 14 Table Memory 14 DEVICE 16 Figure Serial Modes 16 Quad Peripheral Interface QPI Read 17 Figure Enable QPI Sequence Command 17 Figure Reset QPI Mode Command 18 Figure Fast QPI Read Mode FASTRDQ Command EBH 18 COMMAND 19 Table Command 19 Write Enable 21 Write Disable 21 Read Identification 21 Read Status Register 21 Figure Program/ Erase flow with read array 22 Figure Program/ Erase flow without read array data read P_FAIL/E_FAIL 23 Figure WRSR 24 Table Status 25 Write Status Register 26 Table Protection 26 Read Data Bytes 27 Read Data Bytes at Higher Speed 27 2 x I/O Read Mode 28 4 x I/O Read Mode 28 Burst 29 Table Wrap Around Definition 29 Figure SPI 29 Figure QPI 29

P/N PM1472

MX25U3235E

Performance Enhance 30 Performance Enhance Mode Reset 30 Sector Erase 30 Block Erase 31 Block Erase 31 Chip Erase 31 Page Program 32 4 x I/O Page Program 32 Deep Power-down 33 Release from Deep Power-down RDP , Read Electronic Signature 33 Read Electronic Manufacturer ID & Device ID 34 QPI ID Read 34

Table ID Definitions 34 Enter Secured OTP 35 Exit Secured OTP 35 Read Security Register 35

Table Security Register 36 Write Security Register 36 Write Protection Selection 37

Figure BP and SRWD if 37 Figure The individual block lock mode is effective after setting 38 Figure WPSEL 39 Single Block Lock/Unlock Protection 40 Figure Block Lock 40 Figure Block Unlock 41 Read Block Lock Status 42 Gang Block Lock/Unlock 42 Program/Erase 42 Erase 43 Program 43 44 No Operation 44 Software Reset-Enable RSTEN and Reset 44 Reset Quad I/O 44 Read SFDP Mode 45 Figure Read Serial Flash Discoverable Parameter RDSFDP 45 Table Signature and Parameter Identification Data 46 Table Parameter Table 0 JEDEC Flash Parameter 47 Table Parameter Table 1 Macronix Flash Parameter 49 POWER-ON 51

P/N PM1472

MX25U3235E

ELECTRICAL 52 Absolute Maximum 52 Figure Maximum Negative Overshoot 52 Figure Maximum Positive Overshoot 52 Figure Input Test Waveforms and Measurement 53 Figure Output 53 Table DC 54 Table AC 55

Timing 56 Figure Serial Input 56 Figure Output 56 Figure WP# Setup Timing and Hold Timing during WRSR when 57 Figure Write Enable WREN Sequence Command 06 SPI 57 Figure Write Enable WREN Sequence Command 06 QPI 57 Figure Write Disable WRDI Sequence Command 04 SPI 58 Figure Write Disable WRDI Sequence Command 04 QPI 58 Figure Read Identification RDID Sequence Command 9F SPI mode 58 Figure Read Status Register RDSR Sequence Command 05 SPI 59 Figure Read Status Register RDSR Sequence Command 05 QPI 59 Figure Write Status Register WRSR Sequence Command 01 SPI 59 Figure Write Status Register WRSR Sequence Command 01 QPI 60 Figure Read Data Bytes READ Sequence Command 03 SPI Mode only 33MHz ............................. 60 Figure Read at Higher Speed FAST_READ Sequence Command 0B SPI Mode 104MHz .............. 61 Figure Read at Higher Speed FAST_READ Sequence Command 0B QPI Mode 84MHz ................ 61 Figure 2 x I/O Read Mode Sequence Command BB SPI Mode only 62 Figure 4 x I/O Read Mode Sequence Command EB SPI Mode 62 Figure 4 x I/O Read enhance performance Mode Sequence Command EB SPI Mode 104MHz ......... 63 Figure 4 x I/O Read enhance performance Mode Sequence Command EB QPI Mode 104MHz ........ 64 Figure Page Program PP Sequence Command 02 SPI 64 Figure Page Program PP Sequence Command 02 QPI 65 Figure 4 x I/O Page Program 4PP Sequence Command 38 SPI Mode 65 Figure Sector Erase SE Sequence Command 20 SPI 66 Figure Sector Erase SE Sequence Command 20 QPI 66 Figure Block Erase 32KB BE32K Sequence Command 52 SPI 66 Figure Block Erase 32KB BE32K Sequence Command 52 QPI 66 Figure Block Erase BE Sequence Command D8 SPI 67 Figure Block Erase BE Sequence Command D8 QPI 67 Figure Chip Erase CE Sequence Command 60 or C7 SPI 67 Figure Chip Erase CE Sequence Command 60 or C7 QPI 67

P/N PM1472

MX25U3235E
P/N PM1472

MX25U3235E
32M-BIT [x 1/x 2/x 4] 1.8V CMOS SERIAL MULTI I/O FLASH MEMORY

GENERAL
• Serial Peripheral Interface compatible -- Mode 0 and Mode 3
• 32,554,432 x 1 bit structure or 16,777,216 x 2 bits two I/O read mode structure or 8,388,608 x 4 bits four I/O
read mode structure
• Equal Sectors with 4K byte each, or Equal Blocks with 32K byte each or Equal Blocks with 64K byte each
- Any Block can be erased individually
• Single Power Supply Operation
- to volt for read, erase, and program operations
• Latch-up protected to 100mA from -1V to Vcc +1V
• Low Vcc write inhibit is from 1.0V to 1.4V

PERFORMANCE
• High Performance
- Fast read for SPI mode - 1 I/O 104MHz with 8 dummy cycles - 2 I/O 84MHz with 4 dummy cycles, equivalent to 168MHz - 4 I/O 104MHz with 6 dummy cycles, equivalent to 416MHz
- Fast read for QPI mode - 4 I/O 84MHz with 4 dummy cycles, equivalent to 336MHz - 4 I/O 104MHz with 6 dummy cycles, equivalent to 416MHz
- Fast program time 1.2ms typ. and 3ms max. /page 256-byte per page - Byte program time 10us typical - 8/16/32/64 byte Wrap-Around Burst Read Mode - Fast erase time 45ms typ. /sector 4K-byte per sector 250ms typ. /block 32K-byte per block 500ms typ. / block 64K-byte per block 18s typ. /chip
• Low Power Consumption - Low active read current 20mA max. at 104MHz, 15mA max. at 84MHz - Low active erase/programming current 20mA typ. - Standby current 25uA typ.
• Deep Power Down 2uA typ.
• Typical 100,000 erase/program cycles
• 20 years data retention

SOFTWARE FEATURES
• Input Data Format
- 1-byte Command code
• Advanced Security Features
- Block lock protection The BP0-BP3 status bit defines the size of the area to be software protection against program and erase instructions - Additional 4k-bit secured OTP for unique identifier
• Auto Erase and Auto Program Algorithm
- Automatically erases and verifies data at selected sector or block

P/N PM1472

MX25U3235E
- Automatically programs and verifies data at selected page by an internal algorithm that automatically times the
program pulse widths Any page to be programed should have page in the erased state first
• Status Register Feature
• Command Reset
• Program/Erase Suspend
• Electronic Identification
- JEDEC 1-byte manufacturer ID and 2-byte device ID
- RES command for 1-byte Device ID - REMS command for 1-byte manufacturer ID and 1-byte device ID
• Support Serial Flash Discoverable Parameters SFDP mode

HARDWARE FEATURES
• SCLK Input
- Serial clock input
• SI/SIO0
- Serial Data Input or Serial Data Input/Output for 2 x I/O read mode and 4 x I/O read mode
• SO/SIO1
- Serial Data Output or Serial Data Input/Output for 2 x I/O read mode and 4 x I/O read mode
• WP#/SIO2
- Hardware write protection or serial data Input/Output for 4 x I/O read mode
• NC/SIO3
- NC pin or Serial input & Output for 4 x I/O read mode
• PACKAGE - 8-pin SOP 200mil - 8-land WSON 6x5mm
- All devices are RoHS Compliant and Halogen-free

P/N PM1472

MX25U3235E

The MX25U3235E are 32,554,432 bit serial Flash memory, which is configured as 4,194,304 x 8 internally. When it is in two or four I/O read mode, the structure becomes 16,777,216 bits x 2 or 8,388,608 bits x MX25U3235E feature a serial peripheral interface and software protocol allowing operation on a simple 3-wire bus while it is in single I/O mode. The three bus signals are a clock input SCLK , a serial data input SI , and a serial data output SO . Serial access to the device is enabled by CS# input.

When it is in two I/O read mode, the SI pin and SO pin become SIO0 pin and SIO1 pin for address/dummy bits input and data output. When it is in four I/O read mode, the SI pin, SO pin and WP# pin become SIO0 pin, SIO1 pin, SIO2 pin and SIO3 pin for address/dummy bits input and data output.

The MX25U3235E Serial Multi I/O provides sequential read operation on whole chip.

After program/erase command is issued, auto program/ erase algorithms which program/ erase and verify the specified page or sector/block locations will be executed. Program command is executed on byte basis, or page 256 bytes basis, or word basis for erase command is executed on sector 4K-byte , block 32K-byte , or block 64K-byte , or whole chip basis.

To provide user with ease of interface, a status register is included to indicate the status of the chip. The status read command can be issued to detect completion status of a program or erase operation via WIP bit.

Advanced security features enhance the protection and security functions, please see security features section for more details.

When the device is not in operation and CS# is high, it is put in standby mode and typically draws 30uA DC current.

The MX25U3235E utilizes Macronix's proprietary memory cell, which reliably stores memory contents even after 100,000 program and erase cycles.

P/N PM1472

MX25U3235E

Table Additional Feature Comparison
ORDERING INFORMATION

Clock MHz

MX25U3235EM2I-10G

MX25U3235EZNI-10G

MX25U3235E

Temperature -40°C~85°C
-40°C~85°C

Package 8-SOP 200mil
8-WSON 6x5mm

Remark

P/N PM1472

MX25U3235E

PART NAME DESCRIPTION

MX 25 U 3235E M2 I

OPTION G RoHS Compliant and Halogen-free

SPEED 10 104MHz

TEMPERATURE RANGE I Industrial -40°C to 85°C

PACKAGE M2 200mil 8-SOP

ZN 8-WSON

DENSITY & MODE 3235E 32Mb

TYPE U 1.8V

DEVICE 25 Serial Flash

P/N PM1472

PACKAGE INFORMATION

MX25U3235E

P/N PM1472

MX25U3235E

P/N PM1472

MX25U3235E

Added MXSMIOTM logo and 4 I/O 104MHz specifications

Page P6

Date JUL/24/2009

Take out 8WSON and 200mil 8-SOP package outline

Added software reset

Corrected supporting instructions

Modified dummy cycle numbers from 2 to 4

Added QPI, Write suspend/resume commands

Added QPI operations in the command descriptions

AC/DC modifications Write suspend features modify

P6,38,39,45

Updated SPI & QPI commands & descriptions
Added Read SFDP RDSFDP Mode

P7,17,20, FEB/10/2012

P46~55,60

Modified Program/Erase Suspend/Resume latency

P43~44,80 NOV/07/2012

Modified content and descriptions

P18,23~25,33

P43~44,64,76

Modified tCLQX value in AC Characteristics Table

DEC/12/2012

Modified Data Retention value

P6,79

MAY/03/2013

Modified tCH, tCL and its value in AC Characteristics Table

Modified Features Page to sync with AC Characteristics Table P6

Correct Symbol in Reset Sequence QPI mode Figure

Removed MX25U1635E

Updated parameters for DC/AC Characteristics

P6,54,55 NOV/11/2013

Updated Erase and Programming Performance

P6,79

Modified VCC to Ground Potential

P/N PM1472

MX25U3235E

Except for customized products which has been expressly identified in the applicable agreement, Macronix's products are designed, developed, and/or manufactured for ordinary business, industrial, personal, and/or household applications only, and not for use in any applications which may, directly or indirectly, cause death, personal injury, or severe property damages. In the event Macronix products are used in contradicted to their target usage above, the buyer shall take any and all actions to ensure said Macronix's product qualified for its actual use in accordance with the applicable laws and regulations and Macronix as well as it’s suppliers and/or distributors shall be released from any and all liability arisen therefrom. Copyright Macronix International Co., Ltd. All rights reserved, including the trademarks and tradename thereof, such as Macronix, MXIC, MXIC Logo, MX Logo, Integrated Solutions Provider, NBit, Nbit, NBiit, Macronix NBit, eLiteFlash, HybridNVM, HybridFlash, XtraROM, Phines, KH Logo, BE-SONOS, KSMC, Kingtech, MXSMIO, Macronix vEE, Macronix MAP, Rich io, Rich Book, Rich TV, and FitCAM. The names and brands of third party referred thereto if any are for identification purposes only. For the contact and order information, please visit Macronix’s Web site at:

MACRONIX INTERNATIONAL CO., LTD. reserves the right to change product and specifications without notice. 86

Notice: we do not provide any warranties that information, datasheets, application notes, circuit diagrams, or software stored on this website are up-to-date or error free. The archived MX25U3235EM2I-10G Datasheet file may be downloaded here without warranties.

Datasheet ID: MX25U3235EM2I-10G 646949