MX25U2033E
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MX25U2033EM1I-12G (pdf) |
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MX25U2033EZNI-12G |
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MX25U2033EZUI-12G |
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MX25U2033E MX25U2033E DATASHEET P/N PM1743 MX25U2033E Contents 5 GENERAL 6 Table Additional Feature 7 PIN CONFIGURATIONS 8 PIN 8 BLOCK 9 DATA 10 Table Protected Area 11 Table 4K-bit Secured OTP 11 MEMORY 12 Table Memory 12 DEVICE 13 Figure Serial Modes 13 HOLD 14 Figure Hold Condition Operation 14 COMMAND 15 Table Command 15 Write Enable 17 Write Disable 17 Read Identification 17 Read Status Register 17 Table Status 21 Write Status Register 22 Table Protection 22 Read Data Bytes 23 Read Data Bytes at Higher Speed 23 2 x I/O Read Mode 23 4 x I/O Read Mode 24 Performance Enhance 25 Sector Erase 25 Block Erase 26 Block Erase 26 Chip Erase 26 Page Program 27 4 x I/O Page Program 27 Deep Power-down 27 Release from Deep Power-down RDP , Read Electronic Signature 28 Read Electronic Manufacturer ID & Device ID REMS , REMS2 , 28 Table ID Definitions 29 P/N PM1743 MX25U2033E Enter Secured OTP 29 Exit Secured OTP 29 Read Security Register 29 Table Security Register 30 Write Security Register 30 Write Protection Selection 30 Figure WPSEL 31 Single Block Lock/Unlock Protection 32 Figure Block Lock 32 Figure Block Unlock 33 Read Block Lock Status 34 Gang Block Lock/Unlock 34 Read SFDP Mode 35 Figure Read Serial Flash Discoverable Parameter RDSFDP 35 Table Signature and Parameter Identification Data Values 36 Table Parameter Table 0 JEDEC Flash Parameter 37 Table Parameter Table 1 Macronix Flash Parameter 39 POWER-ON 41 ELECTRICAL 42 Absolute Maximum 42 Figure Maximum Negative Overshoot 42 Figure Maximum Positive Overshoot 42 Figure Input Test Waveforms and Measurement 43 Figure Output 43 Table DC 44 Table AC 45 TIMING 46 Figure Serial Input 46 Figure Output 46 Figure WP# Setup Timing and Hold Timing during WRSR when 47 Figure Write Enable WREN Sequence Command 47 Figure Write Disable WRDI Sequence Command 48 Figure Read Identification RDID Sequence Command 9F 48 Figure Read Status Register RDSR Sequence Command 05 48 Figure Write Status Register WRSR Sequence Command 49 Figure Read Data Bytes READ Sequence Command 03 49 Figure Read at Higher Speed FAST_READ Sequence Command 0B 50 Figure 2 x I/O Read Mode Sequence Command 50 Figure 4 x I/O Read Mode Sequence Command EB 51 Figure 4 x I/O Read Enhance Performance Mode Sequence Command EB ................................... 52 P/N PM1743 MX25U2033E P/N PM1743 MX25U2033E 2M-BIT [x 1/x 2/x 4] 1.8V CMOS SERIAL MULTI I/O FLASH MEMORY GENERAL • Single Power Supply Operation - to volt for read, erase, and program operations • Serial Peripheral Interface compatible -- Mode 0 and Mode 3 • 2,097,152 x 1 bits structure or 1,048,576 x 2 bits Two I/O read mode structure or 524,288 x 4 bits Four I/O read mode structure • 64 Equal Sectors with 4K byte each - Any Sector can be erased individually • 8 Equal Blocks with 32K byte each - Any Block can be erased individually • 4 Equal Blocks with 64K byte each - Any Block can be erased individually • Program Capability - Byte base - Page base 256 bytes • Latch-up protected to 100mA from -1V to Vcc +1V PERFORMANCE • High Performance - Fast read - 1 I/O 80MHz with 8 dummy cycles - 2 I/O 80MHz with 4 dummy cycles, equivalent to 160MHz - 4 I/O 70MHz with 6 dummy cycles, equivalent to 280MHz; - Fast program time 1.2ms typ. and 3ms max. /page 256-byte per page - Byte program time 10us typ. - Fast erase time - 30ms typ. and 200ms max. /sector 4K-byte per sector - 200ms typ. and 1000ms max. /block 32K-byte per block - 500ms typ. and 2000ms max. /block 64K-byte per block - 1.25.s typ. and 2.5s max. /chip • Low Power Consumption - Low active read current 12mA max. at 80MHz, 7mA max. at 33MHz - Low active erase/programming current 25mA max. - Low standby current 8uA typ. /30uA max. • Low Deep Power Down current 8uA max. • Typical 100,000 erase/program cycles • 20 years data retention SOFTWARE FEATURES • Input Data Format - 1-byte Command code • Advanced Security Features - Block lock protection The BP0-BP2 status bit defines the size of the area to be software protection against program and erase instructions - Additional 4K-bit secured OTP for unique identifier • Auto Erase and Auto Program Algorithm - Automatically erases and verifies data at selected sector or block - Automatically programs and verifies data at selected page by an internal algorithm that automatically times the program pulse widths Any page to be programed should have page in the erased state first . P/N PM1743 MX25U2033E • Status Register Feature • Electronic Identification - JEDEC 1-byte manufacturer ID and 2-byte device ID - RES command for 1-byte Device ID - REMS, REMS2 and REMS4 commands for 1-byte manufacturer ID and 1-byte device ID • Support Serial Flash Discoverable Parameters SFDP mode HARDWARE FEATURES • SCLK Input - Serial clock input • SI/SIO0 - Serial Data Input or Serial Data Input/Output for 2 x I/O read mode and 4 x I/O read mode • SO/SIO1 - Serial Data Output or Serial Data Input/Output for 2 x I/O read mode and 4 x I/O read mode • WP#/SIO2 - Hardware write protection or serial data Input/Output for 4 x I/O read mode • HOLD#/SIO3 - HOLD feature, to pause the device without deselecting the device or serial data Input/Output for 4 x I/O read mode • PACKAGE - 8-pin SOP 150mil - 8-land USON 4x4mm - 8-land WSON 6x5mm - 8-WLCSP - All devices are RoHS Compliant and Halogen-free The MX25U2033E is 2,097,152 bit serial Flash memory, which is configured as 1,048,576 x 2 internally. The MX25U2033E features a serial peripheral interface and software protocol allowing operation on a simple 4-wire bus while it is in single I/O mode. The four bus signals are a clock input SCLK , a serial data input SI , a serial data output SO and a chip select CS# . Serial access to the device is enabled by CS# input. When it is in two I/O read mode, the SI pin and SO pin become SIO0 pin and SIO1 pin for address/dummy bits input and data output. When it is in four I/O read mode, the SI pin, SO pin, WP# pin and HOLD# pin become SIO0 pin, SIO1 pin, SIO2 pin and SIO3 pin for address/dummy bits input and data output. The MX25U2033E Serial Multi I/O provides sequential read operation on the whole chip. After program/erase command is issued, auto program/erase algorithms which program/erase and verify the specified page or sector/block locations will be executed. Program command is executed on byte basis, or page 256 bytes basis. Erase command is executed on 4K-byte sector, 32K-byte block, or 64K-byte block, or whole chip P/N PM1743 MX25U2033E basis. To provide user with ease of interface, a status register is included to indicate the status of the chip. The status read command can be issued to detect completion status of a program or erase operation via the WIP bit. Advanced security features enhance the protection and security functions, please see security features section for more details. When the device is not in operation and CS# is high, it is put in standby mode and typically draws 25uA DC current. The MX25U2033E utilizes Macronix's proprietary memory cell, which reliably stores memory contents even after 100,000 program and erase cycles. Table Additional Feature Comparison Protection and Security Read Performance Additional Features Flexible ORDERING INFORMATION CLOCK MHz MX25U2033EM1I-12G MX25U2033EZUI-12G MX25U2033EZNI-12G MX25U2033EBAI-12G TEMPERATURE -40°C~85°C -40°C~85°C -40°C~85°C -40°C~85°C MX25U2033E PACKAGE 8-SOP 150mil 8-USON 4x4mm 8-WSON 6x5mm 8-WLCSP Remark P/N PM1743 MX25U2033E PART NAME DESCRIPTION MX 25 U 2033E M1 I OPTION G RoHS Compliant and Halogen-free SPEED 12 80MHz TEMPERATURE RANGE I Industrial -40°C to 85°C PACKAGE M1 150mil 8-SOP ZU 8-USON ZN 8-WSON BA 8-WLCSP DENSITY & MODE 2033E 2Mb TYPE U 1.8V DEVICE 25 Serial Flash P/N PM1743 PACKAGE INFORMATION MX25U2033E P/N PM1743 MX25U2033E P/N PM1743 MX25U2033E P/N PM1743 MX25U2033E Please contact local Macronix sales channel for complete package dimensions. P/N PM1743 67 MX25U2033E Initial released Page All Date NOV/10/2011 Added "Advanced Information" for P/N *MX25U2033EZUI-12G P56 FEB/24/2012 Added SFDP content |
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