MX25L6435E
Part | Datasheet |
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MX25L6435EXCI-10G (pdf) |
Related Parts | Information |
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MX25L6435EMI-10G |
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MX25L6435EM2I-10G |
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MX25L6435EZNI-10G |
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MX25U6435EZNI-10G |
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MX25L6435E MX25L6435E HIGH PERFORMANCE SERIAL FLASH SPECIFICATION P/N PM1784 MX25L6435E Contents 4 GENERAL 6 Table Read PIN 7 PIN 7 BLOCK 8 DATA 9 Table Protected Area Table 4K-bit Secured OTP 11 MEMORY 12 Table Memory DEVICE 13 HOLD 14 COMMAND 15 Table Command Write Enable Write Disable Read Identification Read Status Register Write Status Register Table Protection Read Data Bytes Read Data Bytes at Higher Speed Dual Read Mode 2 x I/O Read Mode Quad Read Mode 4 x I/O Read Mode Performance Enhance Performance Enhance Mode Reset Sector Erase Block Erase Block Erase Chip Erase Page Program 4 x I/O Page Program Continuous Program mode CP Deep Power-down Release from Deep Power-down RDP , Read Electronic Signature Read Electronic Manufacturer ID & Device ID REMS , REMS2 , ID Table ID Definitions Enter Secured OTP Exit Secured OTP Read Security Register Table Security Register P/N PM1784 MX25L6435E Write Security Register Write Protection Selection Single Block Lock/Unlock Protection Read Block Lock Status Gang Block Lock/Unlock Enable SO to Output RY/BY# Disable SO to Output RY/BY# No Operation Software Reset-Enable RSTEN and Reset Read SFDP Mode P/N PM1784 ADVANCED INFORMATION MX25L6435E 64M-BIT [x 1/x 2/x 4] CMOS MXSMIOTM SERIAL MULTI I/O FLASH MEMORY GENERAL • Serial Peripheral Interface compatible -- Mode 0 and Mode 3 • 67,108,864 x 1 bit structure or 33,554,432 x 2 bits two I/O mode structure or 16,777,216 x 4 bits four I/O mode structure • 2048 Equal Sectors with 4K bytes each - Any Sector can be erased individually • 256 Equal Blocks with 32K bytes each - Any Block can be erased individually • 128 Equal Blocks with 64K bytes each - Any Block can be erased individually • Power Supply Operation - to volt for read, erase, and program operations • Latch-up protected to 100mA from -1V to Vcc +1V PERFORMANCE • High Performance VCC = 2.7~3.6V - Normal read - 50MHz - Fast read - 1 I/O 104MHz with 8 dummy cycles - 2 I/O 86MHz with 4 dummy cycles for 2READ instruction - 4 I/O Up to 104MHz - Configurable dummy cycle number for 4 I/O read operation - Fast program time 1.4ms typ. and 5ms max. /page 256-byte per page - Byte program time 12us typical - Continuous Program mode automatically increase address under word program mode - Fast erase time 60ms typ. /sector 4K-byte per sector 0.7s typ. /block 64K-byte per block 50s typ. / chip • Low Power Consumption - Low active read current 19mA max. at 104MHz, 10mA max. at 33MHz - Low active programming current 25mA max. - Low active erase current 25mA max. - Low standby current 50uA max. - Deep power down current 20uA max. • Typical 100,000 erase/program cycles • 20 years data retention P/N PM1784 MX25L6435E SOFTWARE FEATURES • Input Data Format - 1-byte Command code • Advanced Security Features - BP0-BP3 block group protect - Flexible individual block protect when OTP WPSEL=1 - Additional 4K bits secured OTP for unique identifier • Auto Erase and Auto Program Algorithms - Automatically erases and verifies data at selected sector - Automatically programs and verifies data at selected page by an internal algorithm that automatically times the program pulse width Any page to be programmed should have page in the erased state first. • Status Register Feature • Electronic Identification - JEDEC 1-byte Manufacturer ID and 2-byte Device ID - RES command for 1-byte Device ID - The REMS,REMS2, REMS4 commands for 1-byte Manufacturer ID and 1-byte Device ID • Support Serial Flash Discoverable Parameters SFDP mode HARDWARE FEATURES • SCLK Input - Serial clock input • SI/SIO0 - Serial Data Input or Serial Data Input/Output for 2 x I/O mode and 4 x I/O mode • SO/SIO1 - Serial Data Output or Serial Data Input/Output for 2 x I/O mode and 4 x I/O mode • WP#/SIO2 - Hardware write protection or serial data Input/Output for 4 x I/O mode • HOLD#/SIO3 - To pause the device without deselecting the device or serial data Input/Output for 4 x I/O mode • PACKAGE - 16-pin SOP 300mil - 8-pin SOP 200mil - 8-WSON 6x5mm - All devices are RoHS Compliant P/N PM1784 MX25L6435E MX25L6435E is 64Mb bits serial Flash memory, which is configured as 8,388,608 x 8 internally. When it is in two or four I/O mode, the structure becomes 33,554,432 bits x 2 or 16,777,216 bits x MX25L6435E feature a serial peripheral interface and software protocol allowing operation on a simple 3-wire bus while it is in single I/O mode. The three bus signals are a clock input SCLK , a serial data input SI , and a serial data output SO . Serial access to the device is enabled by CS# input. MX25L6435E, MXSMIOTM Serial Multi I/O flash memory, provides sequential read operation on whole chip and multi-I/O features. When it is in dual I/O mode, the SI pin and SO pin become SIO0 pin and SIO1 pin for address/dummy bits input and data output. When it is in quad I/O mode, the SI pin, SO pin, WP# pin and HOLD# pin become SIO0 pin, SIO1 pin, SIO2 pin and SIO3 pin for address/dummy bits input and data Input/Output. After program/erase command is issued, auto program/ erase algorithms which program/ erase and verify the specified page or sector/block locations will be executed. Program command is executed on byte basis, or page 256 bytes basis, or word basis for Continuous Program mode, and erase command is executed on sector 4K-byte , block 32K-byte/64K-byte , or whole chip basis. ORDERING INFORMATION CLOCK MHz MX25L6435EMI-10G MX25L6435EM2I-10G MX25L6435EZNI-10G TEMPERATURE -40°C~85°C -40°C~85°C -40°C~85°C PACKAGE 16-SOP 300mil 8-SOP 200mil 8-WSON 6x5mm Remark P/N PM1784 MX25L6435E PART NAME DESCRIPTION MX 25 L 6435E M2 I OPTION G RoHS Compliant SPEED 10 104MHz TEMPERATURE RANGE I Industrial -40° C to 85° C PACKAGE M 300mil 16-SOP M2 200mil 8-SOP ZN 6x5mm 8-WSON DENSITY & MODE 6435E 64Mb standard type TYPE L 3V DEVICE 25 Serial Flash P/N PM1784 PACKAGE INFORMATION MX25L6435E P/N PM1784 MX25L6435E P/N PM1784 MX25L6435E P/N PM1784 MX25L6435E Initial release Modify TCLQV to 6ns max. in 2 I/O & 4 I/O modes for both 15pF & 10pF Loading Remove FREAD function Add DC Dummy Cycle configuration register that Dummy clock cycles are configurable for 4 I/O read operation. Modify Additional Feature table to Read Performance table Modify Package Code from "Z3" to "ZN" without any physical change. Add 300 mil 16-SOP package Added SFDP content Page All P68 |
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