MX25L6406EMBI-12G

MX25L6406EMBI-12G Datasheet

MX25L6406E

Part	Datasheet
MX25L6406EMBI-12G	MX25L6406EMBI-12G (pdf)

Related Parts	Information
MX25L6406EZ3I-12G	MX25L6406EZ3I-12G

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MX25L6406E MX25L6406E DATASHEET P/N PM1577 MX25L6406E Contents 5 GENERAL 6 PIN CONFIGURATIONS 7 PIN 7 BLOCK 8 MEMORY 9 Table Memory 9 DEVICE 10 Figure Serial Modes 10 DATA 11 Table Protected Area 12 Table 512 bit Secured OTP 12 HOLD 13 Figure Hold Condition Operation 13 COMMAND 14 Table COMMAND 14 1 Write Enable 15 2 Write Disable 15 3 Read Status Register 15 4 Write Status Register 16 Table Protection 17 5 Read Data Bytes 18 6 Read Data Bytes at Higher Speed 18 7 Dual Output Mode 18 8 Sector Erase 18 9 Block Erase 19 10 Chip Erase 19 11 Page Program 19 12 Deep Power-down 20 13 Release from Deep Power-down RDP , Read Electronic Signature RES 20 14 Read Identification 21 15 Read Electronic Manufacturer ID & Device ID 21 Table ID DEFINITIONS 22 16 Enter Secured OTP 22 17 Exit Secured OTP 22 18 Read Security Register 23 Table SECURITY REGISTER 23 19 Write Security Register 23 P/N PM1577 MX25L6406E POWER-ON 24 ELECTRICAL 25 ABSOLUTE MAXIMUM 25 Figure 3.Maximum Negative Overshoot 25 CAPACITANCE TA = 25°C, f = 25 Figure Maximum Positive Overshoot 25 Figure INPUT TEST WAVEFORMS AND MEASUREMENT 26 Figure OUTPUT 26 Table DC 27 Table AC 28 Timing 29 Figure Serial Input 29 Figure Output 29 Figure Hold 30 Figure WP# Disable Setup and Hold Timing during WRSR when 30 Figure Write Enable WREN Sequence Command 31 Figure Write Disable WRDI Sequence Command 31 Figure Read Status Register RDSR Sequence Command 32 Figure Write Status Register WRSR Sequence Command 32 Figure Read Data Bytes READ Sequence Command 32 Figure Read at Higher Speed FAST_READ Sequence Command 33 Figure Dual Output Read Mode Sequence Command 34 Figure Sector Erase SE Sequence Command 34 Figure Block Erase BE Sequence Command 52 or 34 Figure Chip Erase CE Sequence Command 60 or 35 Figure Page Program PP Sequence Command 35 Figure Deep Power-down DP Sequence Command 36 Figure Release from Deep Power-down RDP Sequence Command 36 Figure Release from Deep Power-down and Read Electronic Signature RES Sequence Command AB .36 Figure Read Identification RDID Sequence Command 37 Figure Read Electronic Manufacturer & Device ID REMS Sequence Command 37 Figure Read Security Register RDSCUR Sequence Command 38 Figure Write Security Register WRSCUR Sequence Command 38 Figure Program/ Erase flow with read array 39 Figure Power-up 40 Table Power-Up Timing 40 OPERATING 41 Figure AC Timing at Device 41 Figure Power-Down 42 P/N PM1577 MX25L6406E P/N PM1577 MX25L6406E 64M-BIT [x 1 / x 2] CMOS SERIAL FLASH GENERAL • Single Power Supply Operation - to volt for read, erase, and program operations • Serial Peripheral Interface compatible -- Mode 0 and Mode 3 • 67,108,864 x 1 bit structure or 33,554,432 x 2 bits Dual Output mode structure • 2048 Equal Sectors with 4K byte each - Any Sector can be erased individually • 128 Equal Blocks with 64K byte each - Any Block can be erased individually • Program Capability - Byte base - Page base 256 bytes • Latch-up protected to 100mA from -1V to Vcc +1V PERFORMANCE • High Performance - Fast access time 86MHz serial clock - Serial clock of Dual Output mode 80MHz - Fast program time 1.4ms typ. and 5ms max. /page - Byte program time 9us typical - Fast erase time 60ms typ. /sector 0.7s typ. /block • Low Power Consumption - Low active read current 25mA max. at 86MHz - Low active programming current 20mA max. - Low active erase current 20mA max. - Low standby current 50uA max. - Deep power-down mode 5uA typical • Typical 100,000 erase/program cycles • 20 years of data retention SOFTWARE FEATURES • Input Data Format - 1-byte Command code • Advanced Security Features - Block lock protection The BP3~BP0 status bit defines the size of the area to be software protection against program and erase instructions - Additional 512 bit secured OTP for unique identifier • Auto Erase and Auto Program Algorithm - Automatically erases and verifies data at selected sector - Automatically programs and verifies data at selected page by an internal algorithm that automatically times the program pulse widths Any page to be programed should have page in the erased state first P/N PM1577 • Status Register Feature • Electronic Identification - JEDEC 1-byte manufacturer ID and 2-byte device ID - RES command for 1-byte Device ID - REMS commands for 1-byte manufacturer ID and 1-byte device ID HARDWARE FEATURES • PACKAGE - 16-pin SOP 300mil - 8-pin SOP 200mil - 8-land WSON 8x6mm - All Pb-free devices are RoHS Compliant MX25L6406E The device feature a serial peripheral interface and software protocol allowing operation on a simple 3-wire bus. The three bus signals are a clock input SCLK , a serial data input SI , and a serial data output SO . Serial access to the device is enabled by CS# input. When it is in Dual Output read mode, the SI and SO pins become SIO0 and SIO1 pins for data output. The device provides sequential read operation on whole chip. After program/erase command is issued, auto program/ erase algorithms which program/ erase and verify the specified page or sector/block locations will be executed. Program command is executed on byte basis, or page basis, or word basis for erase command is executes on sector, or block, or whole chip basis. To provide user with ease of interface, a status register is included to indicate the status of the chip. The status read command can be issued to detect completion status of a program or erase operation via WIP bit. Advanced security features enhance the protection and security functions, please see security features section for more details. When the device is not in operation and CS# is high, it is put in standby mode. The device utilizes Macronix's proprietary memory cell, which reliably stores memory contents even after typical 100,000 program and erase cycles. P/N PM1577 PIN CONFIGURATIONS 16-PIN SOP 300mil HOLD# 1 VCC 2 NC 3 NC 4 NC 5 NC 6 CS# 7 SO/SIO1 8 16 SCLK 15 SI/SIO0 14 NC 13 NC 12 NC 11 NC 10 GND 9 WP# 8-LAND WSON 8x6mm CS# 1 SO/SIO1 2 WP# 3 GND 4 8 VCC 7 HOLD# 6 SCLK 5 SI/SIO0 MX25L6406E 8-PIN SOP 200mil CS# 1 SO/SIO1 2 ORDERING INFORMATION CLOCK MHz OPERATING CURRENT MAX. mA MX25L6406EMI-12G STANDBY CURRENT MAX. uA MX25L6406EM2I-12G MX25L6406EZNI-12G Temperature -40°C~85°C -40°C~85°C -40°C~85°C PACKAGE 16-SOP 300mil 8-SOP 200mil 8-WSON 8x6mm Remark Pb-free Pb-free Pb-free P/N PM1577 MX25L6406E PART NAME DESCRIPTION MX 25 L 6406E ZN I OPTION G Pb-free SPEED 12 86MHz TEMPERATURE RANGE I Industrial -40°C to 85°C PACKAGE ZN WSON 0.8mm package height M 300mil 16-SOP M2 200mil 8-SOP DENSITY & MODE 6406E 64Mb TYPE L 3V DEVICE 25 Serial Flash P/N PM1577 PACKAGE INFORMATION MX25L6406E P/N PM1577 MX25L6406E P/N PM1577 MX25L6406E P/N PM1577 MX25L6406E Modified Figure Block Erase BE Sequence Modified "Initial Delivery State" description Removed DMC sequence description & content table Removed "Advanced Information" Modified ISB1 & ICC5 Added RDSCUR & WRSCUR diagram form Added CS# rising and falling time description Modified tW from 40 typ. /100 max. to 5 typ. /40 max. Modified tCLQV 15pF loading Modified standby current JUL/09/2010

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MX25L6406E

MX25L6406E DATASHEET

P/N PM1577

MX25L6406E

Contents
5 GENERAL 6 PIN CONFIGURATIONS 7 PIN 7 BLOCK 8 MEMORY 9

Table Memory 9 DEVICE 10

Figure Serial Modes 10 DATA 11

Table Protected Area 12 Table 512 bit Secured OTP 12 HOLD 13 Figure Hold Condition Operation 13 COMMAND 14 Table COMMAND 14 1 Write Enable 15 2 Write Disable 15 3 Read Status Register 15 4 Write Status Register 16 Table Protection 17 5 Read Data Bytes 18 6 Read Data Bytes at Higher Speed 18 7 Dual Output Mode 18 8 Sector Erase 18 9 Block Erase 19 10 Chip Erase 19 11 Page Program 19 12 Deep Power-down 20 13 Release from Deep Power-down RDP , Read Electronic Signature RES 20 14 Read Identification 21 15 Read Electronic Manufacturer ID & Device ID 21 Table ID DEFINITIONS 22 16 Enter Secured OTP 22 17 Exit Secured OTP 22 18 Read Security Register 23 Table SECURITY REGISTER 23 19 Write Security Register 23

P/N PM1577

MX25L6406E

POWER-ON 24 ELECTRICAL 25

ABSOLUTE MAXIMUM 25 Figure 3.Maximum Negative Overshoot 25 CAPACITANCE TA = 25°C, f = 25 Figure Maximum Positive Overshoot 25 Figure INPUT TEST WAVEFORMS AND MEASUREMENT 26 Figure OUTPUT 26 Table DC 27 Table AC 28 Timing 29 Figure Serial Input 29 Figure Output 29 Figure Hold 30 Figure WP# Disable Setup and Hold Timing during WRSR when 30 Figure Write Enable WREN Sequence Command 31 Figure Write Disable WRDI Sequence Command 31 Figure Read Status Register RDSR Sequence Command 32 Figure Write Status Register WRSR Sequence Command 32 Figure Read Data Bytes READ Sequence Command 32 Figure Read at Higher Speed FAST_READ Sequence Command 33 Figure Dual Output Read Mode Sequence Command 34 Figure Sector Erase SE Sequence Command 34 Figure Block Erase BE Sequence Command 52 or 34 Figure Chip Erase CE Sequence Command 60 or 35 Figure Page Program PP Sequence Command 35 Figure Deep Power-down DP Sequence Command 36 Figure Release from Deep Power-down RDP Sequence Command 36 Figure Release from Deep Power-down and Read Electronic Signature RES Sequence Command AB .36 Figure Read Identification RDID Sequence Command 37 Figure Read Electronic Manufacturer & Device ID REMS Sequence Command 37 Figure Read Security Register RDSCUR Sequence Command 38 Figure Write Security Register WRSCUR Sequence Command 38 Figure Program/ Erase flow with read array 39 Figure Power-up 40 Table Power-Up Timing 40 OPERATING 41 Figure AC Timing at Device 41 Figure Power-Down 42

P/N PM1577

MX25L6406E
P/N PM1577

MX25L6406E
64M-BIT [x 1 / x 2] CMOS SERIAL FLASH

GENERAL
• Single Power Supply Operation
- to volt for read, erase, and program operations
• Serial Peripheral Interface compatible -- Mode 0 and Mode 3
• 67,108,864 x 1 bit structure or 33,554,432 x 2 bits Dual Output mode structure
• 2048 Equal Sectors with 4K byte each - Any Sector can be erased individually
• 128 Equal Blocks with 64K byte each - Any Block can be erased individually
• Program Capability
- Byte base - Page base 256 bytes
• Latch-up protected to 100mA from -1V to Vcc +1V

PERFORMANCE
• High Performance
- Fast access time 86MHz serial clock - Serial clock of Dual Output mode 80MHz - Fast program time 1.4ms typ. and 5ms max. /page - Byte program time 9us typical - Fast erase time 60ms typ. /sector 0.7s typ. /block
• Low Power Consumption - Low active read current 25mA max. at 86MHz - Low active programming current 20mA max. - Low active erase current 20mA max. - Low standby current 50uA max. - Deep power-down mode 5uA typical
• Typical 100,000 erase/program cycles
• 20 years of data retention

SOFTWARE FEATURES
• Input Data Format
- 1-byte Command code
• Advanced Security Features
- Block lock protection The BP3~BP0 status bit defines the size of the area to be software protection against program and erase instructions - Additional 512 bit secured OTP for unique identifier
• Auto Erase and Auto Program Algorithm
- Automatically erases and verifies data at selected sector - Automatically programs and verifies data at selected page by an internal algorithm that automatically times the
program pulse widths Any page to be programed should have page in the erased state first

P/N PM1577
• Status Register Feature
• Electronic Identification
- JEDEC 1-byte manufacturer ID and 2-byte device ID
- RES command for 1-byte Device ID - REMS commands for 1-byte manufacturer ID and 1-byte device ID

HARDWARE FEATURES
• PACKAGE
- 16-pin SOP 300mil - 8-pin SOP 200mil
- 8-land WSON 8x6mm - All Pb-free devices are RoHS Compliant

MX25L6406E

The device feature a serial peripheral interface and software protocol allowing operation on a simple 3-wire bus. The three bus signals are a clock input SCLK , a serial data input SI , and a serial data output SO . Serial access to the device is enabled by CS# input.

When it is in Dual Output read mode, the SI and SO pins become SIO0 and SIO1 pins for data output.

The device provides sequential read operation on whole chip.

After program/erase command is issued, auto program/ erase algorithms which program/ erase and verify the specified page or sector/block locations will be executed. Program command is executed on byte basis, or page basis, or word basis for erase command is executes on sector, or block, or whole chip basis.

To provide user with ease of interface, a status register is included to indicate the status of the chip. The status read command can be issued to detect completion status of a program or erase operation via WIP bit.

Advanced security features enhance the protection and security functions, please see security features section for more details.

When the device is not in operation and CS# is high, it is put in standby mode.

The device utilizes Macronix's proprietary memory cell, which reliably stores memory contents even after typical 100,000 program and erase cycles.

P/N PM1577

PIN CONFIGURATIONS 16-PIN SOP 300mil

HOLD# 1 VCC 2 NC 3 NC 4 NC 5 NC 6 CS# 7

SO/SIO1 8
16 SCLK 15 SI/SIO0 14 NC 13 NC 12 NC 11 NC 10 GND 9 WP#
8-LAND WSON 8x6mm

CS# 1 SO/SIO1 2

WP# 3 GND 4
8 VCC 7 HOLD# 6 SCLK 5 SI/SIO0

MX25L6406E
8-PIN SOP 200mil

CS# 1 SO/SIO1 2
ORDERING INFORMATION

CLOCK MHz

OPERATING CURRENT MAX. mA

MX25L6406EMI-12G

STANDBY CURRENT MAX. uA

MX25L6406EM2I-12G

MX25L6406EZNI-12G

Temperature -40°C~85°C -40°C~85°C -40°C~85°C

PACKAGE
16-SOP 300mil 8-SOP 200mil 8-WSON 8x6mm

Remark Pb-free Pb-free Pb-free

P/N PM1577

MX25L6406E

PART NAME DESCRIPTION MX 25 L 6406E ZN I

OPTION G Pb-free

SPEED 12 86MHz

TEMPERATURE RANGE I Industrial -40°C to 85°C

PACKAGE ZN WSON 0.8mm package height M 300mil 16-SOP M2 200mil 8-SOP

DENSITY & MODE 6406E 64Mb

TYPE L 3V

DEVICE 25 Serial Flash

P/N PM1577

PACKAGE INFORMATION

MX25L6406E

P/N PM1577

MX25L6406E

P/N PM1577

MX25L6406E

P/N PM1577

MX25L6406E

Modified Figure Block Erase BE Sequence

Modified "Initial Delivery State" description

Removed DMC sequence description & content table

Removed "Advanced Information"

Modified ISB1 & ICC5

Added RDSCUR & WRSCUR diagram form

Added CS# rising and falling time description

Modified tW from 40 typ. /100 max. to 5 typ. /40 max.

Modified tCLQV 15pF loading

Modified standby current

JUL/09/2010

Notice: we do not provide any warranties that information, datasheets, application notes, circuit diagrams, or software stored on this website are up-to-date or error free. The archived MX25L6406EMBI-12G Datasheet file may be downloaded here without warranties.

Datasheet ID: MX25L6406EMBI-12G 646935