MX25L25655FMI-10G

MX25L25655FMI-10G Datasheet

MX25L25655F

Part	Datasheet
MX25L25655FMI-10G	MX25L25655FMI-10G (pdf)

Related Parts	Information
MX25L25655FXCI-10G	MX25L25655FXCI-10G
MX25L25655FXDI-10G	MX25L25655FXDI-10G

PDF Datasheet Preview
MX25L25655F MX25L25655F DATASHEET P/N PM1875 MX25L25655F Contents 4 GENERAL 6 Table Read performance PIN CONFIGURATIONS 7 PIN 7 BLOCK 8 DATA 9 Table Protected Area Table 4K-bit Secured OTP 11 Memory 12 Table Memory DEVICE 13 256Mb Address 15 Quad Peripheral Interface QPI Read 16 COMMAND 17 Table Command Write Enable 22 Write Disable 23 Read Identification 25 Release from Deep Power-down RDP , Read Electronic Signature 26 Read Electronic Manufacturer ID & Device ID 28 QPI ID Read 29 Table ID Definitions Read Status Register 30 Read Configuration Register 31 Write Status Register 37 Table Protection Enter 4-byte mode 41 Exit 4-byte mode 41 Read Data Bytes 42 Read Data Bytes at Higher Speed 43 Dual Output Read Mode 45 2 x I/O Read Mode 46 Quad Read Mode 47 4 x I/O Read Mode 48 4 Byte Address Command 50 Burst 52 Performance Enhance 53 Performance Enhance Mode Reset 56 Fast 58 Sector Erase 61 Block Erase 62 P/N PM1875 MX25L25655F Block Erase 63 Chip Erase 64 Page Program 65 4 x I/O Page Program 67 Deep Power-down 68 Enter Secured OTP 69 Exit Secured OTP 69 Read Security Register 69 Write Security Register 69 Table Security Register Write Protection Selection 71 Advanced Sector 73 Program/Erase 81 Erase 81 Program 81 83 No Operation 83 Software Reset-Enable RSTEN and Reset 83 Read SFDP Mode 85 P/N PM1875 MX25L25655F 3V 256M-BIT [x 1/x 2/x 4] CMOS SERIAL MULTI I/O FLASH MEMORY GENERAL • Serial Peripheral Interface compatible -- Mode 0 and Mode 3 • Single Power Supply Operation - to volt for read, erase, and program operations • 256Mb 268,435,456 x 1 bit structure or 134,217,728 x 2 bits two I/O mode structure or 67,108,864 x 4 bits four I/O mode structure • Protocol Support - Single I/O, Dual I/O and Quad I/O • Latch-up protected to 100mA from -1V to Vcc +1V • Low Vcc write inhibit is from 2.3V to 2.5V • Fast read for SPI mode - Support clock frequency up to 133MHz for all protocols - Support Fast Read, 2READ, DREAD, 4READ, QREAD instructions. - Configurable dummy cycle number for fast read operation • Quad Peripheral Interface QPI available • Equal Sectors with 4K byte each, or Equal Blocks with 32K byte each or Equal Blocks with 64K byte each - Any Block can be erased individually • Programming - 256byte page buffer - Quad Input/Output page program 4PP to enhance program performance • Typical 100,000 erase/program cycles • 20 years data retention SOFTWARE FEATURES • Input Data Format - 1-byte Command code • Advanced Security Features - Block lock protection The BP0-BP3 and T/B status bits define the size of the area to be protected against program and erase instructions - Advanced individual sector protection and permanent lock function Solid and Password Protect - Read Lock • Additional 4K bit security OTP - Features unique identifier - factory locked identifiable, and customer lockable • Command Reset • Program/Erase Suspend and Resume operation • Electronic Identification - JEDEC 1-byte manufacturer ID and 2-byte device ID - RES command for 1-byte Device ID - REMS command for 1-byte manufacturer ID and 1-byte device ID • Support Serial Flash Discoverable Parameters SFDP mode P/N PM1875 MX25L25655F HARDWARE FEATURES • SCLK Input - Serial clock input • SI/SIO0 - Serial Data Input or Serial Data Input/Output for 2 x I/O read mode and 4 x I/O read mode • SO/SIO1 - Serial Data Output or Serial Data Input/Output for 2 x I/O read mode and 4 x I/O read mode • WP#/SIO2 - Hardware write protection or serial data Input/Output for 4 x I/O read mode • RESET#/SIO3 - Hardware Reset pin or Serial input & Output for 4 x I/O read mode • PACKAGE - 16-pin SOP 300mil - 24-ball TFBGA 6x8mm with 4x6 ball array - 24-ball TFBGA 6x8mm with 5x5 ball array - All devices are RoHS Compliant Please contact Macronix sales for specific information regarding this Advanced Security Features P/N PM1875 MX25L25655F MX25L25655F is 256Mb bits serial Flash memory, which is configured as 33,554,432 x 8 internally. When it is in two or four I/O mode, the structure becomes 134,217,728 bits x 2 or 67,108,864 bits x MX25L25655F feature a serial peripheral interface and software protocol allowing operation on a simple 3-wire bus while it is in single I/O mode. The three bus signals are a clock input SCLK , a serial data input SI , and a serial data output SO . Serial access to the device is enabled by CS# input. When it is in two I/O read mode, the SI pin and SO pin become SIO0 pin and SIO1 pin for address/dummy bits input and data output. When it is in four I/O read mode, the SI pin, SO pin, WP# and RESET# pin become SIO0 pin, SIO1 pin, SIO2 pin and SIO3 pin for address/dummy bits input and data output. The MX25L25655F Serial Multi I/O provides sequential read operation on the whole chip. After program/erase command is issued, auto program/ erase algorithms which program/ erase and verify the specified page or sector/block locations will be executed. Program command is executed on byte basis, or page 256 bytes basis, or word basis for erase command is executed on sector 4K-byte , block 32K-byte , or block 64K-byte , or whole chip basis. To provide user with ease of interface, a status register is included to indicate the status of the chip. The status read command can be issued to detect completion status of a program or erase operation via the WIP bit. Advanced security features enhance the protection and security functions, please see security features section for more details. When the device is not in operation and CS# is high, it is put in standby mode. The MX25L25655F utilizes Macronix's proprietary memory cell, which reliably stores memory contents even after 100,000 program and erase cycles. Table Read performance Comparison Numbers of Dummy Cycles Fast Read MHz Dual Output Fast Read ORDERING INFORMATION PART NO. MX25L25655FMI-10G MX25L25655FXCI-10G MX25L25655FXDI-10G CLOCK MHz TEMPERATURE PACKAGE Remark -40°C~85°C 16-SOP 300mil -40°C~85°C 24-TFBGA 4x6 ball array -40°C~85°C 24-TFBGA 5x5 ball array P/N PM1875 MX25L25655F PART NAME DESCRIPTION MX 25 L 25655F M I OPTION G RoHS Compliant SPEED 10 104MHz TEMPERATURE RANGE I Industrial -40°C to 85°C PACKAGE M 16-SOP 300mil XC 24-ball TFBGA 4x6 ball array XD 24-ball TFBGA 5x5 ball array DENSITY & MODE 25655F 256Mb Secured type TYPE L 3V DEVICE 25 Serial Flash P/N PM1875 PACKAGE INFORMATION MX25L25655F P/N PM1875 MX25L25655F P/N PM1875 MX25L25655F P/N PM1875 MX25L25655F Removed "Advanced Information" Added Note RESET# pin has internal pull up Modified Pin Description Modified Read/Write Fast Boot Register Sequence Optimize ISB1 & ISB2 spec Corrected content error OCT/19/2012 P9,16,19,23,30-33, P39,70,71,77,81 P/N PM1875 MX25L25655F Except for customized products which has been expressly identified in the applicable agreement, Macronix's products are designed, developed, and/or manufactured for ordinary business, industrial, personal, and/or household applications only, and not for use in any applications which may, directly or indirectly, cause death, personal injury, or severe property damages. In the event Macronix products are used in contradicted to their target usage above, the buyer shall take any and all actions to ensure said Macronix's product qualified for its actual use in accordance with the applicable laws and regulations and Macronix as well as it’s suppliers and/or distributors shall be released from any and all liability arisen therefrom. Copyright Macronix International Co., Ltd. All rights reserved, including the trademarks and tradename thereof, such as Macronix, MXIC, MXIC Logo, MX Logo, Integrated Solutions Provider, NBit, Nbit, NBiit, Macronix NBit, eLiteFlash, HybridNVM, HybridFlash, XtraROM, Phines, KH Logo, BE-SONOS, KSMC, Kingtech, MXSMIO, Macronix vEE, Macronix MAP, Rich io, Rich Book, Rich TV, and FitCAM. The names and brands of third party referred thereto if any are for identification purposes only. For the contact and order information, please visit Macronix’s Web site at: MACRONIX INTERNATIONAL CO., LTD. reserves the right to change product and specifications without notice. 107

PDF Datasheet Preview

MX25L25655F

MX25L25655F DATASHEET

P/N PM1875

MX25L25655F

Contents
4 GENERAL 6

Table Read performance PIN CONFIGURATIONS 7 PIN 7 BLOCK 8 DATA 9

Table Protected Area Table 4K-bit Secured OTP 11 Memory 12 Table Memory DEVICE 13 256Mb Address 15 Quad Peripheral Interface QPI Read 16 COMMAND 17 Table Command Write Enable 22 Write Disable 23 Read Identification 25 Release from Deep Power-down RDP , Read Electronic Signature 26 Read Electronic Manufacturer ID & Device ID 28 QPI ID Read 29 Table ID Definitions Read Status Register 30 Read Configuration Register 31 Write Status Register 37 Table Protection Enter 4-byte mode 41 Exit 4-byte mode 41 Read Data Bytes 42 Read Data Bytes at Higher Speed 43 Dual Output Read Mode 45 2 x I/O Read Mode 46 Quad Read Mode 47 4 x I/O Read Mode 48 4 Byte Address Command 50 Burst 52 Performance Enhance 53 Performance Enhance Mode Reset 56 Fast 58 Sector Erase 61 Block Erase 62

P/N PM1875

MX25L25655F

Block Erase 63 Chip Erase 64 Page Program 65 4 x I/O Page Program 67 Deep Power-down 68 Enter Secured OTP 69 Exit Secured OTP 69 Read Security Register 69 Write Security Register 69

Table Security Register Write Protection Selection 71 Advanced Sector 73 Program/Erase 81 Erase 81 Program 81 83 No Operation 83 Software Reset-Enable RSTEN and Reset 83 Read SFDP Mode 85
P/N PM1875

MX25L25655F
3V 256M-BIT [x 1/x 2/x 4] CMOS SERIAL MULTI I/O FLASH MEMORY

GENERAL
• Serial Peripheral Interface compatible -- Mode 0 and Mode 3
• Single Power Supply Operation
- to volt for read, erase, and program operations
• 256Mb 268,435,456 x 1 bit structure or 134,217,728 x 2 bits two I/O mode structure or 67,108,864 x 4 bits four

I/O mode structure
• Protocol Support - Single I/O, Dual I/O and Quad I/O
• Latch-up protected to 100mA from -1V to Vcc +1V
• Low Vcc write inhibit is from 2.3V to 2.5V
• Fast read for SPI mode
- Support clock frequency up to 133MHz for all protocols - Support Fast Read, 2READ, DREAD, 4READ, QREAD instructions. - Configurable dummy cycle number for fast read operation
• Quad Peripheral Interface QPI available
• Equal Sectors with 4K byte each, or Equal Blocks with 32K byte each or Equal Blocks with 64K byte each - Any Block can be erased individually
• Programming - 256byte page buffer - Quad Input/Output page program 4PP to enhance program performance
• Typical 100,000 erase/program cycles
• 20 years data retention

SOFTWARE FEATURES
• Input Data Format
- 1-byte Command code
• Advanced Security Features
- Block lock protection The BP0-BP3 and T/B status bits define the size of the area to be protected against program and erase instructions - Advanced individual sector protection and permanent lock function Solid and Password Protect - Read Lock
• Additional 4K bit security OTP
- Features unique identifier - factory locked identifiable, and customer lockable
• Command Reset
• Program/Erase Suspend and Resume operation
• Electronic Identification
- JEDEC 1-byte manufacturer ID and 2-byte device ID
- RES command for 1-byte Device ID - REMS command for 1-byte manufacturer ID and 1-byte device ID
• Support Serial Flash Discoverable Parameters SFDP mode

P/N PM1875

MX25L25655F

HARDWARE FEATURES
• SCLK Input
- Serial clock input
• SI/SIO0
- Serial Data Input or Serial Data Input/Output for 2 x I/O read mode and 4 x I/O read mode
• SO/SIO1
- Serial Data Output or Serial Data Input/Output for 2 x I/O read mode and 4 x I/O read mode
• WP#/SIO2
- Hardware write protection or serial data Input/Output for 4 x I/O read mode
• RESET#/SIO3
- Hardware Reset pin or Serial input & Output for 4 x I/O read mode
• PACKAGE
- 16-pin SOP 300mil - 24-ball TFBGA 6x8mm with 4x6 ball array - 24-ball TFBGA 6x8mm with 5x5 ball array - All devices are RoHS Compliant

Please contact Macronix sales for specific information regarding this Advanced Security Features

P/N PM1875

MX25L25655F

MX25L25655F is 256Mb bits serial Flash memory, which is configured as 33,554,432 x 8 internally. When it is in two or four I/O mode, the structure becomes 134,217,728 bits x 2 or 67,108,864 bits x MX25L25655F feature a serial peripheral interface and software protocol allowing operation on a simple 3-wire bus while it is in single I/O mode. The three bus signals are a clock input SCLK , a serial data input SI , and a serial data output SO . Serial access to the device is enabled by CS# input.

When it is in two I/O read mode, the SI pin and SO pin become SIO0 pin and SIO1 pin for address/dummy bits input and data output. When it is in four I/O read mode, the SI pin, SO pin, WP# and RESET# pin become SIO0 pin, SIO1 pin, SIO2 pin and SIO3 pin for address/dummy bits input and data output.

The MX25L25655F Serial Multi I/O provides sequential read operation on the whole chip.

After program/erase command is issued, auto program/ erase algorithms which program/ erase and verify the specified page or sector/block locations will be executed. Program command is executed on byte basis, or page 256 bytes basis, or word basis for erase command is executed on sector 4K-byte , block 32K-byte , or block 64K-byte , or whole chip basis.

To provide user with ease of interface, a status register is included to indicate the status of the chip. The status read command can be issued to detect completion status of a program or erase operation via the WIP bit.

Advanced security features enhance the protection and security functions, please see security features section for more details.

When the device is not in operation and CS# is high, it is put in standby mode.

The MX25L25655F utilizes Macronix's proprietary memory cell, which reliably stores memory contents even after 100,000 program and erase cycles.

Table Read performance Comparison

Numbers of Dummy Cycles

Fast Read MHz

Dual Output Fast Read
ORDERING INFORMATION

PART NO. MX25L25655FMI-10G MX25L25655FXCI-10G MX25L25655FXDI-10G

CLOCK MHz TEMPERATURE

PACKAGE

Remark
-40°C~85°C
16-SOP 300mil
-40°C~85°C 24-TFBGA 4x6 ball array
-40°C~85°C 24-TFBGA 5x5 ball array

P/N PM1875

MX25L25655F

PART NAME DESCRIPTION MX 25 L 25655F M I

OPTION G RoHS Compliant

SPEED 10 104MHz

TEMPERATURE RANGE I Industrial -40°C to 85°C

PACKAGE M 16-SOP 300mil XC 24-ball TFBGA 4x6 ball array XD 24-ball TFBGA 5x5 ball array

DENSITY & MODE 25655F 256Mb Secured type

TYPE L 3V

DEVICE 25 Serial Flash

P/N PM1875

PACKAGE INFORMATION

MX25L25655F

P/N PM1875

MX25L25655F

P/N PM1875

MX25L25655F

P/N PM1875

MX25L25655F

Removed "Advanced Information"

Added Note RESET# pin has internal pull up

Modified Pin Description

Modified Read/Write Fast Boot Register Sequence

Optimize ISB1 & ISB2 spec

Corrected content error

OCT/19/2012

P9,16,19,23,30-33,

P39,70,71,77,81

P/N PM1875

MX25L25655F

Except for customized products which has been expressly identified in the applicable agreement, Macronix's products are designed, developed, and/or manufactured for ordinary business, industrial, personal, and/or household applications only, and not for use in any applications which may, directly or indirectly, cause death, personal injury, or severe property damages. In the event Macronix products are used in contradicted to their target usage above, the buyer shall take any and all actions to ensure said Macronix's product qualified for its actual use in accordance with the applicable laws and regulations and Macronix as well as it’s suppliers and/or distributors shall be released from any and all liability arisen therefrom. Copyright Macronix International Co., Ltd. All rights reserved, including the trademarks and tradename thereof, such as Macronix, MXIC, MXIC Logo, MX Logo, Integrated Solutions Provider, NBit, Nbit, NBiit, Macronix NBit, eLiteFlash, HybridNVM, HybridFlash, XtraROM, Phines, KH Logo, BE-SONOS, KSMC, Kingtech, MXSMIO, Macronix vEE, Macronix MAP, Rich io, Rich Book, Rich TV, and FitCAM. The names and brands of third party referred thereto if any are for identification purposes only. For the contact and order information, please visit Macronix’s Web site at:

MACRONIX INTERNATIONAL CO., LTD. reserves the right to change product and specifications without notice. 107

Notice: we do not provide any warranties that information, datasheets, application notes, circuit diagrams, or software stored on this website are up-to-date or error free. The archived MX25L25655FMI-10G Datasheet file may be downloaded here without warranties.

Datasheet ID: MX25L25655FMI-10G 646927