MX25L12873FM2I-10G

MX25L12873FM2I-10G Datasheet

MX25L12873F

Part	Datasheet
MX25L12873FM2I-10G	MX25L12873FM2I-10G (pdf)

Related Parts	Information
MX25L12873FZNI-10G	MX25L12873FZNI-10G
MX25L12873FMI-10G	MX25L12873FMI-10G

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MX25L12873F MX25L12873F DATASHEET P/N PM1914 MX25L12873F Contents 4 GENERAL 6 Table Read performance PIN CONFIGURATIONS 7 PIN 7 BLOCK 8 DATA 9 Table Protected Area Table 4K-bit Secured OTP 11 Memory 12 Table Memory DEVICE 13 Quad Peripheral Interface QPI Read 15 COMMAND 16 Table Command Write Enable 20 Write Disable 21 Read Identification 22 Release from Deep Power-down RDP , Read Electronic Signature 23 Read Electronic Manufacturer ID & Device ID 25 QPI ID Read 26 Table ID Definitions Read Status Register 27 Read Configuration Register 28 Table Configuration Register Write Status Register 34 Table Protection Read Data Bytes 37 Read Data Bytes at Higher Speed 38 Dual Output Read Mode 39 2 x I/O Read Mode 40 Quad Read Mode 41 4 x I/O Read Mode 42 Burst 44 Performance Enhance 45 Fast 48 Sector Erase 51 Block Erase 52 Block Erase 53 Chip Erase 54 Page Program 55 4 x I/O Page Program 57 P/N PM1914 MX25L12873F Deep Power-down 58 Enter Secured OTP 59 Exit Secured OTP 59 Read Security Register 59 Write Security Register 59 Table Security Register Write Protection Selection 61 Advanced Sector 63 Password Protection 70 Program/Erase 72 Erase 72 Program 72 74 No Operation 74 Software Reset-Enable RSTEN and Reset 74 Read SFDP Mode 76 P/N PM1914 MX25L12873F 3V 128M-BIT [x 1/x 2/x 4] CMOS SERIAL MULTI I/O FLASH MEMORY GENERAL • Supports Serial Peripheral Interface -- Mode 0 and Mode 3 • Single Power Supply Operation - to volt for read, erase, and program operations • 128Mb 134,217,728 x 1 bit structure or 67,108,864 x 2 bits two I/O mode structure or 33,554,432 x 4 bits four I/O mode structure • Protocol Support - Single I/O, Dual I/O and Quad I/O • Latch-up protected to 100mA from -1V to Vcc +1V • Fast read for SPI mode - Support clock frequency up to 133MHz for all protocols - Support Fast Read, 2READ, DREAD, 4READ, QREAD instructions. - Configurable dummy cycle number for fast read operation • Default Quad I/O enable QE bit=1 , and can not be change • Quad Peripheral Interface QPI available • Equal Sectors with 4K byte each, or Equal Blocks with 32K byte each or Equal Blocks with 64K byte each - Any Block can be erased individually • Programming - 256byte page buffer - Quad Input/Output page program 4PP to enhance program performance • Typical 100,000 erase/program cycles • 20 years data retention SOFTWARE FEATURES • Input Data Format - 1-byte Command code • Advanced Security Features - Block lock protection The BP0-BP3 and T/B status bit defines the size of the area to be protection against program and erase instructions - Advanced sector protection function Solid and Password Protect • Additional 4K bit security OTP - Features unique identifier - factory locked identifiable, and customer lockable • Command Reset • Program/Erase Suspend and Resume operation • Electronic Identification - JEDEC 1-byte manufacturer ID and 2-byte device ID - RES command for 1-byte Device ID - REMS command for 1-byte manufacturer ID and 1-byte device ID • Support Serial Flash Discoverable Parameters SFDP mode HARDWARE FEATURES • SCLK Input - Serial clock input P/N PM1914 MX25L12873F • SI/SIO0 - Serial Data Input or Serial Data Input/Output for 2 x I/O read mode and 4 x I/O read mode • SO/SIO1 - Serial Data Output or Serial Data Input/Output for 2 x I/O read mode and 4 x I/O read mode • SIO2 - Serial data Input & Output for 4 x I/O read mode • SIO3 - Serial data input & Output for 4 x I/O read mode • PACKAGE - 8-pin SOP 200mil - 16-pin SOP 300mil - 8-land WSON 6x5mm - All devices are RoHS Compliant and Halogen-free P/N PM1914 MX25L12873F MX25L12873F is 128Mb bits serial Flash memory, which is configured as 16,777,216 x 8 internally. When it is in two or four I/O mode, the structure becomes 67,108,864 bits x 2 or 33,554,432 bits x MX25L12873F feature a serial peripheral interface and software protocol allowing operation on a simple 3-wire bus while it is in single I/O mode. The three bus signals are a clock input SCLK , a serial data input SI , and a serial data output SO . Serial access to the device is enabled by CS# input. When it is in two I/O read mode, the SI pin and SO pin become SIO0 pin and SIO1 pin for address/dummy bits input and data output. When it is in four I/O read mode, the SI pin, SO pin, become SIO0 pin, SIO1 pin, SIO2 pin and SIO3 pin for address/dummy bits input and data output. The MX25L12873F Serial Multi I/O provides sequential read operation on whole chip. After program/erase command is issued, auto program/erase algorithms which program/erase and verify the specified page or sector/block locations will be executed. Program command is executed on byte basis, or page 256 bytes basis, or word basis for erase command is executed on sector 4K-byte , block 32K-byte , or block 64K-byte , or whole chip basis. To provide user with ease of interface, a status register is included to indicate the status of the chip. The status read command can be issued to detect completion status of a program or erase operation via WIP bit. Advanced security features enhance the protection and security functions, please see security features section for more details. When the device is not in operation and CS# is high, it is put in standby mode. The MX25L12873F utilizes Macronix's proprietary memory cell, which reliably stores memory contents even after 100,000 program and erase cycles. Table Read performance Comparison Numbers of Dummy Cycles Fast Read MHz Dual Output Fast Read ORDERING INFORMATION PART NO. MX25L12873FM2I-10G MX25L12873FMI-10G MX25L12873FZNI-10G CLOCK MHz TEMPERATURE PACKAGE Remark -40°C to 85°C 8-SOP 200mil -40°C to 85°C 16-SOP 300mil -40°C to 85°C 8-WSON 6x5mm P/N PM1914 MX25L12873F PART NAME DESCRIPTION MX 25 L 12873F M2 I OPTION G RoHS Compliant & Halogen-free SPEED 10 104MHz TEMPERATURE RANGE I Industrial -40°C to 85°C PACKAGE M2 8-SOP 200mil M 16-SOP 300mil ZN 8-WSON 6x5mm DENSITY & MODE 12873F 128Mb, default Quad I/O enable, and can not be change TYPE L 3V DEVICE 25 Serial Flash P/N PM1914 PACKAGE INFORMATION MX25L12873F P/N PM1914 MX25L12873F P/N PM1914 MX25L12873F P/N PM1914 MX25L12873F Removed "Advanced Information" Added RESET# information Added USPB information Added Power Up/Down and Voltage Drop information Corrected content error Updated parameters for DC/AC Characteristics Updated Erase and Programming Performance Content correction Modified VCC to Ground Potential parameter Updated tVR values Updated package outline

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MX25L12873F

MX25L12873F DATASHEET

P/N PM1914

MX25L12873F

Contents
4 GENERAL 6

Table Read performance PIN CONFIGURATIONS 7 PIN 7 BLOCK 8 DATA 9

Table Protected Area Table 4K-bit Secured OTP 11 Memory 12 Table Memory DEVICE 13 Quad Peripheral Interface QPI Read 15 COMMAND 16 Table Command Write Enable 20 Write Disable 21 Read Identification 22 Release from Deep Power-down RDP , Read Electronic Signature 23 Read Electronic Manufacturer ID & Device ID 25 QPI ID Read 26 Table ID Definitions Read Status Register 27 Read Configuration Register 28 Table Configuration Register Write Status Register 34 Table Protection Read Data Bytes 37 Read Data Bytes at Higher Speed 38 Dual Output Read Mode 39 2 x I/O Read Mode 40 Quad Read Mode 41 4 x I/O Read Mode 42 Burst 44 Performance Enhance 45 Fast 48 Sector Erase 51 Block Erase 52 Block Erase 53 Chip Erase 54 Page Program 55 4 x I/O Page Program 57

P/N PM1914

MX25L12873F

Deep Power-down 58 Enter Secured OTP 59 Exit Secured OTP 59 Read Security Register 59 Write Security Register 59

Table Security Register Write Protection Selection 61 Advanced Sector 63 Password Protection 70 Program/Erase 72 Erase 72 Program 72 74 No Operation 74 Software Reset-Enable RSTEN and Reset 74 Read SFDP Mode 76
P/N PM1914

MX25L12873F
3V 128M-BIT [x 1/x 2/x 4] CMOS SERIAL MULTI I/O FLASH MEMORY

GENERAL
• Supports Serial Peripheral Interface -- Mode 0 and Mode 3
• Single Power Supply Operation
- to volt for read, erase, and program operations
• 128Mb 134,217,728 x 1 bit structure or 67,108,864 x 2 bits two I/O mode structure or 33,554,432 x 4 bits four

I/O mode structure
• Protocol Support - Single I/O, Dual I/O and Quad I/O
• Latch-up protected to 100mA from -1V to Vcc +1V
• Fast read for SPI mode
- Support clock frequency up to 133MHz for all protocols - Support Fast Read, 2READ, DREAD, 4READ, QREAD instructions. - Configurable dummy cycle number for fast read operation
• Default Quad I/O enable QE bit=1 , and can not be change
• Quad Peripheral Interface QPI available
• Equal Sectors with 4K byte each, or Equal Blocks with 32K byte each or Equal Blocks with 64K byte each - Any Block can be erased individually
• Programming - 256byte page buffer - Quad Input/Output page program 4PP to enhance program performance
• Typical 100,000 erase/program cycles
• 20 years data retention

SOFTWARE FEATURES
• Input Data Format
- 1-byte Command code
• Advanced Security Features
- Block lock protection The BP0-BP3 and T/B status bit defines the size of the area to be protection against program and erase instructions - Advanced sector protection function Solid and Password Protect
• Additional 4K bit security OTP
- Features unique identifier - factory locked identifiable, and customer lockable
• Command Reset
• Program/Erase Suspend and Resume operation
• Electronic Identification
- JEDEC 1-byte manufacturer ID and 2-byte device ID
- RES command for 1-byte Device ID - REMS command for 1-byte manufacturer ID and 1-byte device ID
• Support Serial Flash Discoverable Parameters SFDP mode

HARDWARE FEATURES
• SCLK Input
- Serial clock input

P/N PM1914

MX25L12873F
• SI/SIO0 - Serial Data Input or Serial Data Input/Output for 2 x I/O read mode and 4 x I/O read mode
• SO/SIO1 - Serial Data Output or Serial Data Input/Output for 2 x I/O read mode and 4 x I/O read mode
• SIO2 - Serial data Input & Output for 4 x I/O read mode
• SIO3 - Serial data input & Output for 4 x I/O read mode
• PACKAGE - 8-pin SOP 200mil - 16-pin SOP 300mil - 8-land WSON 6x5mm
- All devices are RoHS Compliant and Halogen-free

P/N PM1914

MX25L12873F

MX25L12873F is 128Mb bits serial Flash memory, which is configured as 16,777,216 x 8 internally. When it is in two or four I/O mode, the structure becomes 67,108,864 bits x 2 or 33,554,432 bits x MX25L12873F feature a serial peripheral interface and software protocol allowing operation on a simple 3-wire bus while it is in single I/O mode. The three bus signals are a clock input SCLK , a serial data input SI , and a serial data output SO . Serial access to the device is enabled by CS# input.

When it is in two I/O read mode, the SI pin and SO pin become SIO0 pin and SIO1 pin for address/dummy bits input and data output. When it is in four I/O read mode, the SI pin, SO pin, become SIO0 pin, SIO1 pin, SIO2 pin and SIO3 pin for address/dummy bits input and data output.

The MX25L12873F Serial Multi I/O provides sequential read operation on whole chip.

After program/erase command is issued, auto program/erase algorithms which program/erase and verify the specified page or sector/block locations will be executed. Program command is executed on byte basis, or page 256 bytes basis, or word basis for erase command is executed on sector 4K-byte , block 32K-byte , or block 64K-byte , or whole chip basis.

To provide user with ease of interface, a status register is included to indicate the status of the chip. The status read command can be issued to detect completion status of a program or erase operation via WIP bit.

Advanced security features enhance the protection and security functions, please see security features section for more details.

When the device is not in operation and CS# is high, it is put in standby mode.

The MX25L12873F utilizes Macronix's proprietary memory cell, which reliably stores memory contents even after 100,000 program and erase cycles.

Table Read performance Comparison

Numbers of Dummy Cycles

Fast Read MHz

Dual Output Fast Read
ORDERING INFORMATION PART NO.

MX25L12873FM2I-10G MX25L12873FMI-10G MX25L12873FZNI-10G

CLOCK MHz TEMPERATURE

PACKAGE

Remark
-40°C to 85°C
8-SOP 200mil
-40°C to 85°C
16-SOP 300mil
-40°C to 85°C 8-WSON 6x5mm

P/N PM1914

MX25L12873F

PART NAME DESCRIPTION

MX 25 L 12873F M2 I

OPTION G RoHS Compliant & Halogen-free

SPEED 10 104MHz

TEMPERATURE RANGE I Industrial -40°C to 85°C

PACKAGE M2 8-SOP 200mil M 16-SOP 300mil ZN 8-WSON 6x5mm

DENSITY & MODE 12873F 128Mb, default Quad I/O enable, and can not be change

TYPE L 3V

DEVICE 25 Serial Flash

P/N PM1914

PACKAGE INFORMATION

MX25L12873F

P/N PM1914

MX25L12873F

P/N PM1914

MX25L12873F

P/N PM1914

MX25L12873F

Removed "Advanced Information"

Added RESET# information

Added USPB information

Added Power Up/Down and Voltage Drop information

Corrected content error

Updated parameters for DC/AC Characteristics

Updated Erase and Programming Performance

Content correction

Modified VCC to Ground Potential parameter

Updated tVR values

Updated package outline

More datasheets: 62P22-N6 | 62P22-N6S | 62P22-N0S | 62P22-N4S | 62P22-N0 | DEMAT9SA101 | MSWSE-010-15S | MDM-15PH034K | 1AB000490027 | MX25L12873FZNI-10G

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Datasheet ID: MX25L12873FM2I-10G 646925