AN87C196KD
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AN87C196JTWB20 (pdf) |
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AN87C196JTWB |
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AN87C196JV20F8 |
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87C196KD 16-BIT HIGH PERFORMANCE CHMOS MICROCONTROLLER Automotive Y b40 C to a125 C Y 32 Kbytes of On-Chip EPROM Y 232 Byte Register File Y Full Duplex Serial Port Y High Speed I O Subsystem Y 16-Bit Timer Y 768 Bytes of Additional RAM Y 16-Bit Up Down Counter with Capture Y Register-to-Register Architecture Y 3 Pulse-Width-Modulated Outputs Y 28 Interrupt Sources 16 Vectors Y Four 16-Bit Software Timers Y Peripheral Transaction Server Y 1 75 ms 16 x 16 Multiply 16 MHz Y 3 0 ms 32 16 Divide 16 MHz Y Powerdown and Idle Modes Y Five 8-Bit I O Ports Y 16-Bit Watchdog Timer Y Dynamically Configurable 8-Bit or 16-Bit Buswidth Y 8- or 10-Bit 8-Channel A D Converter with Sample Hold Y HOLD HLDA Bus Protocol Y OTP One-Time Programmable and QROM Versions Y Available in 12 MHz and 16 MHz Versions Y 16 MHz Operation The 87C196KD 16-bit microcontroller is a high-performance member of the MCS 96 microcontroller family The 87C196KD is an enhanced 8XC196KC device with 1000 bytes RAM 16 MHz operation and 32 Kbytes of on-chip EPROM Intel’s CHMOS process provides a high-performance processor along with low power consumption Four high-speed capture inputs are provided to record times when events occur Six high-speed outputs are available for pulse or waveform generation The high-speed output can also generate four software timers or start an A D conversion Events can be based on the timer or up down counter NOTICE This datasheet contains information on products in full production Specifications within this datasheet are subject to change without notice Verify with your local Intel sales office that you have the latest datasheet before finalizing a design MCS 96 is a registered trademark of Intel Corporation Other brands and names are the property of their respective owners Information in this document is provided in connection with Intel products Intel assumes no liability whatsoever including infringement of any patent or copyright for sale and use of Intel products except as provided in Intel’s Terms and Conditions of Sale for such products Intel retains the right to make changes to these specifications at any time without notice Microcomputer Products may have minor variations to this specification known as errata COPYRIGHT INTEL CORPORATION 1995 January 1995 Order Number 272168-002 AUTOMOTIVE 87C196KD Figure 1 87C196KD Block Diagram 272168 1 Figure 2 The 87C196KD Family Nomenclature 272168 2 87C196KD Enhanced Feature Set over the 87C196KC 1 The 87C196KD has twice the RAM and twice the EPROM of the 87C196KC 2 The vertical windowing scheme has been extended to allow all 1000 bytes of register RAM to be windowed into the lower register file 3 A CLKOUT disable bit has been added to the IOC3 SFR This can be used to reduce noise in systems not requiring the CLKOUT signal AUTOMOTIVE 87C196KD PACKAGING PLCC 9 8 7 6 5 4 3 2 1 68 67 66 65 64 63 62 61 60 59 58 57 56 55 ACH7 P0 7 ACH6 P0 6 ACH2 P0 2 ACH0 P0 0 ACH1 P0 1 ACH3 P0 3 NMI EA VCC VSS XTAL1 XTAL2 CLKOUT BUSWIDTH INST ALE ADV RD AD0 P3 0 AD1 P3 1 AD2 P3 2 AD3 P3 3 AD4 P3 4 AD5 P3 5 PLCC |
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