IS45S16100C1
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IS45S16100C1-7TLA1 (pdf) |
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IS45S16100C1-7BLA1-TR |
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IS45S16100C1-7BLA1 |
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IS45S16100C1-7TLA1-TR |
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IS45S16100C1 512K Words x 16 Bits x 2 Banks 16-MBIT SYNCHRONOUS DYNAMIC RAM JANUARY 2006 • Clock frequency 143 MHz • Fully synchronous all signals referenced to a positive clock edge • Two banks can be operated simultaneously and independently • Dual internal bank controlled by A11 bank select • Single 3.3V power supply • LVTTL interface • Programmable burst length 1, 2, 4, 8, full page • Programmable burst sequence: Sequential/Interleave • 4096 refresh cycles every 64 ms • Random column address every clock cycle • Programmable CAS latency 2, 3 clocks • Burst read/write and burst read/single write operations capability • Burst termination by burst stop and precharge command • Byte controlled by LDQM and UDQM • Automotive Temperature Range Option A 0oC to +70oC Option A1 -40oC to +85oC • Packages 400-mil 50-pin TSOP-II, 60-ball fBGA • Lead-free package option ISSI’s 16Mb Synchronous DRAM IS45S16100C1 is organized as a 524,288-word x 16-bit x 2-bank for improved performance. The synchronous DRAMs achieve high-speed data transfer using pipeline architecture. All inputs and outputs signals refer to the rising edge of the clock input. PIN CONFIGURATIONS 50-Pin TSOP Type II GNDQ VDDQ GNDQ VDDQ LDQM DQ15 IDQ14 GNDQ DQ13 DQ12 VDDQ DQ11 DQ10 GNDQ VDDQ UDQM PIN DESCRIPTIONS A0-A11 A0-A10 A11 A0-A7 DQ0 to DQ15 CLK CKE CS RAS Address Input Row Address Input Bank Select Address Column Address Input Data DQ System Clock Input Clock Enable Chip Select Row Address Strobe Command CAS WE LDQM UDQM VDD GND VDDQ GNDQ NC Column Address Strobe Command Write Enable Lower Bye, Input/Output Mask Upper Bye, Input/Output Mask Power Ground Power Supply for DQ Pin Ground for DQ Pin No Connection Copyright 2006 Integrated Silicon Solution, Inc. All rights reserved. ISSI reserves the right to make changes to this specification and its products at any time without notice. ISSI assumes no liability arising out of the application or use of any information, products or services described herein. Customers are advised to obtain the latest version of this device specification before relying on any published information and before placing orders for products. Integrated Silicon Solution, Inc. 1-800-379-4774 01/03/06 IS45S16100C1 ISSI ORDERING INFORMATION Automotive Range 0°C to +70°C Frequency 143MHz Speed ns 7 Automotive Range -40°C to +85°C Frequency 143MHz Speed ns 7 ISSI Order Part No. IS45S16100C1-7TLA IS45S16100C1-7BLA Package 400-mil TSOP II, Lead-free 60-ball fBGA, Lead-free Order Part No. IS45S16100C1-7TA1 IS45S16100C1-7TLA1 IS45S16100C1-7BLA1 Package 400-mil TSOP II 400-mil TSOP II, Lead-free 60-ball fBGA, Lead-free Integrated Silicon Solution, Inc. 1-800-379-4774 01/03/06 PACKAGING INFORMATION Mini Ball Grid Array Package Code B 60-Ball 1234567 A B C D E F G H J K L M N P R SEATING PLANE mBGA - 10.1mm x 6.4mm MILLIMETERS INCHES Sym. Min. No. Leads Typ. Max. 60 Min. Typ. Max. e D D1 + 60X 7654321 A B C D E F G H J K L M N P R e E1 E Notes Controlling dimensions are in millimeters. mm Ball Pitch Copyright 2006 Integrated Silicon Solution, Inc. All rights reserved. ISSI reserves the right to make changes to this specification and its products at any time without notice. ISSI assumes no liability arising out of the application or use of any information, products or services described herein. Customers are advised to obtain the latest version of this device specification before relying on any published information and before placing orders for products. Integrated Silicon Solution, Inc. 1-800-379-4774 PACKAGING INFORMATION Plastic TSOP Package Code T Type II N/2+1 E1 E Notes Controlling dimension millimieters, unless otherwise specified. BSC = Basic lead spacing between centers. Dimensions D and E1 do not include mold flash protrusions and should be measured from the bottom of the package. Formed leads shall be planar with respect to one another within inches at the seating plane. SEATING PLANE |
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