IS43TR16128A-15HBL

IS43TR16128A-15HBL Datasheet

IS43/46TR16128A, IS43/46TR16128AL, IS43/46TR82560A, IS43/46TR82560AL

Part	Datasheet
IS43TR16128A-15HBL	IS43TR16128A-15HBL (pdf)

Related Parts	Information
IS43TR16128AL-15HBL	IS43TR16128AL-15HBL
IS43TR16128AL-15HBLI-TR	IS43TR16128AL-15HBLI-TR
IS43TR16128AL-125KBL-TR	IS43TR16128AL-125KBL-TR
IS43TR16128A-125KBLI-TR	IS43TR16128A-125KBLI-TR
IS43TR16128A-125KBL-TR	IS43TR16128A-125KBL-TR
IS43TR16128A-125KBL	IS43TR16128A-125KBL
IS43TR16128AL-15HBL-TR	IS43TR16128AL-15HBL-TR
IS46TR16128AL-125KBLA2	IS46TR16128AL-125KBLA2
IS46TR16128AL-15HBLA2	IS46TR16128AL-15HBLA2
IS46TR16128A-125KBLA2	IS46TR16128A-125KBLA2
IS46TR16128A-15HBLA2-TR	IS46TR16128A-15HBLA2-TR
IS46TR16128AL-125KBLA1	IS46TR16128AL-125KBLA1
IS46TR16128AL-125KBLA2-TR	IS46TR16128AL-125KBLA2-TR
IS46TR16128AL-15HBLA2-TR	IS46TR16128AL-15HBLA2-TR
IS46TR16128A-125KBLA2-TR	IS46TR16128A-125KBLA2-TR
IS46TR16128A-15HBLA2	IS46TR16128A-15HBLA2
IS46TR16128A-15HBLA1	IS46TR16128A-15HBLA1
IS46TR16128AL-15HBLA1	IS46TR16128AL-15HBLA1
IS46TR16128A-125KBLA1	IS46TR16128A-125KBLA1
IS43TR16128AL-125KBL	IS43TR16128AL-125KBL
IS43TR16128A-15HBLI-TR	IS43TR16128A-15HBLI-TR
IS46TR16128AL-125KBLA1-TR	IS46TR16128AL-125KBLA1-TR
IS43TR16128AL-125KBLI	IS43TR16128AL-125KBLI
IS43TR16128AL-15HBLI	IS43TR16128AL-15HBLI
IS46TR16128A-125KBLA1-TR	IS46TR16128A-125KBLA1-TR
IS43TR16128AL-125KBLI-TR	IS43TR16128AL-125KBLI-TR
IS43TR16128A-15HBLI	IS43TR16128A-15HBLI
IS43TR16128A-125KBLI	IS43TR16128A-125KBLI
IS46TR16128AL-15HBLA1-TR	IS46TR16128AL-15HBLA1-TR
IS46TR16128A-15HBLA1-TR	IS46TR16128A-15HBLA1-TR
IS43TR16128A-15HBL-TR	IS43TR16128A-15HBL-TR

PDF Datasheet Preview
IS43/46TR16128A, IS43/46TR16128AL, IS43/46TR82560A, IS43/46TR82560AL 256Mx8, 128Mx16 2Gb DDR3 SDRAM FEATURES • Standard Voltage VDD and VDDQ = 1.5V ± 0.075V • Low Voltage L VDD and VDDQ = 1.35V + 0.1V, -0.067V - Backward compatible to 1.5V • High speed data transfer rates with system frequency up to 933 MHz • 8 internal banks for concurrent operation • 8n-Bit pre-fetch architecture • Programmable CAS Latency • Programmable Additive Latency 0, CL-1,CL-2 • Programmable CAS WRITE latency CWL based on tCK • Programmable Burst Length 4 and 8 • Programmable Burst Sequence Sequential or Interleave • BL switch on the fly • Auto Self Refresh ASR • Self Refresh Temperature SRT OPTIONS • Configuration 256Mx8 128Mx16 • Package 96-ball FBGA 9mm x 13mm for x16 78-ball FBGA 8mm x 10.5mm for x8 OCTOBER 2015 • Refresh Interval us 8192 cycles/64 ms Tc= -40°C to 85°C us 8192 cycles/32 ms Tc= 85°C to 105°C • Partial Array Self Refresh • Asynchronous RESET pin • TDQS Termination Data Strobe supported x8 only • OCD Off-Chip Driver Impedance Adjustment • Dynamic ODT On-Die Termination • Driver strength RZQ/7, RZQ/6 RZQ = 240 Ω • Write Leveling • Up to 200 MHz in DLL off mode • Operating temperature: Commercial TC = 0°C to +95°C Industrial TC = -40°C to +95°C Automotive, A1 TC = -40°C to +95°C Automotive, A2 TC = -40°C to +105°C ADDRESS TABLE Parameter Row Addressing Column Addressing Bank Addressing Page size Auto Precharge Addressing BL switch on the fly 256Mx8 A0-A14 A0-A9 BA0-2 A10/AP A12/BC# 128Mx16 A0-A13 A0-A9 BA0-2 A10/AP A12/BC# SPEED BIN Speed Option 187F 125K JEDEC Speed Grade CL-nRCD-nRP tRCD,tRP min DDR3-1066F 7-7-7 DDR3-1333H 9-9-9 DDR3-1600K 11-11-11 Note Faster speed options are backward compatible to slower speed options. 107M DDR3-1866M 13-13-13 Units tCK ns Copyright 2015 Integrated Silicon Solution, Inc. All rights reserved. ISSI reserves the right to make changes to this specification and its products at any time without notice. ISSI assumes no liability arising out of the application or use of any information, products or services described herein. Customers are advised to obtain the latest version of this device specification before relying on any published information and before placing orders for products. Integrated Silicon Solution, Inc. does not recommend the use of any of its products in life support applications where the failure or malfunction of the product can reasonably be expected to cause failure of the life support system or to significantly affect its safety or effectiveness. Products are not authorized for use in such applications unless Integrated Silicon Solution, Inc. receives written assurance to its satisfaction, that a. the risk of injury or damage has been minimized b. the user assume all such risks and c. potential liability of Integrated Silicon Solution, Inc is adequately protected under the circumstances Integrated Silicon Solution, Inc. 09/28/2015 Accesses within a given burst may be programmed to sequential or interleaved order. The burst type is selected via bit A3 as shown in Figure The ordering of accesses within a burst is determined by the burst length, burst type, and the starting column address as shown in Table below. The burst length is defined by bits A0-A1. Burst length options include fixed BC4, fixed BL8, and ‘on the fly’ which allows BC4 or BL8 to be selected coincident with the registration of a Read or Write command via A12/BC#. Integrated Silicon Solution, Inc. 09/28/2015 IS43/46TR16128A, IS43/46TR16128AL, IS43/46TR82560A, IS43/46TR82560AL Burst Length READ/ WRITE Starting Column ADDRESS A2,A1,A0 burst type = Sequential decimal A3 = 0 burst type = Interleaved decimal A3 = 1 Notes 0,1,2,3,T,T,T,T 0,1,2,3,T,T,T,T 1, 2, 3 1,2,3,0,T,T,T,T 1,0,3,2,T,T,T,T 1, 2, 3 2,3,0,1,T,T,T,T 2,3,0,1,T,T,T,T 1, 2, 3 READ 4 11 100 3,0,1,2,T,T,T,T 4,5,6,7,T,T,T,T Chop 5,6,7,4,T,T,T,T 3,2,1,0,T,T,T,T 4,5,6,7,T,T,T,T 5,4,7,6,T,T,T,T 1, 2, 3 1, 2, 3 1, 2, 3 6,7,4,5,T,T,T,T 6,7,4,5,T,T,T,T 1, 2, 3 7,4,5,6,T,T,T,T 7,6,5,4,T,T,T,T 1, 2, 3 WRITE 0,V,V 1,V,V 0,1,2,3,X,X,X,X 4,5,6,7,X,X,X,X 0,1,2,3,X,X,X,X 4,5,6,7,X,X,X,X 1, 2, 4, 5 1, 2, 4, 5 0,1,2,3,4,5,6,7 0,1,2,3,4,5,6,7 1,2,3,0,5,6,7,4 1,0,3,2,5,4,7,6 • Regular interface functionality during register reads o Support two Burst Ordering which are switched with A2 and A[1:0]=00b. o Support of read burst chop MRS and on-the-fly via A12/BC o All other address bits remaining column address bits including A10, all bank address bits will be ignored by the DDR3 SDRAM. o Regular read latencies and AC timings apply. o DLL must be locked prior to MPR Reads. NOTE * Burst order bit 0 is assigned to LSB and burst order bit 7 is assigned to MSB of the selected MPR agent. NOTE Good reference for the example of MPR feature is the JEDEC standard No.93-3D, Protocol example. Integrated Silicon Solution, Inc. 09/28/2015 IS43/46TR16128A, IS43/46TR16128AL, IS43/46TR82560A, IS43/46TR82560AL Relevant Timing Parameters AC timing parameters are important for operating the Multi Purpose Register tRP, tMRD, tMOD, and tMPRR. For more details refer to “Electrical Characteristics & AC Timing Integrated Silicon Solution, Inc. 09/28/2015 IS43/46TR16128A, IS43/46TR16128AL, IS43/46TR82560A, IS43/46TR82560AL DDR3 SDRAM Command Description and Operation Command Truth Table [BA=Bank Address, RA=Row Address, CA=Column Address, BC#=Burst Chop, X=Don’t Care, V=Valid] Function Abbreviation Previous Current CS# RAS# Cycle Cycle CAS# BA0BA2 A11, A13, A14 A12/ BC# A10/ AP A0A9 Notes Mode Register Set OP Code Refresh Self Refresh Entry 7,9,12 Self Refresh Exit 7,8,9,12 Single Bank Precharge Precharge all Banks PREA Bank Activate Row Address RA Write Fixed BL8 or BC4 BA RFU V Write BC4, on the Fly WRS4 ORDERING INFORMATION,128MX16, 1.5V DDR3 128Mx16 - Commercial Range 0°C TC 95°C Data Rate CL-tRCD-tRP Order Part No. 1066MT/s 7-7-7 IS43TR16128A -187FBL 1333MT/s 9-9-9 IS43TR16128A -15HBL 1600MT/s 11-11-11 IS43TR16128A -125KBL 1866MT/s 13-13-13 IS43TR16128A -107MBL 128Mx16 - Industrial Range TC 95°C Data Rate CL-tRCD-tRP Order Part No. 1066MT/s 7-7-7 IS43TR16128A -187FBLI 1333MT/s 9-9-9 IS43TR16128A -15HBLI 1600MT/s 11-11-11 IS43TR16128A -125KBLI 1866MT/s 13-13-13 IS43TR16128A -107MBLI 128Mx16 Automotive, A1 Range TC 95°C Data Rate CL-tRCD-tRP Order Part No. 1066MT/s 7-7-7 IS46TR16128A -187FBLA1 1333MT/s ORDERING INFORMATION,128MX16,1.35V DDR3L 128Mx16 - Commercial Range 0°C TC 95°C Data Rate CL-tRCD-tRP Order Part No. 1333MT/s 9-9-9 IS43TR16128AL -15HBL 1600MT/s 11-11-11 IS43TR16128AL -125KBL 128Mx16 - Industrial Range TC 95°C Data Rate CL-tRCD-tRP Order Part No. 1333MT/s 9-9-9 IS43TR16128AL -15HBLI 1600MT/s 11-11-11 IS43TR16128AL -125KBLI 128Mx16 Automotive, A1 Range TC 95°C Data Rate CL-tRCD-tRP Order Part No. 1333MT/s 9-9-9 IS46TR16128AL -15HBLA1 1600MT/s 11-11-11 IS46TR16128AL -125KBLA1 128Mx16 Automotive, A2 Range TC 105°C Data Rate CL-tRCD-tRP Order Part No. 1333MT/s 9-9-9 IS46TR16128AL -15HBLA2 1600MT/s 11-11-11 IS46TR16128AL -125KBLA2 ORDERING INFORMATION, 256MX8, 1.5V DDR3 256Mx8 - Commercial Range 0°C TC 95°C Data Rate CL-tRCD-tRP 1333MT/s 9-9-9 1600MT/s 11-11-11 Order Part No. IS43TR82560A -15HBL IS43TR82560A -125KBL 256Mx8 - Industrial Range TC 95°C Data Rate CL-tRCD-tRP 1333MT/s 9-9-9 1600MT/s 11-11-11 Order Part No. IS43TR82560A -15HBLI IS43TR82560A -125KBLI 256Mx8 Automotive, A1 Range TC 95°C Data Rate CL-tRCD-tRP Order Part No. 1333MT/s 9-9-9 IS46TR82560A -15HBLA1 1600MT/s 11-11-11 IS46TR82560A -125KBLA1 256Mx8 Automotive, A2 Range TC 105°C Data Rate CL-tRCD-tRP Order Part No. 1333MT/s 9-9-9 IS46TR82560A -15HBLA2 1600MT/s 11-11-11 IS46TR82560A -125KBLA2 Note Contact ISSI for availability of options. Package 78-ball FBGA,Lead-free 78-ball FBGA,Lead-free Package 78-ball FBGA,Lead-free 78-ball FBGA,Lead-free Package 78-ball FBGA,Lead-free 78-ball FBGA,Lead-free ORDERING INFORMATION, 256MX8, 1.35V DDR3L 256Mx8 - Commercial Range 0°C TC 95°C Data Rate CL-tRCD-tRP 1333MT/s 9-9-9 1600MT/s 11-11-11 Order Part No. IS43TR82560AL -15HBL IS43TR82560AL -125KBL 256Mx8 - Industrial Range TC 95°C Data Rate CL-tRCD-tRP 1333MT/s 9-9-9 1600MT/s 11-11-11 Order Part No. IS43TR82560AL -15HBLI IS43TR82560AL -125KBLI 256Mx8 Automotive, A1 Range TC 95°C Data Rate CL-tRCD-tRP Order Part No. 1333MT/s 9-9-9 IS46TR82560AL -15HBLA1 1600MT/s 11-11-11 IS46TR82560AL -125KBLA1 256Mx8 Automotive, A2 Range TC 105°C Data Rate CL-tRCD-tRP Order Part No. 1333MT/s 9-9-9 IS46TR82560AL -15HBLA2 1600MT/s 11-11-11 IS46TR82560AL -125KBLA2 Note Contact ISSI for availability of options. Package 78-ball FBGA,Lead-free 78-ball FBGA,Lead-free Package 78-ball FBGA,Lead-free 78-ball FBGA,Lead-free Package 78-ball FBGA,Lead-free 78-ball FBGA,Lead-free

PDF Datasheet Preview

IS43/46TR16128A, IS43/46TR16128AL, IS43/46TR82560A, IS43/46TR82560AL
256Mx8, 128Mx16 2Gb DDR3 SDRAM

FEATURES
• Standard Voltage VDD and VDDQ = 1.5V ± 0.075V
• Low Voltage L VDD and VDDQ = 1.35V + 0.1V, -0.067V
- Backward compatible to 1.5V
• High speed data transfer rates with system
frequency up to 933 MHz
• 8 internal banks for concurrent operation
• 8n-Bit pre-fetch architecture
• Programmable CAS Latency
• Programmable Additive Latency 0, CL-1,CL-2
• Programmable CAS WRITE latency CWL based
on tCK
• Programmable Burst Length 4 and 8
• Programmable Burst Sequence Sequential or

Interleave
• BL switch on the fly
• Auto Self Refresh ASR
• Self Refresh Temperature SRT

OPTIONS
• Configuration 256Mx8 128Mx16
• Package 96-ball FBGA 9mm x 13mm for x16 78-ball FBGA 8mm x 10.5mm for x8

OCTOBER 2015
• Refresh Interval us 8192 cycles/64 ms Tc= -40°C to 85°C us 8192 cycles/32 ms Tc= 85°C to 105°C
• Partial Array Self Refresh
• Asynchronous RESET pin
• TDQS Termination Data Strobe supported x8
only
• OCD Off-Chip Driver Impedance Adjustment
• Dynamic ODT On-Die Termination
• Driver strength RZQ/7, RZQ/6 RZQ = 240 Ω
• Write Leveling
• Up to 200 MHz in DLL off mode
• Operating temperature:

Commercial TC = 0°C to +95°C Industrial TC = -40°C to +95°C Automotive, A1 TC = -40°C to +95°C Automotive, A2 TC = -40°C to +105°C

ADDRESS TABLE Parameter Row Addressing Column Addressing Bank Addressing Page size Auto Precharge Addressing BL switch on the fly
256Mx8 A0-A14 A0-A9 BA0-2

A10/AP

A12/BC#
128Mx16 A0-A13 A0-A9 BA0-2

A10/AP

A12/BC#

SPEED BIN

Speed Option
187F
125K

JEDEC Speed Grade

CL-nRCD-nRP tRCD,tRP min

DDR3-1066F
7-7-7

DDR3-1333H
9-9-9

DDR3-1600K
11-11-11

Note Faster speed options are backward compatible to slower speed options.
107M

DDR3-1866M 13-13-13

Units
tCK ns

Copyright 2015 Integrated Silicon Solution, Inc. All rights reserved. ISSI reserves the right to make changes to this specification and its products at any time without notice. ISSI assumes no liability arising out of the application or use of any information, products or services described herein. Customers are advised to obtain the latest version of this device specification before relying on any published information and before placing orders for products.

Integrated Silicon Solution, Inc. does not recommend the use of any of its products in life support applications where the failure or malfunction of the product can reasonably be expected to cause failure of the life support system or to significantly affect its safety or effectiveness. Products are not authorized for use in such applications unless Integrated Silicon Solution, Inc. receives written assurance to its satisfaction, that a. the risk of injury or damage has been minimized b. the user assume all such risks and c. potential liability of Integrated Silicon Solution, Inc is adequately protected under the circumstances

Integrated Silicon Solution, Inc.
09/28/2015
Accesses within a given burst may be programmed to sequential or interleaved order. The burst type is selected via bit A3 as shown in Figure The ordering of accesses within a burst is determined by the burst length, burst type, and the starting column address as shown in Table below. The burst length is defined by bits A0-A1. Burst length options include fixed BC4, fixed BL8, and ‘on the fly’ which allows BC4 or BL8 to be selected coincident with the registration of a Read or Write command via A12/BC#.

Integrated Silicon Solution, Inc.
09/28/2015

IS43/46TR16128A, IS43/46TR16128AL, IS43/46TR82560A, IS43/46TR82560AL

Burst Length

READ/ WRITE

Starting Column ADDRESS A2,A1,A0
burst type = Sequential decimal A3 = 0
burst type = Interleaved decimal A3 = 1

Notes
0,1,2,3,T,T,T,T
0,1,2,3,T,T,T,T
1, 2, 3
1,2,3,0,T,T,T,T
1,0,3,2,T,T,T,T
1, 2, 3
2,3,0,1,T,T,T,T
2,3,0,1,T,T,T,T
1, 2, 3

READ 4
11 100
3,0,1,2,T,T,T,T 4,5,6,7,T,T,T,T

Chop
5,6,7,4,T,T,T,T
3,2,1,0,T,T,T,T 4,5,6,7,T,T,T,T 5,4,7,6,T,T,T,T
1, 2, 3 1, 2, 3 1, 2, 3
6,7,4,5,T,T,T,T
6,7,4,5,T,T,T,T
1, 2, 3
7,4,5,6,T,T,T,T
7,6,5,4,T,T,T,T
1, 2, 3

WRITE
0,V,V 1,V,V
0,1,2,3,X,X,X,X 4,5,6,7,X,X,X,X
0,1,2,3,X,X,X,X 4,5,6,7,X,X,X,X
1, 2, 4, 5 1, 2, 4, 5
0,1,2,3,4,5,6,7
0,1,2,3,4,5,6,7
1,2,3,0,5,6,7,4
1,0,3,2,5,4,7,6
• Regular interface functionality during register reads o Support two Burst Ordering which are switched with A2 and A[1:0]=00b. o Support of read burst chop MRS and on-the-fly via A12/BC o All other address bits remaining column address bits including A10, all bank address bits will be ignored by the DDR3 SDRAM. o Regular read latencies and AC timings apply. o DLL must be locked prior to MPR Reads.

NOTE * Burst order bit 0 is assigned to LSB and burst order bit 7 is assigned to MSB of the selected MPR agent. NOTE Good reference for the example of MPR feature is the JEDEC standard No.93-3D, Protocol example.

Integrated Silicon Solution, Inc.
09/28/2015

IS43/46TR16128A, IS43/46TR16128AL, IS43/46TR82560A, IS43/46TR82560AL

Relevant Timing Parameters

AC timing parameters are important for operating the Multi Purpose Register tRP, tMRD, tMOD, and tMPRR. For more details refer to “Electrical Characteristics & AC Timing

Integrated Silicon Solution, Inc.
09/28/2015

IS43/46TR16128A, IS43/46TR16128AL, IS43/46TR82560A, IS43/46TR82560AL

DDR3 SDRAM Command Description and Operation

Command Truth Table
[BA=Bank Address, RA=Row Address, CA=Column Address, BC#=Burst Chop, X=Don’t Care, V=Valid]

Function

Abbreviation

Previous Current CS# RAS#

Cycle

Cycle

CAS#

BA0BA2

A11, A13, A14

A12/ BC#

A10/ AP

A0A9

Notes

Mode Register Set

OP Code

Refresh

Self Refresh Entry
7,9,12

Self Refresh Exit
7,8,9,12

Single Bank Precharge

Precharge all Banks

PREA

Bank Activate

Row Address RA

Write Fixed BL8 or BC4

BA RFU V

Write BC4, on the Fly

WRS4
ORDERING INFORMATION,128MX16, 1.5V DDR3
128Mx16 - Commercial Range 0°C TC 95°C

Data Rate

CL-tRCD-tRP

Order Part No.
1066MT/s
7-7-7

IS43TR16128A -187FBL
1333MT/s
9-9-9

IS43TR16128A -15HBL
1600MT/s
11-11-11

IS43TR16128A -125KBL
1866MT/s
13-13-13

IS43TR16128A -107MBL
128Mx16 - Industrial Range TC 95°C

Data Rate

CL-tRCD-tRP

Order Part No.
1066MT/s
7-7-7

IS43TR16128A -187FBLI
1333MT/s
9-9-9

IS43TR16128A -15HBLI
1600MT/s
11-11-11

IS43TR16128A -125KBLI
1866MT/s
13-13-13

IS43TR16128A -107MBLI
128Mx16 Automotive, A1 Range TC 95°C

Data Rate

CL-tRCD-tRP

Order Part No.
1066MT/s
7-7-7

IS46TR16128A -187FBLA1
1333MT/s
ORDERING INFORMATION,128MX16,1.35V DDR3L
128Mx16 - Commercial Range 0°C TC 95°C

Data Rate

CL-tRCD-tRP

Order Part No.
1333MT/s
9-9-9

IS43TR16128AL -15HBL
1600MT/s
11-11-11

IS43TR16128AL -125KBL
128Mx16 - Industrial Range TC 95°C

Data Rate

CL-tRCD-tRP

Order Part No.
1333MT/s
9-9-9

IS43TR16128AL -15HBLI
1600MT/s
11-11-11

IS43TR16128AL -125KBLI
128Mx16 Automotive, A1 Range TC 95°C

Data Rate

CL-tRCD-tRP

Order Part No.
1333MT/s
9-9-9

IS46TR16128AL -15HBLA1
1600MT/s
11-11-11

IS46TR16128AL -125KBLA1
128Mx16 Automotive, A2 Range TC 105°C

Data Rate

CL-tRCD-tRP

Order Part No.
1333MT/s
9-9-9

IS46TR16128AL -15HBLA2
1600MT/s
11-11-11

IS46TR16128AL -125KBLA2
ORDERING INFORMATION, 256MX8, 1.5V DDR3
256Mx8 - Commercial Range 0°C TC 95°C

Data Rate

CL-tRCD-tRP
1333MT/s
9-9-9
1600MT/s
11-11-11

Order Part No. IS43TR82560A -15HBL IS43TR82560A -125KBL
256Mx8 - Industrial Range TC 95°C

Data Rate

CL-tRCD-tRP
1333MT/s
9-9-9
1600MT/s
11-11-11

Order Part No. IS43TR82560A -15HBLI IS43TR82560A -125KBLI
256Mx8 Automotive, A1 Range TC 95°C

Data Rate

CL-tRCD-tRP

Order Part No.
1333MT/s
9-9-9

IS46TR82560A -15HBLA1
1600MT/s
11-11-11

IS46TR82560A -125KBLA1
256Mx8 Automotive, A2 Range TC 105°C

Data Rate

CL-tRCD-tRP

Order Part No.
1333MT/s
9-9-9

IS46TR82560A -15HBLA2
1600MT/s
11-11-11

IS46TR82560A -125KBLA2

Note Contact ISSI for availability of options.

Package 78-ball FBGA,Lead-free 78-ball FBGA,Lead-free

Package 78-ball FBGA,Lead-free 78-ball FBGA,Lead-free

Package 78-ball FBGA,Lead-free 78-ball FBGA,Lead-free
ORDERING INFORMATION, 256MX8, 1.35V DDR3L
256Mx8 - Commercial Range 0°C TC 95°C

Data Rate

CL-tRCD-tRP
1333MT/s
9-9-9
1600MT/s
11-11-11

Order Part No. IS43TR82560AL -15HBL IS43TR82560AL -125KBL
256Mx8 - Industrial Range TC 95°C

Data Rate

CL-tRCD-tRP
1333MT/s
9-9-9
1600MT/s
11-11-11

Order Part No. IS43TR82560AL -15HBLI IS43TR82560AL -125KBLI
256Mx8 Automotive, A1 Range TC 95°C

Data Rate

CL-tRCD-tRP

Order Part No.
1333MT/s
9-9-9

IS46TR82560AL -15HBLA1
1600MT/s
11-11-11

IS46TR82560AL -125KBLA1
256Mx8 Automotive, A2 Range TC 105°C

Data Rate

CL-tRCD-tRP

Order Part No.
1333MT/s
9-9-9

IS46TR82560AL -15HBLA2
1600MT/s
11-11-11

IS46TR82560AL -125KBLA2

Note Contact ISSI for availability of options.

Package 78-ball FBGA,Lead-free 78-ball FBGA,Lead-free

Package 78-ball FBGA,Lead-free 78-ball FBGA,Lead-free

Package 78-ball FBGA,Lead-free 78-ball FBGA,Lead-free

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Datasheet ID: IS43TR16128A-15HBL 639299