IDT79RC4640
Part | Datasheet |
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IDT79RV4640-180DUG (pdf) |
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IDT79RV4640-180DU |
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IDT79RV4640-267DUG |
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IDT79RV4640-267DU |
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IDT79RV4640-200DUG |
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PDF Datasheet Preview |
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Low-Cost Embedded 64-bit RISController w/ DSP Capability IDT79RC4640 High-performance embedded 64-bit microprocessor 64-bit integer operations 64-bit registers Based on the MIPS RISC Architecture 100MHz, 133MHz, 150MHz, 180MHz, 200MHz and 267MHz operating frequencies 32-bit bus interface brings 64-bit power to 32-bit system cost High-performance DSP capability Million Integer Mul-Accumulate operations/sec 89 MFlops floating-point operations High-performance microprocessor M Mul-Add/second 89 MFlops >640,000 dhrystone 2.1 /sec capability 352 dhrystone MIPS High level of integration 64-bit, 267 MHz integer CPU 8KB instruction cache 8KB data cache Integer multiply unit with 133.5M Mul-Add/sec Upwardly software compatible with IDT RISController Family Easily upgradable to 64-bit system Low-power operation Active power management powers-down inactive units Standby mode Large, efficient on-chip caches Separate 8KB Instruction and 8KB Data caches Over 3200MB/sec bandwidth from internal caches 2-set associative Write-back and write-through support Cache locking, to facilitate deterministic response High performance write protocols, for graphics and data communications Bus compatible with RC4000 family System interfaces to 125MHz, provides bandwidth up to 500 MB/sec Direct interface to 32-bit wide systems Synchronized to external reference clock for multi- master operation Socket compatible with IDT RC 64474 and RC64574 Improved real-time support Fast interrupt decode Optional cache locking Note “R” refers to 5V parts “RV” refers to 3.3V parts “RC” refers to both Block Diagram 267 MHz 64-bit CPU 64-bit Register File 64-bit Adder Load Aligner Store Aligner Logic Unit High-Performance Integer Multiply Pipeline Control Pipeline Control System Control Coprocessor Address Translation/ Cache Attribute Control Exception Management Functions 89 MFlops Single-Precision FPA FP Register File Pack/Unpack FP Add/Sub/Cvt/ Div/Sqrt FP Multiply Control Bus Instruction Bus Data Bus Instruction Cache Set A Lockable Instruction Cache Set B 32-bit Synchronized System Interface Data Cache Set A Lockable Data Cache Set B The IDT logo is a trademark and RC4600, RC4650, RC3081,RC3052,RC3051,RC3041 RISController, and RISCore are trademarks of Integrated Device Technology, Inc. 2008 Integrated Device Technology, Inc. 1 of 23 December 5, 2008 DSC 3486/2 Changes to version dated April 2001 In the Data Output and Data Output Hold categories of the System Interface Parameters tables, changed values in the Min column for all speeds from and to Changes to version dated June 2006 Added Green PQFP package for 133MHz DUG on Order Page. Changes to version dated December 2008 Removed IDT from ordering codes on Ordering Information page. MasterClock SysAD SysCmd ValidOut ValidIn RdRdy WrRdy Release Addr Data0 Data1 Write CData Data6 Data7 CData CEOD Figure 4 RC4640 Block Write Request 9 of 23 December 5, 2008 IDT79RC4640 Mode bit 0 4s:1 8 10:9 11 12 14:13 255:15 Reserved must be zero Writeback data rate 32-bit 1 WWx 2 WWxx 3 WxWx 4 WWxxx 5 WWxxxx 6 WxxWxx 7 8 WxxxWxxx 9-15 reserved Clock multiplier 7 reserved 0 Little endian 1 Big endian 00 R4000 compatible 01 reserved 10 pipelined writes 11 write re-issue Disable the timer interrupt on Int[5] Must be 1 Output driver strength 10 100% strength fastest 11 83% strength 00 67% strength 01 50% strength slowest Must be zero Table 6 Boot-time mode stream 10 of 23 December 5, 2008 IDT79RC4640 Pin Description The following is a list of interface, interrupt, and miscellaneous pins available on the RC4640. Pin names ending with an asterisk * identify pins that are active when low. Pin Name Type System Bus Interface ExtRqst* Input External request Signals that the system interface needs to submit an external request. Release* Output Release interface Signals that the processor is releasing the system interface to slave state RdRdy* Input Read Ready Signals that an external agent can now accept a processor read. WrRdy* Input Write Ready Signals that an external agent can now accept a processor write request. ValidIn* Ordering Information XXXX Operating Voltage Device Type 999 Speed A Package Temp range/ Process Blank I Commercial 0°C to +85°C Case Industrial -40°C to +85°C Case 128-pin PQFP DUG 128-pin PQFP, Green 128-pin PQFP 100 MHz PClk 133 MHz PClk 150 MHz PClk 180 MHz PClk 200 MHz PClk 267 MHz PCLK 4640 64-bit processor w/ DSP Capability Valid Combinations 79R4640 - 100, 133MHz - DZ 79RV4640 - 133, 150, 180, 200, 267MHz - DU 79RV4640 - 133MHz - DUG 79RV4640 - 133, 150, 180, 200MHz - DUI PQFP package, Commercial Temperature PQFP package, Commercial Temperature Green PQFP package, Commercial Temperature QFP package, Industrial Temperature CORPORATE HEADQUARTERS 6024 Silver Creek Valley Road San Jose, CA 95138 for SALES 800-345-7015 or 408-284-8200 fax 408-284-2775 The IDT logo is a trademark of Integrated Device Technology, Inc. 23 of 23 for Tech Support email phone 408-284-8208 December 5, 2008 |
More datasheets: DEMAM9SA197 | APTDF100H60G | IDT79RV4640-150DU | IDT79RV4640-133DUG | IDT79RV4640-150DUG | IDT79RV4640-180DU | IDT79RV4640-267DUG | IDT79RV4640-267DU | IDT79RV4640-200DUG | IDT79RV4640-200DU |
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