IDT74FCT16500ATPVG8

IDT74FCT16500ATPVG8 Datasheet

IDT74FCT16500AT/CT FAST CMOS 18-BIT REGISTERED TRANSCEIVER

Part	Datasheet
IDT74FCT16500ATPVG8	IDT74FCT16500ATPVG8 (pdf)

Related Parts	Information
IDT74FCT16500CTPVG8	IDT74FCT16500CTPVG8
IDT74FCT16500ATPVG	IDT74FCT16500ATPVG
IDT74FCT16500CTPVG	IDT74FCT16500CTPVG

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IDT74FCT16500AT/CT FAST CMOS 18-BIT REGISTERED TRANSCEIVER FAST CMOS 18-BIT REGISTERED TRANSCEIVER INDUSTRIALTEMPERATURE RANGE IDT74FCT16500AT/CT FEATURES: • MICRON CMOS Technology • High-speed, low-power CMOS replacement for ABT functions • Typical tSK o Output Skew < 250ps • Low input and output leakage max. • ESD > 2000V per MIL-STD-883, Method 3015 > 200V using machine model C = 200pF, R = 0 • VCC = 5V ±10% • High drive outputs IOH, 64mA IOL • Power off disable outputs permit “live insertion” • Typical VOLP Output Ground Bounce < 1.0V at VCC = 5V, TA = 25°C • Available in SSOP package FUNCTIONAL BLOCK DIAGRAM DESCRIPTION: The FCT16500T 18-bit registered transceivers are built using advanced dual metal CMOS technology. These high-speed, low-power 18-bit registered bus transceivers combine D-type latches and D-type flip-flops to allow data flow in transparent, latched and clocked modes. Data flow in each direction is controlled by output-enable OEAB and OEBA , latch enable LEAB and LEBA and clock CLKAB and CLKBA inputs. For A-to-B data flow, the device operates in transparent mode when LEAB is high. When LEAB is low, the A data is latched if CLKAB is held at a high or low logic level. If LEAB is low, the A bus data is stored in the latch/flip-flop on the high-to-low transition of CLKAB. OEAB performs the output enable function on the B port. Data flow from B port to A port is similar but uses OEBA, LEBA and CLKBA. Flow-through organization of signal pins simplifies layout. All inputs are designed with hysteresis for improved noise margin. The FCT16500T are ideally suited for driving high-capacitance loads and low-impedance backplanes. The output buffers are designed with power off disable capability to allow "live insertion" of boards when used as backplane drivers. OEAB 1 CLKBA 30 LEBA 28 OEBA 27 CLKAB 55 LEAB 54 B1 TO 17 OTHER CHANNELS The IDT logo is a registered trademark of Integrated Device Technology, Inc. INDUSTRIAL TEMPERATURE RANGE 1 2009 Integrated Device Technology, Inc. SEPTEMBER 2009 DSC-5433/5 IDT74FCT16500AT/CT FAST CMOS 18-BIT REGISTERED TRANSCEIVER PIN CONFIGURATION OEAB LEAB A1 GND A2 A3 VCC A4 A5 A6 GND A7 A8 A9 A10 A11 A12 GND A13 A14 A15 VCC A16 A17 GND A18 OEBA LEBA SSOP TOP VIEW GND CLKAB B1 GND B2 B3 VCC B4 B5 B6 GND B7 B8 B9 B10 B11 B12 GND B13 B14 B15 VCC B16 B17 GND B18 CLKBA GND PIN DESCRIPTION Pin Names OEAB OEBA LEAB LEBA CLKAB CLKBA Ax Bx Description A-to-B Output Enable Input B-to-A Output Enable Input Active LOW A-to-B Latch Enable Input B-to-A Latch Enable Input A-to-B Clock Input Active LOW B-to-A Clock Input Active LOW A-to-B Data Inputs or B-to-A 3-State Outputs B-to-A Data Inputs or A-to-B 3-State Outputs INDUSTRIAL TEMPERATURE RANGE ABSOLUTE MAXIMUM RATINGS 1 Unit VTERM 2 Terminal Voltage with Respect to GND VTERM 3 Terminal Voltage with Respect to GND to VCC+0.5 V TSTG Storage Temperature to +150 IOUT DC Output Current to +120 mA ORDERING INFORMATION FCT XXX Temp. Range Family XXXX Device Type Package INDUSTRIALTEMPERATURE RANGE PVG Shrink Small Outline Package - Green 500AT 18-Bit Registered Transceiver 500CT Double-Density, 5 Volt, High Drive 40 C to +85 C Datasheet Document History 09/28/09 Pg. 7 Updated the ordering information by removing the "IDT" notation and non RoHS part. CORPORATE HEADQUARTERS 6024 Silver Creek Valley Road San Jose, CA 95138 for SALES 800-345-7015 or 408-284-8200 fax 408-284-2775 for Tech Support:

PDF Datasheet Preview

IDT74FCT16500AT/CT FAST CMOS 18-BIT REGISTERED TRANSCEIVER

FAST CMOS 18-BIT REGISTERED TRANSCEIVER

INDUSTRIALTEMPERATURE RANGE

IDT74FCT16500AT/CT

FEATURES:
• MICRON CMOS Technology
• High-speed, low-power CMOS replacement for ABT functions
• Typical tSK o Output Skew < 250ps
• Low input and output leakage max.
• ESD > 2000V per MIL-STD-883, Method 3015 > 200V using
machine model C = 200pF, R = 0
• VCC = 5V ±10%
• High drive outputs IOH, 64mA IOL
• Power off disable outputs permit “live insertion”
• Typical VOLP Output Ground Bounce < 1.0V at VCC = 5V,

TA = 25°C
• Available in SSOP package

FUNCTIONAL BLOCK DIAGRAM

DESCRIPTION:

The FCT16500T 18-bit registered transceivers are built using advanced dual metal CMOS technology. These high-speed, low-power 18-bit registered bus transceivers combine D-type latches and D-type flip-flops to allow data flow in transparent, latched and clocked modes. Data flow in each direction is controlled by output-enable OEAB and OEBA , latch enable LEAB and LEBA and clock CLKAB and CLKBA inputs. For A-to-B data flow, the device operates in transparent mode when LEAB is high. When LEAB is low, the A data is latched if CLKAB is held at a high or low logic level. If LEAB is low, the A bus data is stored in the latch/flip-flop on the high-to-low transition of CLKAB. OEAB performs the output enable function on the B port. Data flow from B port to A port is similar but uses OEBA, LEBA and CLKBA. Flow-through organization of signal pins simplifies layout. All inputs are designed with hysteresis for improved noise margin.

The FCT16500T are ideally suited for driving high-capacitance loads and low-impedance backplanes. The output buffers are designed with power off disable capability to allow "live insertion" of boards when used as backplane drivers.

OEAB 1 CLKBA 30

LEBA 28 OEBA 27 CLKAB 55

LEAB
54 B1

TO 17 OTHER CHANNELS

The IDT logo is a registered trademark of Integrated Device Technology, Inc.

INDUSTRIAL TEMPERATURE RANGE 1
2009 Integrated Device Technology, Inc.

SEPTEMBER 2009

DSC-5433/5

IDT74FCT16500AT/CT FAST CMOS 18-BIT REGISTERED TRANSCEIVER

PIN CONFIGURATION

OEAB LEAB

A1 GND

A2 A3 VCC A4 A5 A6 GND A7 A8 A9 A10 A11 A12 GND A13 A14 A15 VCC A16 A17 GND A18 OEBA LEBA

SSOP TOP VIEW

GND CLKAB B1 GND B2 B3 VCC B4 B5 B6 GND B7 B8 B9 B10 B11 B12 GND B13 B14 B15 VCC B16 B17 GND B18 CLKBA GND

PIN DESCRIPTION

Pin Names OEAB OEBA LEAB LEBA CLKAB CLKBA Ax Bx

Description A-to-B Output Enable Input B-to-A Output Enable Input Active LOW A-to-B Latch Enable Input B-to-A Latch Enable Input A-to-B Clock Input Active LOW B-to-A Clock Input Active LOW A-to-B Data Inputs or B-to-A 3-State Outputs B-to-A Data Inputs or A-to-B 3-State Outputs

INDUSTRIAL TEMPERATURE RANGE

ABSOLUTE MAXIMUM RATINGS 1

Unit

VTERM 2 Terminal Voltage with Respect to GND

VTERM 3 Terminal Voltage with Respect to GND to VCC+0.5 V

TSTG Storage Temperature
to +150

IOUT DC Output Current
to +120 mA
ORDERING INFORMATION

FCT XXX

Temp. Range

Family

XXXX

Device Type Package

INDUSTRIALTEMPERATURE RANGE

PVG Shrink Small Outline Package - Green
500AT 18-Bit Registered Transceiver 500CT

Double-Density, 5 Volt, High Drive
40 C to +85 C

Datasheet Document History
09/28/09 Pg. 7
Updated the ordering information by removing the "IDT" notation and non RoHS part.

CORPORATE HEADQUARTERS 6024 Silver Creek Valley Road San Jose, CA 95138
for SALES 800-345-7015 or 408-284-8200 fax 408-284-2775
for Tech Support:

Notice: we do not provide any warranties that information, datasheets, application notes, circuit diagrams, or software stored on this website are up-to-date or error free. The archived IDT74FCT16500ATPVG8 Datasheet file may be downloaded here without warranties.

Datasheet ID: IDT74FCT16500ATPVG8 637369